1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/major.h>
27 #include <linux/string.h>
28 #include <linux/ptrace.h>
29 #include <linux/ioport.h>
30 #include <linux/circ_buf.h>
31 #include <linux/serial.h>
32 #include <linux/sysrq.h>
33 #include <linux/console.h>
35 #include <linux/serio.h>
37 #include <linux/serial_reg.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
43 #include <asm/oplib.h>
49 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
53 #include <linux/serial_core.h>
57 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
58 * in a UART clock of 1.8462 MHz.
60 #define SU_BASE_BAUD (1846200 / 16)
62 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
63 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
66 * Here we define the default xmit fifo size used for each type of UART.
68 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
73 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
75 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
76 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
79 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
80 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
81 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
85 struct uart_sunsu_port {
86 struct uart_port port;
91 unsigned int lsr_break_flag;
94 /* Probing information. */
96 unsigned int type_probed; /* XXX Stupid */
107 static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
109 offset <<= up->port.regshift;
111 switch (up->port.iotype) {
113 outb(up->port.hub6 - 1 + offset, up->port.iobase);
114 return inb(up->port.iobase + 1);
117 return readb(up->port.membase + offset);
120 return inb(up->port.iobase + offset);
125 serial_out(struct uart_sunsu_port *up, int offset, int value)
127 #ifndef CONFIG_SPARC64
129 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
130 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
131 * gate outputs a logical one. Since we use level triggered interrupts
132 * we have lockup and watchdog reset. We cannot mask IRQ because
133 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
134 * This problem is similar to what Alpha people suffer, see serial.c.
136 if (offset == UART_MCR)
137 value |= UART_MCR_OUT2;
139 offset <<= up->port.regshift;
141 switch (up->port.iotype) {
143 outb(up->port.hub6 - 1 + offset, up->port.iobase);
144 outb(value, up->port.iobase + 1);
148 writeb(value, up->port.membase + offset);
152 outb(value, up->port.iobase + offset);
157 * We used to support using pause I/O for certain machines. We
158 * haven't supported this for a while, but just in case it's badly
159 * needed for certain old 386 machines, I've left these #define's
162 #define serial_inp(up, offset) serial_in(up, offset)
163 #define serial_outp(up, offset, value) serial_out(up, offset, value)
169 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
171 serial_out(up, UART_SCR, offset);
172 serial_out(up, UART_ICR, value);
175 #if 0 /* Unused currently */
176 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
180 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
181 serial_out(up, UART_SCR, offset);
182 value = serial_in(up, UART_ICR);
183 serial_icr_write(up, UART_ACR, up->acr);
189 #ifdef CONFIG_SERIAL_8250_RSA
191 * Attempts to turn on the RSA FIFO. Returns zero on failure.
192 * We set the port uart clock rate if we succeed.
194 static int __enable_rsa(struct uart_sunsu_port *up)
199 mode = serial_inp(up, UART_RSA_MSR);
200 result = mode & UART_RSA_MSR_FIFO;
203 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
204 mode = serial_inp(up, UART_RSA_MSR);
205 result = mode & UART_RSA_MSR_FIFO;
209 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
214 static void enable_rsa(struct uart_sunsu_port *up)
216 if (up->port.type == PORT_RSA) {
217 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
218 spin_lock_irq(&up->port.lock);
220 spin_unlock_irq(&up->port.lock);
222 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
223 serial_outp(up, UART_RSA_FRR, 0);
228 * Attempts to turn off the RSA FIFO. Returns zero on failure.
229 * It is unknown why interrupts were disabled in here. However,
230 * the caller is expected to preserve this behaviour by grabbing
231 * the spinlock before calling this function.
233 static void disable_rsa(struct uart_sunsu_port *up)
238 if (up->port.type == PORT_RSA &&
239 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
240 spin_lock_irq(&up->port.lock);
242 mode = serial_inp(up, UART_RSA_MSR);
243 result = !(mode & UART_RSA_MSR_FIFO);
246 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
247 mode = serial_inp(up, UART_RSA_MSR);
248 result = !(mode & UART_RSA_MSR_FIFO);
252 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
253 spin_unlock_irq(&up->port.lock);
256 #endif /* CONFIG_SERIAL_8250_RSA */
258 static inline void __stop_tx(struct uart_sunsu_port *p)
260 if (p->ier & UART_IER_THRI) {
261 p->ier &= ~UART_IER_THRI;
262 serial_out(p, UART_IER, p->ier);
266 static void sunsu_stop_tx(struct uart_port *port)
268 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
273 * We really want to stop the transmitter from sending.
275 if (up->port.type == PORT_16C950) {
276 up->acr |= UART_ACR_TXDIS;
277 serial_icr_write(up, UART_ACR, up->acr);
281 static void sunsu_start_tx(struct uart_port *port)
283 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
285 if (!(up->ier & UART_IER_THRI)) {
286 up->ier |= UART_IER_THRI;
287 serial_out(up, UART_IER, up->ier);
291 * Re-enable the transmitter if we disabled it.
293 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
294 up->acr &= ~UART_ACR_TXDIS;
295 serial_icr_write(up, UART_ACR, up->acr);
299 static void sunsu_stop_rx(struct uart_port *port)
301 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
303 up->ier &= ~UART_IER_RLSI;
304 up->port.read_status_mask &= ~UART_LSR_DR;
305 serial_out(up, UART_IER, up->ier);
308 static void sunsu_enable_ms(struct uart_port *port)
310 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
313 spin_lock_irqsave(&up->port.lock, flags);
314 up->ier |= UART_IER_MSI;
315 serial_out(up, UART_IER, up->ier);
316 spin_unlock_irqrestore(&up->port.lock, flags);
319 static _INLINE_ struct tty_struct *
320 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
322 struct tty_struct *tty = up->port.info->tty;
323 unsigned char ch, flag;
325 int saw_console_brk = 0;
328 ch = serial_inp(up, UART_RX);
330 up->port.icount.rx++;
332 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
333 UART_LSR_FE | UART_LSR_OE))) {
335 * For statistics only
337 if (*status & UART_LSR_BI) {
338 *status &= ~(UART_LSR_FE | UART_LSR_PE);
339 up->port.icount.brk++;
340 if (up->port.cons != NULL &&
341 up->port.line == up->port.cons->index)
344 * We do the SysRQ and SAK checking
345 * here because otherwise the break
346 * may get masked by ignore_status_mask
347 * or read_status_mask.
349 if (uart_handle_break(&up->port))
351 } else if (*status & UART_LSR_PE)
352 up->port.icount.parity++;
353 else if (*status & UART_LSR_FE)
354 up->port.icount.frame++;
355 if (*status & UART_LSR_OE)
356 up->port.icount.overrun++;
359 * Mask off conditions which should be ingored.
361 *status &= up->port.read_status_mask;
363 if (up->port.cons != NULL &&
364 up->port.line == up->port.cons->index) {
365 /* Recover the break flag from console xmit */
366 *status |= up->lsr_break_flag;
367 up->lsr_break_flag = 0;
370 if (*status & UART_LSR_BI) {
372 } else if (*status & UART_LSR_PE)
374 else if (*status & UART_LSR_FE)
377 if (uart_handle_sysrq_char(&up->port, ch, regs))
379 if ((*status & up->port.ignore_status_mask) == 0)
380 tty_insert_flip_char(tty, ch, flag);
381 if (*status & UART_LSR_OE)
383 * Overrun is special, since it's reported
384 * immediately, and doesn't affect the current
387 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
389 *status = serial_inp(up, UART_LSR);
390 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
398 static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
400 struct circ_buf *xmit = &up->port.info->xmit;
403 if (up->port.x_char) {
404 serial_outp(up, UART_TX, up->port.x_char);
405 up->port.icount.tx++;
409 if (uart_tx_stopped(&up->port)) {
410 sunsu_stop_tx(&up->port);
413 if (uart_circ_empty(xmit)) {
418 count = up->port.fifosize;
420 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
421 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
422 up->port.icount.tx++;
423 if (uart_circ_empty(xmit))
425 } while (--count > 0);
427 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
428 uart_write_wakeup(&up->port);
430 if (uart_circ_empty(xmit))
434 static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
438 status = serial_in(up, UART_MSR);
440 if ((status & UART_MSR_ANY_DELTA) == 0)
443 if (status & UART_MSR_TERI)
444 up->port.icount.rng++;
445 if (status & UART_MSR_DDSR)
446 up->port.icount.dsr++;
447 if (status & UART_MSR_DDCD)
448 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
449 if (status & UART_MSR_DCTS)
450 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
452 wake_up_interruptible(&up->port.info->delta_msr_wait);
455 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
457 struct uart_sunsu_port *up = dev_id;
459 unsigned char status;
461 spin_lock_irqsave(&up->port.lock, flags);
464 struct tty_struct *tty;
466 status = serial_inp(up, UART_LSR);
468 if (status & UART_LSR_DR)
469 tty = receive_chars(up, &status, regs);
470 check_modem_status(up);
471 if (status & UART_LSR_THRE)
474 spin_unlock_irqrestore(&up->port.lock, flags);
477 tty_flip_buffer_push(tty);
479 spin_lock_irqsave(&up->port.lock, flags);
481 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
483 spin_unlock_irqrestore(&up->port.lock, flags);
488 /* Separate interrupt handling path for keyboard/mouse ports. */
491 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
492 unsigned int iflag, unsigned int quot);
494 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
496 unsigned int cur_cflag = up->cflag;
500 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
502 quot = up->port.uartclk / (16 * new_baud);
504 sunsu_change_speed(&up->port, up->cflag, 0, quot);
507 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
510 unsigned char ch = serial_inp(up, UART_RX);
512 /* Stop-A is handled by drivers/char/keyboard.c now. */
513 if (up->su_type == SU_PORT_KBD) {
515 serio_interrupt(up->serio, ch, 0, regs);
517 } else if (up->su_type == SU_PORT_MS) {
518 int ret = suncore_mouse_baud_detection(ch, is_break);
522 sunsu_change_mouse_baud(up);
529 serio_interrupt(up->serio, ch, 0, regs);
534 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
537 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
539 struct uart_sunsu_port *up = dev_id;
541 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
542 unsigned char status = serial_inp(up, UART_LSR);
544 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
545 receive_kbd_ms_chars(up, regs,
546 (status & UART_LSR_BI) != 0);
552 static unsigned int sunsu_tx_empty(struct uart_port *port)
554 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
558 spin_lock_irqsave(&up->port.lock, flags);
559 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
560 spin_unlock_irqrestore(&up->port.lock, flags);
565 static unsigned int sunsu_get_mctrl(struct uart_port *port)
567 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
568 unsigned char status;
571 status = serial_in(up, UART_MSR);
574 if (status & UART_MSR_DCD)
576 if (status & UART_MSR_RI)
578 if (status & UART_MSR_DSR)
580 if (status & UART_MSR_CTS)
585 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
587 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
588 unsigned char mcr = 0;
590 if (mctrl & TIOCM_RTS)
592 if (mctrl & TIOCM_DTR)
594 if (mctrl & TIOCM_OUT1)
595 mcr |= UART_MCR_OUT1;
596 if (mctrl & TIOCM_OUT2)
597 mcr |= UART_MCR_OUT2;
598 if (mctrl & TIOCM_LOOP)
599 mcr |= UART_MCR_LOOP;
601 serial_out(up, UART_MCR, mcr);
604 static void sunsu_break_ctl(struct uart_port *port, int break_state)
606 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
609 spin_lock_irqsave(&up->port.lock, flags);
610 if (break_state == -1)
611 up->lcr |= UART_LCR_SBC;
613 up->lcr &= ~UART_LCR_SBC;
614 serial_out(up, UART_LCR, up->lcr);
615 spin_unlock_irqrestore(&up->port.lock, flags);
618 static int sunsu_startup(struct uart_port *port)
620 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
624 if (up->port.type == PORT_16C950) {
625 /* Wake up and initialize UART */
627 serial_outp(up, UART_LCR, 0xBF);
628 serial_outp(up, UART_EFR, UART_EFR_ECB);
629 serial_outp(up, UART_IER, 0);
630 serial_outp(up, UART_LCR, 0);
631 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
632 serial_outp(up, UART_LCR, 0xBF);
633 serial_outp(up, UART_EFR, UART_EFR_ECB);
634 serial_outp(up, UART_LCR, 0);
637 #ifdef CONFIG_SERIAL_8250_RSA
639 * If this is an RSA port, see if we can kick it up to the
640 * higher speed clock.
646 * Clear the FIFO buffers and disable them.
647 * (they will be reeanbled in set_termios())
649 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
650 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
651 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
652 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
653 serial_outp(up, UART_FCR, 0);
657 * Clear the interrupt registers.
659 (void) serial_inp(up, UART_LSR);
660 (void) serial_inp(up, UART_RX);
661 (void) serial_inp(up, UART_IIR);
662 (void) serial_inp(up, UART_MSR);
665 * At this point, there's no way the LSR could still be 0xff;
666 * if it is, then bail out, because there's likely no UART
669 if (!(up->port.flags & UPF_BUGGY_UART) &&
670 (serial_inp(up, UART_LSR) == 0xff)) {
671 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
675 if (up->su_type != SU_PORT_PORT) {
676 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
677 SA_SHIRQ, su_typev[up->su_type], up);
679 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
680 SA_SHIRQ, su_typev[up->su_type], up);
683 printk("su: Cannot register IRQ %d\n", up->port.irq);
688 * Now, initialize the UART
690 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
692 spin_lock_irqsave(&up->port.lock, flags);
694 up->port.mctrl |= TIOCM_OUT2;
696 sunsu_set_mctrl(&up->port, up->port.mctrl);
697 spin_unlock_irqrestore(&up->port.lock, flags);
700 * Finally, enable interrupts. Note: Modem status interrupts
701 * are set via set_termios(), which will be occurring imminently
702 * anyway, so we don't enable them here.
704 up->ier = UART_IER_RLSI | UART_IER_RDI;
705 serial_outp(up, UART_IER, up->ier);
707 if (up->port.flags & UPF_FOURPORT) {
710 * Enable interrupts on the AST Fourport board
712 icp = (up->port.iobase & 0xfe0) | 0x01f;
718 * And clear the interrupt registers again for luck.
720 (void) serial_inp(up, UART_LSR);
721 (void) serial_inp(up, UART_RX);
722 (void) serial_inp(up, UART_IIR);
723 (void) serial_inp(up, UART_MSR);
728 static void sunsu_shutdown(struct uart_port *port)
730 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
734 * Disable interrupts from this port
737 serial_outp(up, UART_IER, 0);
739 spin_lock_irqsave(&up->port.lock, flags);
740 if (up->port.flags & UPF_FOURPORT) {
741 /* reset interrupts on the AST Fourport board */
742 inb((up->port.iobase & 0xfe0) | 0x1f);
743 up->port.mctrl |= TIOCM_OUT1;
745 up->port.mctrl &= ~TIOCM_OUT2;
747 sunsu_set_mctrl(&up->port, up->port.mctrl);
748 spin_unlock_irqrestore(&up->port.lock, flags);
751 * Disable break condition and FIFOs
753 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
754 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
755 UART_FCR_CLEAR_RCVR |
756 UART_FCR_CLEAR_XMIT);
757 serial_outp(up, UART_FCR, 0);
759 #ifdef CONFIG_SERIAL_8250_RSA
761 * Reset the RSA board back to 115kbps compat mode.
767 * Read data port to reset things.
769 (void) serial_in(up, UART_RX);
771 free_irq(up->port.irq, up);
775 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
776 unsigned int iflag, unsigned int quot)
778 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
779 unsigned char cval, fcr = 0;
782 switch (cflag & CSIZE) {
801 cval |= UART_LCR_PARITY;
802 if (!(cflag & PARODD))
803 cval |= UART_LCR_EPAR;
806 cval |= UART_LCR_SPAR;
810 * Work around a bug in the Oxford Semiconductor 952 rev B
811 * chip which causes it to seriously miscalculate baud rates
814 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
818 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
819 if ((up->port.uartclk / quot) < (2400 * 16))
820 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
821 #ifdef CONFIG_SERIAL_8250_RSA
822 else if (up->port.type == PORT_RSA)
823 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
826 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
828 if (up->port.type == PORT_16750)
829 fcr |= UART_FCR7_64BYTE;
832 * Ok, we're now changing the port state. Do it with
833 * interrupts disabled.
835 spin_lock_irqsave(&up->port.lock, flags);
838 * Update the per-port timeout.
840 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
842 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
844 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
845 if (iflag & (BRKINT | PARMRK))
846 up->port.read_status_mask |= UART_LSR_BI;
849 * Characteres to ignore
851 up->port.ignore_status_mask = 0;
853 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
854 if (iflag & IGNBRK) {
855 up->port.ignore_status_mask |= UART_LSR_BI;
857 * If we're ignoring parity and break indicators,
858 * ignore overruns too (for real raw support).
861 up->port.ignore_status_mask |= UART_LSR_OE;
865 * ignore all characters if CREAD is not set
867 if ((cflag & CREAD) == 0)
868 up->port.ignore_status_mask |= UART_LSR_DR;
871 * CTS flow control flag and modem status interrupts
873 up->ier &= ~UART_IER_MSI;
874 if (UART_ENABLE_MS(&up->port, cflag))
875 up->ier |= UART_IER_MSI;
877 serial_out(up, UART_IER, up->ier);
879 if (uart_config[up->port.type].flags & UART_STARTECH) {
880 serial_outp(up, UART_LCR, 0xBF);
881 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
883 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
884 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
885 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
886 if (up->port.type == PORT_16750)
887 serial_outp(up, UART_FCR, fcr); /* set fcr */
888 serial_outp(up, UART_LCR, cval); /* reset DLAB */
889 up->lcr = cval; /* Save LCR */
890 if (up->port.type != PORT_16750) {
891 if (fcr & UART_FCR_ENABLE_FIFO) {
892 /* emulated UARTs (Lucent Venus 167x) need two steps */
893 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
895 serial_outp(up, UART_FCR, fcr); /* set fcr */
900 spin_unlock_irqrestore(&up->port.lock, flags);
904 sunsu_set_termios(struct uart_port *port, struct termios *termios,
907 unsigned int baud, quot;
910 * Ask the core to calculate the divisor for us.
912 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
913 quot = uart_get_divisor(port, baud);
915 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
918 static void sunsu_release_port(struct uart_port *port)
922 static int sunsu_request_port(struct uart_port *port)
927 static void sunsu_config_port(struct uart_port *port, int flags)
929 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
931 if (flags & UART_CONFIG_TYPE) {
933 * We are supposed to call autoconfig here, but this requires
934 * splitting all the OBP probing crap from the UART probing.
935 * We'll do it when we kill sunsu.c altogether.
937 port->type = up->type_probed; /* XXX */
942 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
948 sunsu_type(struct uart_port *port)
950 int type = port->type;
952 if (type >= ARRAY_SIZE(uart_config))
954 return uart_config[type].name;
957 static struct uart_ops sunsu_pops = {
958 .tx_empty = sunsu_tx_empty,
959 .set_mctrl = sunsu_set_mctrl,
960 .get_mctrl = sunsu_get_mctrl,
961 .stop_tx = sunsu_stop_tx,
962 .start_tx = sunsu_start_tx,
963 .stop_rx = sunsu_stop_rx,
964 .enable_ms = sunsu_enable_ms,
965 .break_ctl = sunsu_break_ctl,
966 .startup = sunsu_startup,
967 .shutdown = sunsu_shutdown,
968 .set_termios = sunsu_set_termios,
970 .release_port = sunsu_release_port,
971 .request_port = sunsu_request_port,
972 .config_port = sunsu_config_port,
973 .verify_port = sunsu_verify_port,
978 static struct uart_sunsu_port sunsu_ports[UART_NR];
982 static DEFINE_SPINLOCK(sunsu_serio_lock);
984 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
986 struct uart_sunsu_port *up = serio->port_data;
990 spin_lock_irqsave(&sunsu_serio_lock, flags);
993 lsr = serial_in(up, UART_LSR);
994 } while (!(lsr & UART_LSR_THRE));
996 /* Send the character out. */
997 serial_out(up, UART_TX, ch);
999 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1004 static int sunsu_serio_open(struct serio *serio)
1006 struct uart_sunsu_port *up = serio->port_data;
1007 unsigned long flags;
1010 spin_lock_irqsave(&sunsu_serio_lock, flags);
1011 if (!up->serio_open) {
1016 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1021 static void sunsu_serio_close(struct serio *serio)
1023 struct uart_sunsu_port *up = serio->port_data;
1024 unsigned long flags;
1026 spin_lock_irqsave(&sunsu_serio_lock, flags);
1028 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1031 #endif /* CONFIG_SERIO */
1033 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1035 unsigned char status1, status2, scratch, scratch2, scratch3;
1036 unsigned char save_lcr, save_mcr;
1037 struct linux_ebus_device *dev = NULL;
1038 struct linux_ebus *ebus;
1039 #ifdef CONFIG_SPARC64
1040 struct sparc_isa_bridge *isa_br;
1041 struct sparc_isa_device *isa_dev;
1043 #ifndef CONFIG_SPARC64
1044 struct linux_prom_registers reg0;
1046 unsigned long flags;
1048 if (!up->port_node || !up->su_type)
1051 up->type_probed = PORT_UNKNOWN;
1052 up->port.iotype = UPIO_MEM;
1055 * First we look for Ebus-bases su's
1057 for_each_ebus(ebus) {
1058 for_each_ebusdev(dev, ebus) {
1059 if (dev->prom_node == up->port_node) {
1061 * The EBus is broken on sparc; it delivers
1062 * virtual addresses in resources. Oh well...
1063 * This is correct on sparc64, though.
1065 up->port.membase = (char *) dev->resource[0].start;
1067 * This is correct on both architectures.
1069 up->port.mapbase = dev->resource[0].start;
1070 up->port.irq = dev->irqs[0];
1076 #ifdef CONFIG_SPARC64
1077 for_each_isa(isa_br) {
1078 for_each_isadev(isa_dev, isa_br) {
1079 if (isa_dev->prom_node == up->port_node) {
1080 /* Same on sparc64. Cool architecure... */
1081 up->port.membase = (char *) isa_dev->resource.start;
1082 up->port.mapbase = isa_dev->resource.start;
1083 up->port.irq = isa_dev->irq;
1090 #ifdef CONFIG_SPARC64
1092 * Not on Ebus, bailing.
1097 * Not on Ebus, must be OBIO.
1099 if (prom_getproperty(up->port_node, "reg",
1100 (char *)®0, sizeof(reg0)) == -1) {
1101 prom_printf("sunsu: no \"reg\" property\n");
1104 prom_apply_obio_ranges(®0, 1);
1105 if (reg0.which_io != 0) { /* Just in case... */
1106 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1107 reg0.which_io, reg0.phys_addr);
1110 up->port.mapbase = reg0.phys_addr;
1111 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1112 prom_printf("sunsu: Cannot map registers.\n");
1117 * 0x20 is sun4m thing, Dave Redman heritage.
1118 * See arch/sparc/kernel/irq.c.
1120 #define IRQ_4M(n) ((n)|0x20)
1123 * There is no intr property on MrCoffee, so hardwire it.
1125 up->port.irq = IRQ_4M(13);
1130 spin_lock_irqsave(&up->port.lock, flags);
1132 if (!(up->port.flags & UPF_BUGGY_UART)) {
1134 * Do a simple existence test first; if we fail this, there's
1135 * no point trying anything else.
1137 * 0x80 is used as a nonsense port to prevent against false
1138 * positives due to ISA bus float. The assumption is that
1139 * 0x80 is a non-existent port; which should be safe since
1140 * include/asm/io.h also makes this assumption.
1142 scratch = serial_inp(up, UART_IER);
1143 serial_outp(up, UART_IER, 0);
1147 scratch2 = serial_inp(up, UART_IER);
1148 serial_outp(up, UART_IER, 0x0f);
1152 scratch3 = serial_inp(up, UART_IER);
1153 serial_outp(up, UART_IER, scratch);
1154 if (scratch2 != 0 || scratch3 != 0x0F)
1155 goto out; /* We failed; there's nothing here */
1158 save_mcr = serial_in(up, UART_MCR);
1159 save_lcr = serial_in(up, UART_LCR);
1162 * Check to see if a UART is really there. Certain broken
1163 * internal modems based on the Rockwell chipset fail this
1164 * test, because they apparently don't implement the loopback
1165 * test mode. So this test is skipped on the COM 1 through
1166 * COM 4 ports. This *should* be safe, since no board
1167 * manufacturer would be stupid enough to design a board
1168 * that conflicts with COM 1-4 --- we hope!
1170 if (!(up->port.flags & UPF_SKIP_TEST)) {
1171 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1172 status1 = serial_inp(up, UART_MSR) & 0xF0;
1173 serial_outp(up, UART_MCR, save_mcr);
1174 if (status1 != 0x90)
1175 goto out; /* We failed loopback test */
1177 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1178 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1179 serial_outp(up, UART_LCR, 0);
1180 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1181 scratch = serial_in(up, UART_IIR) >> 6;
1184 up->port.type = PORT_16450;
1187 up->port.type = PORT_UNKNOWN;
1190 up->port.type = PORT_16550;
1193 up->port.type = PORT_16550A;
1196 if (up->port.type == PORT_16550A) {
1197 /* Check for Startech UART's */
1198 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1199 if (serial_in(up, UART_EFR) == 0) {
1200 up->port.type = PORT_16650;
1202 serial_outp(up, UART_LCR, 0xBF);
1203 if (serial_in(up, UART_EFR) == 0)
1204 up->port.type = PORT_16650V2;
1207 if (up->port.type == PORT_16550A) {
1208 /* Check for TI 16750 */
1209 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1210 serial_outp(up, UART_FCR,
1211 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1212 scratch = serial_in(up, UART_IIR) >> 5;
1215 * If this is a 16750, and not a cheap UART
1216 * clone, then it should only go into 64 byte
1217 * mode if the UART_FCR7_64BYTE bit was set
1218 * while UART_LCR_DLAB was latched.
1220 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1221 serial_outp(up, UART_LCR, 0);
1222 serial_outp(up, UART_FCR,
1223 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1224 scratch = serial_in(up, UART_IIR) >> 5;
1226 up->port.type = PORT_16750;
1228 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1230 serial_outp(up, UART_LCR, save_lcr);
1231 if (up->port.type == PORT_16450) {
1232 scratch = serial_in(up, UART_SCR);
1233 serial_outp(up, UART_SCR, 0xa5);
1234 status1 = serial_in(up, UART_SCR);
1235 serial_outp(up, UART_SCR, 0x5a);
1236 status2 = serial_in(up, UART_SCR);
1237 serial_outp(up, UART_SCR, scratch);
1239 if ((status1 != 0xa5) || (status2 != 0x5a))
1240 up->port.type = PORT_8250;
1243 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1245 if (up->port.type == PORT_UNKNOWN)
1247 up->type_probed = up->port.type; /* XXX */
1252 #ifdef CONFIG_SERIAL_8250_RSA
1253 if (up->port.type == PORT_RSA)
1254 serial_outp(up, UART_RSA_FRR, 0);
1256 serial_outp(up, UART_MCR, save_mcr);
1257 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1258 UART_FCR_CLEAR_RCVR |
1259 UART_FCR_CLEAR_XMIT));
1260 serial_outp(up, UART_FCR, 0);
1261 (void)serial_in(up, UART_RX);
1262 serial_outp(up, UART_IER, 0);
1265 spin_unlock_irqrestore(&up->port.lock, flags);
1268 static struct uart_driver sunsu_reg = {
1269 .owner = THIS_MODULE,
1270 .driver_name = "serial",
1271 .devfs_name = "tts/",
1276 static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1280 struct serio *serio;
1283 spin_lock_init(&up->port.lock);
1284 up->port.line = channel;
1285 up->port.type = PORT_UNKNOWN;
1286 up->port.uartclk = (SU_BASE_BAUD * 16);
1288 if (up->su_type == SU_PORT_KBD) {
1289 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1292 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1295 quot = up->port.uartclk / (16 * baud);
1297 sunsu_autoconfig(up);
1298 if (up->port.type == PORT_UNKNOWN)
1301 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1303 up->port.membase, __irq_itoa(up->port.irq),
1304 sunsu_type(&up->port));
1307 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1309 memset(serio, 0, sizeof(*serio));
1311 serio->port_data = up;
1313 serio->id.type = SERIO_RS232;
1314 if (up->su_type == SU_PORT_KBD) {
1315 serio->id.proto = SERIO_SUNKBD;
1316 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1318 serio->id.proto = SERIO_SUN;
1319 serio->id.extra = 1;
1320 strlcpy(serio->name, "sums", sizeof(serio->name));
1322 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1323 sizeof(serio->phys));
1325 serio->write = sunsu_serio_write;
1326 serio->open = sunsu_serio_open;
1327 serio->close = sunsu_serio_close;
1329 serio_register_port(serio);
1331 printk(KERN_WARNING "su%d: not enough memory for serio port\n",
1336 sunsu_change_speed(&up->port, up->cflag, 0, quot);
1338 sunsu_startup(&up->port);
1343 * ------------------------------------------------------------
1344 * Serial console driver
1345 * ------------------------------------------------------------
1348 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1350 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1353 * Wait for transmitter & holding register to empty
1355 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1357 unsigned int status, tmout = 10000;
1359 /* Wait up to 10ms for the character(s) to be sent. */
1361 status = serial_in(up, UART_LSR);
1363 if (status & UART_LSR_BI)
1364 up->lsr_break_flag = UART_LSR_BI;
1369 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1371 /* Wait up to 1s for flow control if necessary */
1372 if (up->port.flags & UPF_CONS_FLOW) {
1375 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1380 static void sunsu_console_putchar(struct uart_port *port, int ch)
1382 struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
1385 serial_out(up, UART_TX, ch);
1389 * Print a string to the serial port trying not to disturb
1390 * any possible real use of the port...
1392 static void sunsu_console_write(struct console *co, const char *s,
1395 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1399 * First save the UER then disable the interrupts
1401 ier = serial_in(up, UART_IER);
1402 serial_out(up, UART_IER, 0);
1404 uart_console_write(&up->port, s, count, sunsu_console_putchar);
1407 * Finally, wait for transmitter to become empty
1408 * and restore the IER
1411 serial_out(up, UART_IER, ier);
1415 * Setup initial baud/bits/parity. We do two things here:
1416 * - construct a cflag setting for the first su_open()
1417 * - initialize the serial port
1418 * Return non-zero if we didn't find a serial port.
1420 static int sunsu_console_setup(struct console *co, char *options)
1422 struct uart_port *port;
1428 printk("Console: ttyS%d (SU)\n",
1429 (sunsu_reg.minor - 64) + co->index);
1432 * Check whether an invalid uart number has been specified, and
1433 * if so, search for the first available port that does have
1436 if (co->index >= UART_NR)
1438 port = &sunsu_ports[co->index].port;
1443 spin_lock_init(&port->lock);
1446 uart_parse_options(options, &baud, &parity, &bits, &flow);
1448 return uart_set_options(port, co, baud, parity, bits, flow);
1451 static struct console sunsu_cons = {
1453 .write = sunsu_console_write,
1454 .device = uart_console_device,
1455 .setup = sunsu_console_setup,
1456 .flags = CON_PRINTBUFFER,
1465 static inline struct console *SUNSU_CONSOLE(void)
1469 if (con_is_present())
1472 for (i = 0; i < UART_NR; i++) {
1473 int this_minor = sunsu_reg.minor + i;
1475 if ((this_minor - 64) == (serial_console - 1))
1480 if (sunsu_ports[i].port_node == 0)
1483 sunsu_cons.index = i;
1488 #define SUNSU_CONSOLE() (NULL)
1489 #define sunsu_serial_console_init() do { } while (0)
1492 static int __init sunsu_serial_init(void)
1494 int instance, ret, i;
1496 /* How many instances do we need? */
1498 for (i = 0; i < UART_NR; i++) {
1499 struct uart_sunsu_port *up = &sunsu_ports[i];
1501 if (up->su_type == SU_PORT_MS ||
1502 up->su_type == SU_PORT_KBD)
1505 spin_lock_init(&up->port.lock);
1506 up->port.flags |= UPF_BOOT_AUTOCONF;
1507 up->port.type = PORT_UNKNOWN;
1508 up->port.uartclk = (SU_BASE_BAUD * 16);
1510 sunsu_autoconfig(up);
1511 if (up->port.type == PORT_UNKNOWN)
1514 up->port.line = instance++;
1515 up->port.ops = &sunsu_pops;
1518 sunsu_reg.minor = sunserial_current_minor;
1520 sunsu_reg.nr = instance;
1522 ret = uart_register_driver(&sunsu_reg);
1526 sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64;
1528 sunserial_current_minor += instance;
1530 sunsu_reg.cons = SUNSU_CONSOLE();
1532 for (i = 0; i < UART_NR; i++) {
1533 struct uart_sunsu_port *up = &sunsu_ports[i];
1535 /* Do not register Keyboard/Mouse lines with UART
1538 if (up->su_type == SU_PORT_MS ||
1539 up->su_type == SU_PORT_KBD)
1542 if (up->port.type == PORT_UNKNOWN)
1545 uart_add_one_port(&sunsu_reg, &up->port);
1551 static int su_node_ok(int node, char *name, int namelen)
1553 if (strncmp(name, "su", namelen) == 0 ||
1554 strncmp(name, "su_pnp", namelen) == 0)
1557 if (strncmp(name, "serial", namelen) == 0) {
1561 /* Is it _really_ a 'su' device? */
1562 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1564 if (strncmp(compat, "sab82532", 8) == 0) {
1565 /* Nope, Siemens serial, not for us. */
1575 #define SU_PROPSIZE 128
1578 * Scan status structure.
1579 * "prop" is a local variable but it eats stack to keep it in each
1580 * stack frame of a recursive procedure.
1582 struct su_probe_scan {
1583 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1584 int msx, kbx; /* minors for mouse and keyboard */
1585 int devices; /* scan index */
1586 char prop[SU_PROPSIZE];
1590 * We have several platforms which present 'su' in different parts
1591 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1592 * We walk over the tree and find them wherever PROM hides them.
1594 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1596 struct uart_sunsu_port *up;
1599 if (t->devices >= UART_NR)
1602 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1603 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1605 continue; /* Broken PROM node */
1607 if (su_node_ok(sunode, t->prop, len)) {
1608 up = &sunsu_ports[t->devices];
1609 if (t->kbnode != 0 && sunode == t->kbnode) {
1610 t->kbx = t->devices;
1611 up->su_type = SU_PORT_KBD;
1612 } else if (t->msnode != 0 && sunode == t->msnode) {
1613 t->msx = t->devices;
1614 up->su_type = SU_PORT_MS;
1616 #ifdef CONFIG_SPARC64
1618 * Do not attempt to use the truncated
1619 * keyboard/mouse ports as serial ports
1620 * on Ultras with PC keyboard attached.
1622 if (prom_getbool(sunode, "mouse"))
1624 if (prom_getbool(sunode, "keyboard"))
1627 up->su_type = SU_PORT_PORT;
1629 up->port_node = sunode;
1632 su_probe_any(t, prom_getchild(sunode));
1637 static int __init sunsu_probe(void)
1641 struct su_probe_scan scan;
1644 * First, we scan the tree.
1653 * Get the nodes for keyboard and mouse from 'aliases'...
1655 node = prom_getchild(prom_root_node);
1656 node = prom_searchsiblings(node, "aliases");
1658 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1661 scan.kbnode = prom_finddevice(scan.prop);
1664 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1667 scan.msnode = prom_finddevice(scan.prop);
1671 su_probe_any(&scan, prom_getchild(prom_root_node));
1674 * Second, we process the special case of keyboard and mouse.
1676 * Currently if we got keyboard and mouse hooked to "su" ports
1677 * we do not use any possible remaining "su" as a serial port.
1678 * Thus, we ignore values of .msx and .kbx, then compact ports.
1680 if (scan.msx != -1 && scan.kbx != -1) {
1681 sunsu_ports[0].su_type = SU_PORT_MS;
1682 sunsu_ports[0].port_node = scan.msnode;
1683 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1685 sunsu_ports[1].su_type = SU_PORT_KBD;
1686 sunsu_ports[1].port_node = scan.kbnode;
1687 sunsu_kbd_ms_init(&sunsu_ports[1], 1);
1692 if (scan.msx != -1 || scan.kbx != -1) {
1693 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1697 if (scan.devices == 0)
1701 * Console must be initiated after the generic initialization.
1703 sunsu_serial_init();
1708 static void __exit sunsu_exit(void)
1713 for (i = 0; i < UART_NR; i++) {
1714 struct uart_sunsu_port *up = &sunsu_ports[i];
1716 if (up->su_type == SU_PORT_MS ||
1717 up->su_type == SU_PORT_KBD) {
1720 serio_unregister_port(up->serio);
1724 } else if (up->port.type != PORT_UNKNOWN) {
1725 uart_remove_one_port(&sunsu_reg, &up->port);
1731 uart_unregister_driver(&sunsu_reg);
1734 module_init(sunsu_probe);
1735 module_exit(sunsu_exit);