2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
20 within(unsigned long addr, unsigned long start, unsigned long end)
22 return addr >= start && addr < end;
30 * clflush_cache_range - flush a cache range with clflush
31 * @addr: virtual start address
32 * @size: number of bytes to flush
34 * clflush is an unordered instruction which needs fencing with mfence
35 * to avoid ordering issues.
37 void clflush_cache_range(void *vaddr, unsigned int size)
39 void *vend = vaddr + size - 1;
43 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
46 * Flush any possible final partial cacheline:
53 static void __cpa_flush_all(void *arg)
56 * Flush all to work around Errata in early athlons regarding
57 * large page flushing.
61 if (boot_cpu_data.x86_model >= 4)
65 static void cpa_flush_all(void)
67 BUG_ON(irqs_disabled());
69 on_each_cpu(__cpa_flush_all, NULL, 1, 1);
72 static void __cpa_flush_range(void *arg)
75 * We could optimize that further and do individual per page
76 * tlb invalidates for a low number of pages. Caveat: we must
77 * flush the high aliases on 64bit as well.
82 static void cpa_flush_range(unsigned long start, int numpages)
84 unsigned int i, level;
87 BUG_ON(irqs_disabled());
88 WARN_ON(PAGE_ALIGN(start) != start);
90 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
93 * We only need to flush on one CPU,
94 * clflush is a MESI-coherent instruction that
95 * will cause all other CPUs to flush the same
98 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
99 pte_t *pte = lookup_address(addr, &level);
102 * Only flush present addresses:
104 if (pte && pte_present(*pte))
105 clflush_cache_range((void *) addr, PAGE_SIZE);
110 * Certain areas of memory on x86 require very specific protection flags,
111 * for example the BIOS area or kernel text. Callers don't always get this
112 * right (again, ioremap() on BIOS memory is not uncommon) so this function
113 * checks and fixes these known static required protection bits.
115 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
117 pgprot_t forbidden = __pgprot(0);
120 * The BIOS area between 640k and 1Mb needs to be executable for
121 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
123 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
124 pgprot_val(forbidden) |= _PAGE_NX;
127 * The kernel text needs to be executable for obvious reasons
128 * Does not cover __inittext since that is gone later on
130 if (within(address, (unsigned long)_text, (unsigned long)_etext))
131 pgprot_val(forbidden) |= _PAGE_NX;
133 #ifdef CONFIG_DEBUG_RODATA
134 /* The .rodata section needs to be read-only */
135 if (within(address, (unsigned long)__start_rodata,
136 (unsigned long)__end_rodata))
137 pgprot_val(forbidden) |= _PAGE_RW;
140 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
145 pte_t *lookup_address(unsigned long address, int *level)
147 pgd_t *pgd = pgd_offset_k(address);
151 *level = PG_LEVEL_NONE;
155 pud = pud_offset(pgd, address);
158 pmd = pmd_offset(pud, address);
162 *level = PG_LEVEL_2M;
166 *level = PG_LEVEL_4K;
167 return pte_offset_kernel(pmd, address);
170 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
173 set_pte_atomic(kpte, pte);
175 if (!SHARED_KERNEL_PMD) {
178 list_for_each_entry(page, &pgd_list, lru) {
183 pgd = (pgd_t *)page_address(page) + pgd_index(address);
184 pud = pud_offset(pgd, address);
185 pmd = pmd_offset(pud, address);
186 set_pte_atomic((pte_t *)pmd, pte);
192 static int split_large_page(pte_t *kpte, unsigned long address)
194 pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
195 gfp_t gfp_flags = GFP_KERNEL;
200 unsigned int i, level;
202 #ifdef CONFIG_DEBUG_PAGEALLOC
203 gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
204 gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
206 base = alloc_pages(gfp_flags, 0);
210 spin_lock_irqsave(&pgd_lock, flags);
212 * Check for races, another CPU might have split this page
215 tmp = lookup_address(address, &level);
221 address = __pa(address);
222 addr = address & LARGE_PAGE_MASK;
223 pbase = (pte_t *)page_address(base);
225 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
228 for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE)
229 set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT, ref_prot));
232 * Install the new, split up pagetable. Important detail here:
234 * On Intel the NX bit of all levels must be cleared to make a
235 * page executable. See section 4.13.2 of Intel 64 and IA-32
236 * Architectures Software Developer's Manual).
238 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
239 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
243 spin_unlock_irqrestore(&pgd_lock, flags);
246 __free_pages(base, 0);
252 __change_page_attr(unsigned long address, unsigned long pfn,
253 pgprot_t mask_set, pgprot_t mask_clr)
255 struct page *kpte_page;
260 BUG_ON(pfn > max_low_pfn);
264 kpte = lookup_address(address, &level);
268 kpte_page = virt_to_page(kpte);
269 BUG_ON(PageLRU(kpte_page));
270 BUG_ON(PageCompound(kpte_page));
272 if (level == PG_LEVEL_4K) {
273 pgprot_t new_prot = pte_pgprot(*kpte);
274 pte_t new_pte, old_pte = *kpte;
276 pgprot_val(new_prot) &= ~pgprot_val(mask_clr);
277 pgprot_val(new_prot) |= pgprot_val(mask_set);
279 new_prot = static_protections(new_prot, address);
281 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
282 BUG_ON(pte_pfn(new_pte) != pte_pfn(old_pte));
284 set_pte_atomic(kpte, new_pte);
286 err = split_large_page(kpte, address);
294 * change_page_attr_addr - Change page table attributes in linear mapping
295 * @address: Virtual address in linear mapping.
296 * @prot: New page table attribute (PAGE_*)
298 * Change page attributes of a page in the direct mapping. This is a variant
299 * of change_page_attr() that also works on memory holes that do not have
300 * mem_map entry (pfn_valid() is false).
302 * See change_page_attr() documentation for more details.
304 * Modules and drivers should use the set_memory_* APIs instead.
307 #define HIGH_MAP_START __START_KERNEL_map
308 #define HIGH_MAP_END (__START_KERNEL_map + KERNEL_TEXT_SIZE)
311 change_page_attr_addr(unsigned long address, pgprot_t mask_set,
314 unsigned long phys_addr = __pa(address);
315 unsigned long pfn = phys_addr >> PAGE_SHIFT;
320 * If we are inside the high mapped kernel range, then we
321 * fixup the low mapping first. __va() returns the virtual
322 * address in the linear mapping:
324 if (within(address, HIGH_MAP_START, HIGH_MAP_END))
325 address = (unsigned long) __va(phys_addr);
328 err = __change_page_attr(address, pfn, mask_set, mask_clr);
334 * If the physical address is inside the kernel map, we need
335 * to touch the high mapped kernel as well:
337 if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
339 * Calc the high mapping address. See __phys_addr()
340 * for the non obvious details.
342 address = phys_addr + HIGH_MAP_START - phys_base;
343 /* Make sure the kernel mappings stay executable */
344 pgprot_val(mask_clr) |= _PAGE_NX;
347 * Our high aliases are imprecise, because we check
348 * everything between 0 and KERNEL_TEXT_SIZE, so do
349 * not propagate lookup failures back to users:
351 __change_page_attr(address, pfn, mask_set, mask_clr);
357 static int __change_page_attr_set_clr(unsigned long addr, int numpages,
358 pgprot_t mask_set, pgprot_t mask_clr)
363 for (i = 0; i < numpages ; i++, addr += PAGE_SIZE) {
364 ret = change_page_attr_addr(addr, mask_set, mask_clr);
372 static int change_page_attr_set_clr(unsigned long addr, int numpages,
373 pgprot_t mask_set, pgprot_t mask_clr)
375 int ret = __change_page_attr_set_clr(addr, numpages, mask_set,
379 * On success we use clflush, when the CPU supports it to
380 * avoid the wbindv. If the CPU does not support it and in the
381 * error case we fall back to cpa_flush_all (which uses
384 if (!ret && cpu_has_clflush)
385 cpa_flush_range(addr, numpages);
392 static inline int change_page_attr_set(unsigned long addr, int numpages,
395 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
398 static inline int change_page_attr_clear(unsigned long addr, int numpages,
401 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
404 int set_memory_uc(unsigned long addr, int numpages)
406 return change_page_attr_set(addr, numpages,
407 __pgprot(_PAGE_PCD | _PAGE_PWT));
409 EXPORT_SYMBOL(set_memory_uc);
411 int set_memory_wb(unsigned long addr, int numpages)
413 return change_page_attr_clear(addr, numpages,
414 __pgprot(_PAGE_PCD | _PAGE_PWT));
416 EXPORT_SYMBOL(set_memory_wb);
418 int set_memory_x(unsigned long addr, int numpages)
420 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
422 EXPORT_SYMBOL(set_memory_x);
424 int set_memory_nx(unsigned long addr, int numpages)
426 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
428 EXPORT_SYMBOL(set_memory_nx);
430 int set_memory_ro(unsigned long addr, int numpages)
432 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
435 int set_memory_rw(unsigned long addr, int numpages)
437 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
440 int set_memory_np(unsigned long addr, int numpages)
442 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
445 int set_pages_uc(struct page *page, int numpages)
447 unsigned long addr = (unsigned long)page_address(page);
449 return set_memory_uc(addr, numpages);
451 EXPORT_SYMBOL(set_pages_uc);
453 int set_pages_wb(struct page *page, int numpages)
455 unsigned long addr = (unsigned long)page_address(page);
457 return set_memory_wb(addr, numpages);
459 EXPORT_SYMBOL(set_pages_wb);
461 int set_pages_x(struct page *page, int numpages)
463 unsigned long addr = (unsigned long)page_address(page);
465 return set_memory_x(addr, numpages);
467 EXPORT_SYMBOL(set_pages_x);
469 int set_pages_nx(struct page *page, int numpages)
471 unsigned long addr = (unsigned long)page_address(page);
473 return set_memory_nx(addr, numpages);
475 EXPORT_SYMBOL(set_pages_nx);
477 int set_pages_ro(struct page *page, int numpages)
479 unsigned long addr = (unsigned long)page_address(page);
481 return set_memory_ro(addr, numpages);
484 int set_pages_rw(struct page *page, int numpages)
486 unsigned long addr = (unsigned long)page_address(page);
488 return set_memory_rw(addr, numpages);
492 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_CPA_DEBUG)
493 static inline int __change_page_attr_set(unsigned long addr, int numpages,
496 return __change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
499 static inline int __change_page_attr_clear(unsigned long addr, int numpages,
502 return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
506 #ifdef CONFIG_DEBUG_PAGEALLOC
508 static int __set_pages_p(struct page *page, int numpages)
510 unsigned long addr = (unsigned long)page_address(page);
512 return __change_page_attr_set(addr, numpages,
513 __pgprot(_PAGE_PRESENT | _PAGE_RW));
516 static int __set_pages_np(struct page *page, int numpages)
518 unsigned long addr = (unsigned long)page_address(page);
520 return __change_page_attr_clear(addr, numpages,
521 __pgprot(_PAGE_PRESENT));
524 void kernel_map_pages(struct page *page, int numpages, int enable)
526 if (PageHighMem(page))
529 debug_check_no_locks_freed(page_address(page),
530 numpages * PAGE_SIZE);
534 * If page allocator is not up yet then do not call c_p_a():
536 if (!debug_pagealloc_enabled)
540 * The return value is ignored - the calls cannot fail,
541 * large pages are disabled at boot time:
544 __set_pages_p(page, numpages);
546 __set_pages_np(page, numpages);
549 * We should perform an IPI and flush all tlbs,
550 * but that can deadlock->flush only current cpu:
557 * The testcases use internal knowledge of the implementation that shouldn't
558 * be exposed to the rest of the kernel. Include these directly here.
560 #ifdef CONFIG_CPA_DEBUG
561 #include "pageattr-test.c"