2 * Copyright (C) 2003 - 2006 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
30 * Source file for NIC routines to initialize the Phantom Hardware
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_phan_reg.h"
40 struct crb_addr_pair {
45 unsigned long last_schedule_time;
47 #define NETXEN_MAX_CRB_XFORM 60
48 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
49 #define NETXEN_ADDR_ERROR (0xffffffff)
51 #define crb_addr_transform(name) \
52 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
53 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
55 #define NETXEN_NIC_XDMA_RESET 0x8000ff
58 netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
59 unsigned long off, int *data)
61 void __iomem *addr = pci_base_offset(adapter, off);
65 static void crb_addr_transform_setup(void)
67 crb_addr_transform(XDMA);
68 crb_addr_transform(TIMR);
69 crb_addr_transform(SRE);
70 crb_addr_transform(SQN3);
71 crb_addr_transform(SQN2);
72 crb_addr_transform(SQN1);
73 crb_addr_transform(SQN0);
74 crb_addr_transform(SQS3);
75 crb_addr_transform(SQS2);
76 crb_addr_transform(SQS1);
77 crb_addr_transform(SQS0);
78 crb_addr_transform(RPMX7);
79 crb_addr_transform(RPMX6);
80 crb_addr_transform(RPMX5);
81 crb_addr_transform(RPMX4);
82 crb_addr_transform(RPMX3);
83 crb_addr_transform(RPMX2);
84 crb_addr_transform(RPMX1);
85 crb_addr_transform(RPMX0);
86 crb_addr_transform(ROMUSB);
87 crb_addr_transform(SN);
88 crb_addr_transform(QMN);
89 crb_addr_transform(QMS);
90 crb_addr_transform(PGNI);
91 crb_addr_transform(PGND);
92 crb_addr_transform(PGN3);
93 crb_addr_transform(PGN2);
94 crb_addr_transform(PGN1);
95 crb_addr_transform(PGN0);
96 crb_addr_transform(PGSI);
97 crb_addr_transform(PGSD);
98 crb_addr_transform(PGS3);
99 crb_addr_transform(PGS2);
100 crb_addr_transform(PGS1);
101 crb_addr_transform(PGS0);
102 crb_addr_transform(PS);
103 crb_addr_transform(PH);
104 crb_addr_transform(NIU);
105 crb_addr_transform(I2Q);
106 crb_addr_transform(EG);
107 crb_addr_transform(MN);
108 crb_addr_transform(MS);
109 crb_addr_transform(CAS2);
110 crb_addr_transform(CAS1);
111 crb_addr_transform(CAS0);
112 crb_addr_transform(CAM);
113 crb_addr_transform(C2C1);
114 crb_addr_transform(C2C0);
115 crb_addr_transform(SMB);
118 int netxen_init_firmware(struct netxen_adapter *adapter)
120 u32 state = 0, loops = 0, err = 0;
123 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
125 if (state == PHAN_INITIALIZE_ACK)
128 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
131 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
136 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
142 writel(MPORT_SINGLE_FUNCTION_MODE,
143 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
144 writel(PHAN_INITIALIZE_ACK,
145 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
150 #define NETXEN_ADDR_LIMIT 0xffffffffULL
152 void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
153 struct pci_dev **used_dev)
157 addr = pci_alloc_consistent(pdev, sz, ptr);
158 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
162 pci_free_consistent(pdev, sz, addr, *ptr);
163 addr = pci_alloc_consistent(NULL, sz, ptr);
168 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
173 struct netxen_rcv_desc_ctx *rcv_desc;
175 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
176 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
177 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
178 struct netxen_rx_buffer *rx_buf;
179 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
180 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
181 rcv_desc->begin_alloc = 0;
182 rx_buf = rcv_desc->rx_buf_arr;
183 num_rx_bufs = rcv_desc->max_rx_desc_count;
185 * Now go through all of them, set reference handles
186 * and put them in the queues.
188 for (i = 0; i < num_rx_bufs; i++) {
189 rx_buf->ref_handle = i;
190 rx_buf->state = NETXEN_BUFFER_FREE;
191 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
192 "%p\n", ctxid, i, rx_buf);
199 void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
202 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
204 if (netxen_nic_get_board_info(adapter) != 0)
205 printk("%s: Error getting board config info.\n",
206 netxen_nic_driver_name);
207 get_brd_port_by_type(board_info->board_type, &ports);
209 printk(KERN_ERR "%s: Unknown board type\n",
210 netxen_nic_driver_name);
211 adapter->ahw.max_ports = ports;
214 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
216 switch (adapter->ahw.board_type) {
218 adapter->enable_phy_interrupts =
219 netxen_niu_gbe_enable_phy_interrupts;
220 adapter->disable_phy_interrupts =
221 netxen_niu_gbe_disable_phy_interrupts;
222 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
223 adapter->macaddr_set = netxen_niu_macaddr_set;
224 adapter->set_mtu = netxen_nic_set_mtu_gb;
225 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
226 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
227 adapter->phy_read = netxen_niu_gbe_phy_read;
228 adapter->phy_write = netxen_niu_gbe_phy_write;
229 adapter->init_port = netxen_niu_gbe_init_port;
230 adapter->init_niu = netxen_nic_init_niu_gb;
231 adapter->stop_port = netxen_niu_disable_gbe_port;
234 case NETXEN_NIC_XGBE:
235 adapter->enable_phy_interrupts =
236 netxen_niu_xgbe_enable_phy_interrupts;
237 adapter->disable_phy_interrupts =
238 netxen_niu_xgbe_disable_phy_interrupts;
239 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
240 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
241 adapter->set_mtu = netxen_nic_set_mtu_xgb;
242 adapter->init_port = netxen_niu_xg_init_port;
243 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
244 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
245 adapter->stop_port = netxen_niu_disable_xg_port;
254 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
255 * address to external PCI CRB address.
257 u32 netxen_decode_crb_addr(u32 addr)
260 u32 base_addr, offset, pci_base;
262 crb_addr_transform_setup();
264 pci_base = NETXEN_ADDR_ERROR;
265 base_addr = addr & 0xfff00000;
266 offset = addr & 0x000fffff;
268 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
269 if (crb_addr_xform[i] == base_addr) {
274 if (pci_base == NETXEN_ADDR_ERROR)
277 return (pci_base + offset);
280 static long rom_max_timeout = 10000;
281 static long rom_lock_timeout = 1000000;
282 static long rom_write_timeout = 700;
284 static inline int rom_lock(struct netxen_adapter *adapter)
291 /* acquire semaphore2 from PCI HW block */
292 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
296 if (timeout >= rom_lock_timeout)
306 for (iter = 0; iter < 20; iter++)
307 cpu_relax(); /*This a nop instr on i386 */
310 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
314 int netxen_wait_rom_done(struct netxen_adapter *adapter)
320 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
323 if (timeout >= rom_max_timeout) {
324 printk("Timeout reached waiting for rom done");
331 static inline int netxen_rom_wren(struct netxen_adapter *adapter)
333 /* Set write enable latch in ROM status register */
334 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
335 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
337 if (netxen_wait_rom_done(adapter)) {
343 static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
346 unsigned int data = 0xdeaddead;
347 data = netxen_nic_reg_read(adapter, addr);
351 static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
353 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
355 if (netxen_wait_rom_done(adapter)) {
358 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
361 static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
365 /* release semaphore2 */
366 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
370 int netxen_rom_wip_poll(struct netxen_adapter *adapter)
375 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
377 val = netxen_do_rom_rdsr(adapter);
380 if (timeout > rom_max_timeout) {
387 static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
390 if (netxen_rom_wren(adapter)) {
393 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
394 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
395 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
396 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
398 if (netxen_wait_rom_done(adapter)) {
399 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
403 return netxen_rom_wip_poll(adapter);
407 do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
409 if (jiffies > (last_schedule_time + (8 * HZ))) {
410 last_schedule_time = jiffies;
414 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
415 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
416 udelay(100); /* prevent bursting on CRB */
417 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
418 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
419 if (netxen_wait_rom_done(adapter)) {
420 printk("Error waiting for rom done\n");
423 /* reset abyte_cnt and dummy_byte_cnt */
424 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
425 udelay(100); /* prevent bursting on CRB */
426 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
428 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
433 do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
434 u8 *bytes, size_t size)
439 for (addridx = addr; addridx < (addr + size); addridx += 4) {
440 ret = do_rom_fast_read(adapter, addridx, (int *)bytes);
450 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
451 u8 *bytes, size_t size)
455 ret = rom_lock(adapter);
459 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
461 netxen_rom_unlock(adapter);
465 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
469 if (rom_lock(adapter) != 0)
472 ret = do_rom_fast_read(adapter, addr, valp);
473 netxen_rom_unlock(adapter);
477 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
481 if (rom_lock(adapter) != 0) {
484 ret = do_rom_fast_write(adapter, addr, data);
485 netxen_rom_unlock(adapter);
489 static inline int do_rom_fast_write_words(struct netxen_adapter *adapter,
490 int addr, u8 *bytes, size_t size)
495 while (addridx < (addr + size)) {
496 int last_attempt = 0;
502 ret = do_rom_fast_write(adapter, addridx, data);
509 ret = do_rom_fast_read(adapter, addridx, &data1);
516 if (timeout++ >= rom_write_timeout) {
517 if (last_attempt++ < 4) {
518 ret = do_rom_fast_write(adapter,
524 printk(KERN_INFO "Data write did not "
525 "succeed at address 0x%x\n", addridx);
538 int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
539 u8 *bytes, size_t size)
543 ret = rom_lock(adapter);
547 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
548 netxen_rom_unlock(adapter);
553 int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
557 ret = netxen_rom_wren(adapter);
561 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
562 netxen_crb_writelit_adapter(adapter,
563 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
565 ret = netxen_wait_rom_done(adapter);
569 return netxen_rom_wip_poll(adapter);
572 int netxen_rom_rdsr(struct netxen_adapter *adapter)
576 ret = rom_lock(adapter);
580 ret = netxen_do_rom_rdsr(adapter);
581 netxen_rom_unlock(adapter);
585 int netxen_backup_crbinit(struct netxen_adapter *adapter)
587 int ret = FLASH_SUCCESS;
589 char *buffer = kmalloc(FLASH_SECTOR_SIZE, GFP_KERNEL);
593 /* unlock sector 63 */
594 val = netxen_rom_rdsr(adapter);
596 ret = netxen_rom_wrsr(adapter, val);
597 if (ret != FLASH_SUCCESS)
600 ret = netxen_rom_wip_poll(adapter);
601 if (ret != FLASH_SUCCESS)
604 /* copy sector 0 to sector 63 */
605 ret = netxen_rom_fast_read_words(adapter, CRBINIT_START,
606 buffer, FLASH_SECTOR_SIZE);
607 if (ret != FLASH_SUCCESS)
610 ret = netxen_rom_fast_write_words(adapter, FIXED_START,
611 buffer, FLASH_SECTOR_SIZE);
612 if (ret != FLASH_SUCCESS)
616 val = netxen_rom_rdsr(adapter);
620 if (netxen_rom_wrsr(adapter, val) == 0) {
621 ret = netxen_rom_wip_poll(adapter);
622 if (ret != FLASH_SUCCESS)
626 ret = netxen_rom_wip_poll(adapter);
627 if (ret != FLASH_SUCCESS)
637 int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
639 netxen_rom_wren(adapter);
640 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
641 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
642 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
644 if (netxen_wait_rom_done(adapter)) {
645 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
648 return netxen_rom_wip_poll(adapter);
651 void check_erased_flash(struct netxen_adapter *adapter, int addr)
655 int count = 0, erased_errors = 0;
658 range = (addr == USER_START) ? FIXED_START : addr + FLASH_SECTOR_SIZE;
660 for (i = addr; i < range; i += 4) {
661 netxen_rom_fast_read(adapter, i, &val);
662 if (val != 0xffffffff)
668 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
669 "for sector address: %x\n", erased_errors, count, addr);
672 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
675 if (rom_lock(adapter) != 0) {
678 ret = netxen_do_rom_se(adapter, addr);
679 netxen_rom_unlock(adapter);
681 check_erased_flash(adapter, addr);
687 netxen_flash_erase_sections(struct netxen_adapter *adapter, int start, int end)
689 int ret = FLASH_SUCCESS;
692 for (i = start; i < end; i++) {
693 ret = netxen_rom_se(adapter, i * FLASH_SECTOR_SIZE);
696 ret = netxen_rom_wip_poll(adapter);
705 netxen_flash_erase_secondary(struct netxen_adapter *adapter)
707 int ret = FLASH_SUCCESS;
710 start = SECONDARY_START / FLASH_SECTOR_SIZE;
711 end = USER_START / FLASH_SECTOR_SIZE;
712 ret = netxen_flash_erase_sections(adapter, start, end);
718 netxen_flash_erase_primary(struct netxen_adapter *adapter)
720 int ret = FLASH_SUCCESS;
723 start = PRIMARY_START / FLASH_SECTOR_SIZE;
724 end = SECONDARY_START / FLASH_SECTOR_SIZE;
725 ret = netxen_flash_erase_sections(adapter, start, end);
730 void netxen_halt_pegs(struct netxen_adapter *adapter)
732 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
733 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
734 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
735 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
738 int netxen_flash_unlock(struct netxen_adapter *adapter)
742 ret = netxen_rom_wrsr(adapter, 0);
746 ret = netxen_rom_wren(adapter);
753 #define NETXEN_BOARDTYPE 0x4008
754 #define NETXEN_BOARDNUM 0x400c
755 #define NETXEN_CHIPNUM 0x4010
756 #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
757 #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
758 #define NETXEN_ROM_FOUND_INIT 0x400
760 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
762 int addr, val, status;
765 struct crb_addr_pair *buf;
769 status = netxen_nic_get_board_info(adapter);
771 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
772 netxen_nic_driver_name);
774 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
775 NETXEN_ROMBUS_RESET);
779 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
780 printk("P2 ROM board type: 0x%08x\n", val);
782 printk("Could not read board type\n");
783 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
784 printk("P2 ROM board num: 0x%08x\n", val);
786 printk("Could not read board number\n");
787 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
788 printk("P2 ROM chip num: 0x%08x\n", val);
790 printk("Could not read chip number\n");
793 if (netxen_rom_fast_read(adapter, 0, &n) == 0
794 && (n & NETXEN_ROM_FIRST_BARRIER)) {
795 n &= ~NETXEN_ROM_ROUNDUP;
796 if (n < NETXEN_ROM_FOUND_INIT) {
798 printk("%s: %d CRB init values found"
799 " in ROM.\n", netxen_nic_driver_name, n);
801 printk("%s:n=0x%x Error! NetXen card flash not"
802 " initialized.\n", __FUNCTION__, n);
805 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
807 printk("%s: netxen_pinit_from_rom: Unable to calloc "
808 "memory.\n", netxen_nic_driver_name);
811 for (i = 0; i < n; i++) {
812 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
813 || netxen_rom_fast_read(adapter, 8 * i + 8,
821 printk("%s: PCI: 0x%08x == 0x%08x\n",
822 netxen_nic_driver_name, (unsigned int)
823 netxen_decode_crb_addr(addr), val);
825 for (i = 0; i < n; i++) {
827 off = netxen_decode_crb_addr(buf[i].addr);
828 if (off == NETXEN_ADDR_ERROR) {
829 printk(KERN_ERR"CRB init value out of range %x\n",
833 off += NETXEN_PCI_CRBSPACE;
834 /* skipping cold reboot MAGIC */
835 if (off == NETXEN_CAM_RAM(0x1fc))
838 /* After writing this register, HW needs time for CRB */
839 /* to quiet down (else crb_window returns 0xffffffff) */
840 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
842 /* hold xdma in reset also */
843 buf[i].data = NETXEN_NIC_XDMA_RESET;
846 if (ADDR_IN_WINDOW1(off)) {
848 NETXEN_CRB_NORMALIZE(adapter, off));
850 netxen_nic_pci_change_crbwindow(adapter, 0);
852 pci_base_offset(adapter, off));
854 netxen_nic_pci_change_crbwindow(adapter, 1);
856 if (init_delay == 1) {
864 /* disable_peg_cache_all */
866 /* unreset_net_cache */
867 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
869 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
871 /* p2dn replyCount */
872 netxen_crb_writelit_adapter(adapter,
873 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
874 /* disable_peg_cache 0 */
875 netxen_crb_writelit_adapter(adapter,
876 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
877 /* disable_peg_cache 1 */
878 netxen_crb_writelit_adapter(adapter,
879 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
884 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
886 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
889 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
891 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
894 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
896 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
899 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
901 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
907 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
913 adapter->dummy_dma.addr =
914 pci_alloc_consistent(adapter->ahw.pdev,
915 NETXEN_HOST_DUMMY_DMA_SIZE,
916 &adapter->dummy_dma.phys_addr);
917 if (adapter->dummy_dma.addr == NULL) {
918 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
923 addr = (uint64_t) adapter->dummy_dma.phys_addr;
924 hi = (addr >> 32) & 0xffffffff;
925 lo = addr & 0xffffffff;
927 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
928 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
933 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
935 if (adapter->dummy_dma.addr) {
936 writel(0, NETXEN_CRB_NORMALIZE(adapter,
937 CRB_HOST_DUMMY_BUF_ADDR_HI));
938 writel(0, NETXEN_CRB_NORMALIZE(adapter,
939 CRB_HOST_DUMMY_BUF_ADDR_LO));
940 pci_free_consistent(adapter->ahw.pdev,
941 NETXEN_HOST_DUMMY_DMA_SIZE,
942 adapter->dummy_dma.addr,
943 adapter->dummy_dma.phys_addr);
944 adapter->dummy_dma.addr = NULL;
948 void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
954 val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
955 while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) {
959 readl(NETXEN_CRB_NORMALIZE
960 (adapter, CRB_CMDPEG_STATE));
963 if (val != PHAN_INITIALIZE_COMPLETE)
964 printk("WARNING: Initial boot wait loop failed...\n");
968 int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
972 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
973 struct netxen_recv_context *recv_ctx =
974 &(adapter->recv_ctx[ctx]);
976 struct status_desc *desc_head;
977 struct status_desc *desc;
979 consumer = recv_ctx->status_rx_consumer;
980 desc_head = recv_ctx->rcv_status_desc_head;
981 desc = &desc_head[consumer];
983 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
990 static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
993 struct netxen_port *port;
994 struct net_device *netdev;
995 uint32_t temp, temp_state, temp_val;
998 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
1000 temp_state = nx_get_temp_state(temp);
1001 temp_val = nx_get_temp_val(temp);
1003 if (temp_state == NX_TEMP_PANIC) {
1005 "%s: Device temperature %d degrees C exceeds"
1006 " maximum allowed. Hardware has been shut down.\n",
1007 netxen_nic_driver_name, temp_val);
1008 for (port_num = 0; port_num < adapter->ahw.max_ports;
1010 port = adapter->port[port_num];
1011 netdev = port->netdev;
1013 netif_carrier_off(netdev);
1014 netif_stop_queue(netdev);
1017 } else if (temp_state == NX_TEMP_WARN) {
1018 if (adapter->temp == NX_TEMP_NORMAL) {
1020 "%s: Device temperature %d degrees C "
1021 "exceeds operating range."
1022 " Immediate action needed.\n",
1023 netxen_nic_driver_name, temp_val);
1026 if (adapter->temp == NX_TEMP_WARN) {
1028 "%s: Device temperature is now %d degrees C"
1029 " in normal range.\n", netxen_nic_driver_name,
1033 adapter->temp = temp_state;
1037 void netxen_watchdog_task(struct work_struct *work)
1040 struct netxen_port *port;
1041 struct net_device *netdev;
1042 struct netxen_adapter *adapter =
1043 container_of(work, struct netxen_adapter, watchdog_task);
1045 if (netxen_nic_check_temp(adapter))
1048 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
1049 port = adapter->port[port_num];
1050 netdev = port->netdev;
1052 if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
1053 printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
1054 netxen_nic_driver_name, port_num, netdev->name);
1055 netif_carrier_on(netdev);
1058 if (netif_queue_stopped(netdev))
1059 netif_wake_queue(netdev);
1062 if (adapter->handle_phy_intr)
1063 adapter->handle_phy_intr(adapter);
1064 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1068 * netxen_process_rcv() send the received packet to the protocol stack.
1069 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1070 * invoke the routine to send more rx buffers to the Phantom...
1073 netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1074 struct status_desc *desc)
1076 struct netxen_port *port = adapter->port[netxen_get_sts_port(desc)];
1077 struct pci_dev *pdev = port->pdev;
1078 struct net_device *netdev = port->netdev;
1079 int index = netxen_get_sts_refhandle(desc);
1080 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1081 struct netxen_rx_buffer *buffer;
1082 struct sk_buff *skb;
1083 u32 length = netxen_get_sts_totallength(desc);
1085 struct netxen_rcv_desc_ctx *rcv_desc;
1088 desc_ctx = netxen_get_sts_type(desc);
1089 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1090 printk("%s: %s Bad Rcv descriptor ring\n",
1091 netxen_nic_driver_name, netdev->name);
1095 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
1096 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1097 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1098 index, rcv_desc->max_rx_desc_count);
1101 buffer = &rcv_desc->rx_buf_arr[index];
1102 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1103 buffer->lro_current_frags++;
1104 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1105 buffer->lro_expected_frags =
1106 netxen_get_sts_desc_lro_cnt(desc);
1107 buffer->lro_length = length;
1109 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1110 if (buffer->lro_expected_frags != 0) {
1111 printk("LRO: (refhandle:%x) recv frag."
1112 "wait for last. flags: %x expected:%d"
1114 netxen_get_sts_desc_lro_last_frag(desc),
1115 buffer->lro_expected_frags,
1116 buffer->lro_current_frags);
1122 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1123 PCI_DMA_FROMDEVICE);
1125 skb = (struct sk_buff *)buffer->skb;
1127 if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
1128 port->stats.csummed++;
1129 skb->ip_summed = CHECKSUM_UNNECESSARY;
1132 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1133 /* True length was only available on the last pkt */
1134 skb_put(skb, buffer->lro_length);
1136 skb_put(skb, length);
1139 skb->protocol = eth_type_trans(skb, netdev);
1141 ret = netif_receive_skb(skb);
1144 * RH: Do we need these stats on a regular basis. Can we get it from
1148 case NET_RX_SUCCESS:
1149 port->stats.uphappy++;
1153 port->stats.uplcong++;
1157 port->stats.upmcong++;
1160 case NET_RX_CN_HIGH:
1161 port->stats.uphcong++;
1165 port->stats.updropped++;
1169 port->stats.updunno++;
1173 netdev->last_rx = jiffies;
1175 rcv_desc->rcv_free++;
1176 rcv_desc->rcv_pending--;
1179 * We just consumed one buffer so post a buffer.
1181 adapter->stats.post_called++;
1183 buffer->state = NETXEN_BUFFER_FREE;
1184 buffer->lro_current_frags = 0;
1185 buffer->lro_expected_frags = 0;
1187 port->stats.no_rcv++;
1188 port->stats.rxbytes += length;
1191 /* Process Receive status ring */
1192 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1194 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1195 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1196 struct status_desc *desc; /* used to read status desc here */
1197 u32 consumer = recv_ctx->status_rx_consumer;
1199 int count = 0, ring;
1201 DPRINTK(INFO, "procesing receive\n");
1203 * we assume in this case that there is only one port and that is
1204 * port #1...changes need to be done in firmware to indicate port
1205 * number as part of the descriptor. This way we will be able to get
1206 * the netdev which is associated with that device.
1208 while (count < max) {
1209 desc = &desc_head[consumer];
1210 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
1211 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1212 netxen_get_sts_owner(desc));
1215 netxen_process_rcv(adapter, ctxid, desc);
1216 netxen_clear_sts_owner(desc);
1217 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
1218 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1222 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
1223 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
1227 /* update the consumer index in phantom */
1229 adapter->stats.process_rcv++;
1230 recv_ctx->status_rx_consumer = consumer;
1231 recv_ctx->status_rx_producer = producer;
1235 NETXEN_CRB_NORMALIZE(adapter,
1236 recv_crb_registers[ctxid].
1237 crb_rcv_status_consumer));
1243 /* Process Command status ring */
1244 int netxen_process_cmd_ring(unsigned long data)
1248 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
1251 struct netxen_cmd_buffer *buffer;
1252 struct netxen_port *port; /* port #1 */
1253 struct netxen_port *nport;
1254 struct pci_dev *pdev;
1255 struct netxen_skb_frag *frag;
1257 struct sk_buff *skb = NULL;
1261 spin_lock(&adapter->tx_lock);
1262 last_consumer = adapter->last_cmd_consumer;
1263 DPRINTK(INFO, "procesing xmit complete\n");
1264 /* we assume in this case that there is only one port and that is
1265 * port #1...changes need to be done in firmware to indicate port
1266 * number as part of the descriptor. This way we will be able to get
1267 * the netdev which is associated with that device.
1270 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1271 if (last_consumer == consumer) { /* Ring is empty */
1272 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
1273 last_consumer, consumer);
1274 spin_unlock(&adapter->tx_lock);
1278 adapter->proc_cmd_buf_counter++;
1279 adapter->stats.process_xmit++;
1281 * Not needed - does not seem to be used anywhere.
1282 * adapter->cmd_consumer = consumer;
1284 spin_unlock(&adapter->tx_lock);
1286 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
1287 buffer = &adapter->cmd_buf_arr[last_consumer];
1288 port = adapter->port[buffer->port];
1290 frag = &buffer->frag_array[0];
1292 if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
1293 pci_unmap_single(pdev, frag->dma, frag->length,
1295 for (i = 1; i < buffer->frag_count; i++) {
1296 DPRINTK(INFO, "getting fragment no %d\n", i);
1297 frag++; /* Get the next frag */
1298 pci_unmap_page(pdev, frag->dma, frag->length,
1302 port->stats.skbfreed++;
1303 dev_kfree_skb_any(skb);
1305 } else if (adapter->proc_cmd_buf_counter == 1) {
1306 port->stats.txnullskb++;
1308 if (unlikely(netif_queue_stopped(port->netdev)
1309 && netif_carrier_ok(port->netdev))
1310 && ((jiffies - port->netdev->trans_start) >
1311 port->netdev->watchdog_timeo)) {
1312 SCHEDULE_WORK(&port->tx_timeout_task);
1315 last_consumer = get_next_index(last_consumer,
1316 adapter->max_tx_desc_count);
1319 adapter->stats.noxmitdone += count1;
1322 spin_lock(&adapter->tx_lock);
1323 if ((--adapter->proc_cmd_buf_counter) == 0) {
1324 adapter->last_cmd_consumer = last_consumer;
1325 while ((adapter->last_cmd_consumer != consumer)
1326 && (count2 < MAX_STATUS_HANDLE)) {
1328 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
1333 adapter->last_cmd_consumer =
1334 get_next_index(adapter->last_cmd_consumer,
1335 adapter->max_tx_desc_count);
1338 if (count1 || count2) {
1339 for (p = 0; p < adapter->ahw.max_ports; p++) {
1340 nport = adapter->port[p];
1341 if (netif_queue_stopped(nport->netdev)
1342 && (nport->flags & NETXEN_NETDEV_STATUS)) {
1343 netif_wake_queue(nport->netdev);
1344 nport->flags &= ~NETXEN_NETDEV_STATUS;
1349 * If everything is freed up to consumer then check if the ring is full
1350 * If the ring is full then check if more needs to be freed and
1351 * schedule the call back again.
1353 * This happens when there are 2 CPUs. One could be freeing and the
1354 * other filling it. If the ring is full when we get out of here and
1355 * the card has already interrupted the host then the host can miss the
1358 * There is still a possible race condition and the host could miss an
1359 * interrupt. The card has to take care of this.
1361 if (adapter->last_cmd_consumer == consumer &&
1362 (((adapter->cmd_producer + 1) %
1363 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
1364 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1366 done = (adapter->last_cmd_consumer == consumer);
1368 spin_unlock(&adapter->tx_lock);
1369 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1375 * netxen_post_rx_buffers puts buffer in the Phantom memory
1377 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1379 struct pci_dev *pdev = adapter->ahw.pdev;
1380 struct sk_buff *skb;
1381 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1382 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1384 struct rcv_desc *pdesc;
1385 struct netxen_rx_buffer *buffer;
1388 netxen_ctx_msg msg = 0;
1391 adapter->stats.post_called++;
1392 rcv_desc = &recv_ctx->rcv_desc[ringid];
1394 producer = rcv_desc->producer;
1395 index = rcv_desc->begin_alloc;
1396 buffer = &rcv_desc->rx_buf_arr[index];
1397 /* We can start writing rx descriptors into the phantom memory. */
1398 while (buffer->state == NETXEN_BUFFER_FREE) {
1399 skb = dev_alloc_skb(rcv_desc->skb_size);
1400 if (unlikely(!skb)) {
1403 * We need to schedule the posting of buffers to the pegs.
1405 rcv_desc->begin_alloc = index;
1406 DPRINTK(ERR, "netxen_post_rx_buffers: "
1407 " allocated only %d buffers\n", count);
1411 count++; /* now there should be no failure */
1412 pdesc = &rcv_desc->desc_head[producer];
1414 #if defined(XGB_DEBUG)
1415 *(unsigned long *)(skb->head) = 0xc0debabe;
1416 if (skb_is_nonlinear(skb)) {
1417 printk("Allocated SKB @%p is nonlinear\n");
1420 skb_reserve(skb, 2);
1421 /* This will be setup when we receive the
1422 * buffer after it has been filled FSL TBD TBD
1423 * skb->dev = netdev;
1425 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1426 PCI_DMA_FROMDEVICE);
1427 pdesc->addr_buffer = cpu_to_le64(dma);
1429 buffer->state = NETXEN_BUFFER_BUSY;
1431 /* make a rcv descriptor */
1432 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1433 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1434 DPRINTK(INFO, "done writing descripter\n");
1436 get_next_index(producer, rcv_desc->max_rx_desc_count);
1437 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1438 buffer = &rcv_desc->rx_buf_arr[index];
1440 /* if we did allocate buffers, then write the count to Phantom */
1442 rcv_desc->begin_alloc = index;
1443 rcv_desc->rcv_pending += count;
1444 adapter->stats.lastposted = count;
1445 adapter->stats.posted += count;
1446 rcv_desc->producer = producer;
1447 if (rcv_desc->rcv_free >= 32) {
1448 rcv_desc->rcv_free = 0;
1450 writel((producer - 1) &
1451 (rcv_desc->max_rx_desc_count - 1),
1452 NETXEN_CRB_NORMALIZE(adapter,
1453 recv_crb_registers[0].
1454 rcv_desc_crb[ringid].
1455 crb_rcv_producer_offset));
1457 * Write a doorbell msg to tell phanmon of change in
1458 * receive ring producer
1460 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1461 netxen_set_msg_privid(msg);
1462 netxen_set_msg_count(msg,
1465 max_rx_desc_count - 1)));
1466 netxen_set_msg_ctxid(msg, 0);
1467 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1469 DB_NORMALIZE(adapter,
1470 NETXEN_RCV_PRODUCER_OFFSET));
1475 void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
1478 struct pci_dev *pdev = adapter->ahw.pdev;
1479 struct sk_buff *skb;
1480 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1481 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1483 struct rcv_desc *pdesc;
1484 struct netxen_rx_buffer *buffer;
1488 adapter->stats.post_called++;
1489 rcv_desc = &recv_ctx->rcv_desc[ringid];
1491 producer = rcv_desc->producer;
1492 index = rcv_desc->begin_alloc;
1493 buffer = &rcv_desc->rx_buf_arr[index];
1494 /* We can start writing rx descriptors into the phantom memory. */
1495 while (buffer->state == NETXEN_BUFFER_FREE) {
1496 skb = dev_alloc_skb(rcv_desc->skb_size);
1497 if (unlikely(!skb)) {
1499 * We need to schedule the posting of buffers to the pegs.
1501 rcv_desc->begin_alloc = index;
1502 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1503 " allocated only %d buffers\n", count);
1506 count++; /* now there should be no failure */
1507 pdesc = &rcv_desc->desc_head[producer];
1508 skb_reserve(skb, 2);
1510 * This will be setup when we receive the
1511 * buffer after it has been filled
1512 * skb->dev = netdev;
1515 buffer->state = NETXEN_BUFFER_BUSY;
1516 buffer->dma = pci_map_single(pdev, skb->data,
1518 PCI_DMA_FROMDEVICE);
1520 /* make a rcv descriptor */
1521 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1522 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1523 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1524 DPRINTK(INFO, "done writing descripter\n");
1526 get_next_index(producer, rcv_desc->max_rx_desc_count);
1527 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1528 buffer = &rcv_desc->rx_buf_arr[index];
1531 /* if we did allocate buffers, then write the count to Phantom */
1533 rcv_desc->begin_alloc = index;
1534 rcv_desc->rcv_pending += count;
1535 adapter->stats.lastposted = count;
1536 adapter->stats.posted += count;
1537 rcv_desc->producer = producer;
1538 if (rcv_desc->rcv_free >= 32) {
1539 rcv_desc->rcv_free = 0;
1541 writel((producer - 1) &
1542 (rcv_desc->max_rx_desc_count - 1),
1543 NETXEN_CRB_NORMALIZE(adapter,
1544 recv_crb_registers[0].
1545 rcv_desc_crb[ringid].
1546 crb_rcv_producer_offset));
1552 int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1554 if (find_diff_among(adapter->last_cmd_consumer,
1555 adapter->cmd_producer,
1556 adapter->max_tx_desc_count) > 0)
1563 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1565 struct netxen_port *port;
1568 memset(&adapter->stats, 0, sizeof(adapter->stats));
1569 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
1570 port = adapter->port[port_num];
1571 memset(&port->stats, 0, sizeof(port->stats));