1 /* linux/drivers/spi/spi_s3c24xx.c
3 * Copyright (c) 2006 Ben Dooks
4 * Copyright (c) 2006 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
16 #include <linux/config.h>
17 #include <linux/init.h>
18 #include <linux/spinlock.h>
19 #include <linux/workqueue.h>
20 #include <linux/interrupt.h>
21 #include <linux/delay.h>
22 #include <linux/errno.h>
23 #include <linux/err.h>
24 #include <linux/clk.h>
25 #include <linux/platform_device.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/spi_bitbang.h>
32 #include <asm/hardware.h>
34 #include <asm/arch/regs-gpio.h>
35 #include <asm/arch/regs-spi.h>
36 #include <asm/arch/spi.h>
39 /* bitbang has to be first */
40 struct spi_bitbang bitbang;
41 struct completion done;
49 const unsigned char *tx;
53 struct resource *ioarea;
54 struct spi_master *master;
55 struct spi_device *curdev;
57 struct s3c2410_spi_info *pdata;
60 #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT)
61 #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP)
63 static inline struct s3c24xx_spi *to_hw(struct spi_device *sdev)
65 return spi_master_get_devdata(sdev->master);
68 static void s3c24xx_spi_chipsel(struct spi_device *spi, int value)
70 struct s3c24xx_spi *hw = to_hw(spi);
71 unsigned int cspol = spi->mode & SPI_CS_HIGH ? 1 : 0;
75 case BITBANG_CS_INACTIVE:
76 if (hw->pdata->set_cs)
77 hw->pdata->set_cs(hw->pdata, value, cspol);
79 s3c2410_gpio_setpin(hw->pdata->pin_cs, cspol ^ 1);
82 case BITBANG_CS_ACTIVE:
83 spcon = readb(hw->regs + S3C2410_SPCON);
85 if (spi->mode & SPI_CPHA)
86 spcon |= S3C2410_SPCON_CPHA_FMTB;
88 spcon &= ~S3C2410_SPCON_CPHA_FMTB;
90 if (spi->mode & SPI_CPOL)
91 spcon |= S3C2410_SPCON_CPOL_HIGH;
93 spcon &= ~S3C2410_SPCON_CPOL_HIGH;
95 spcon |= S3C2410_SPCON_ENSCK;
97 /* write new configration */
99 writeb(spcon, hw->regs + S3C2410_SPCON);
101 if (hw->pdata->set_cs)
102 hw->pdata->set_cs(hw->pdata, value, cspol);
104 s3c2410_gpio_setpin(hw->pdata->pin_cs, cspol);
111 static int s3c24xx_spi_setupxfer(struct spi_device *spi,
112 struct spi_transfer *t)
114 struct s3c24xx_spi *hw = to_hw(spi);
119 bpw = t ? t->bits_per_word : spi->bits_per_word;
120 hz = t ? t->speed_hz : spi->max_speed_hz;
123 dev_err(&spi->dev, "invalid bits-per-word (%d)\n", bpw);
127 div = clk_get_rate(hw->clk) / hz;
129 /* is clk = pclk / (2 * (pre+1)), or is it
130 * clk = (pclk * 2) / ( pre + 1) */
140 dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz);
141 writeb(div, hw->regs + S3C2410_SPPRE);
143 spin_lock(&hw->bitbang.lock);
144 if (!hw->bitbang.busy) {
145 hw->bitbang.chipselect(spi, BITBANG_CS_INACTIVE);
146 /* need to ndelay for 0.5 clocktick ? */
148 spin_unlock(&hw->bitbang.lock);
153 static int s3c24xx_spi_setup(struct spi_device *spi)
157 if (!spi->bits_per_word)
158 spi->bits_per_word = 8;
160 if ((spi->mode & SPI_LSB_FIRST) != 0)
163 ret = s3c24xx_spi_setupxfer(spi, NULL);
165 dev_err(&spi->dev, "setupxfer returned %d\n", ret);
169 dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n",
170 __FUNCTION__, spi->mode, spi->bits_per_word,
176 static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count)
178 return hw->tx ? hw->tx[count] : 0xff;
181 static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
183 struct s3c24xx_spi *hw = to_hw(spi);
185 dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
186 t->tx_buf, t->rx_buf, t->len);
193 /* send the first byte */
194 writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
195 wait_for_completion(&hw->done);
200 static irqreturn_t s3c24xx_spi_irq(int irq, void *dev, struct pt_regs *regs)
202 struct s3c24xx_spi *hw = dev;
203 unsigned int spsta = readb(hw->regs + S3C2410_SPSTA);
204 unsigned int count = hw->count;
206 if (spsta & S3C2410_SPSTA_DCOL) {
207 dev_dbg(hw->dev, "data-collision\n");
212 if (!(spsta & S3C2410_SPSTA_READY)) {
213 dev_dbg(hw->dev, "spi not ready for tx?\n");
221 hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
226 writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
234 static int s3c24xx_spi_probe(struct platform_device *pdev)
236 struct s3c24xx_spi *hw;
237 struct spi_master *master;
238 struct spi_board_info *bi;
239 struct resource *res;
243 master = spi_alloc_master(&pdev->dev, sizeof(struct s3c24xx_spi));
244 if (master == NULL) {
245 dev_err(&pdev->dev, "No memory for spi_master\n");
250 hw = spi_master_get_devdata(master);
251 memset(hw, 0, sizeof(struct s3c24xx_spi));
253 hw->master = spi_master_get(master);
254 hw->pdata = pdev->dev.platform_data;
255 hw->dev = &pdev->dev;
257 if (hw->pdata == NULL) {
258 dev_err(&pdev->dev, "No platform data supplied\n");
263 platform_set_drvdata(pdev, hw);
264 init_completion(&hw->done);
266 /* setup the state for the bitbang driver */
268 hw->bitbang.master = hw->master;
269 hw->bitbang.setup_transfer = s3c24xx_spi_setupxfer;
270 hw->bitbang.chipselect = s3c24xx_spi_chipsel;
271 hw->bitbang.txrx_bufs = s3c24xx_spi_txrx;
272 hw->bitbang.master->setup = s3c24xx_spi_setup;
274 dev_dbg(hw->dev, "bitbang at %p\n", &hw->bitbang);
276 /* find and map our resources */
278 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
280 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
285 hw->ioarea = request_mem_region(res->start, (res->end - res->start)+1,
288 if (hw->ioarea == NULL) {
289 dev_err(&pdev->dev, "Cannot reserve region\n");
294 hw->regs = ioremap(res->start, (res->end - res->start)+1);
295 if (hw->regs == NULL) {
296 dev_err(&pdev->dev, "Cannot map IO\n");
301 hw->irq = platform_get_irq(pdev, 0);
303 dev_err(&pdev->dev, "No IRQ specified\n");
308 err = request_irq(hw->irq, s3c24xx_spi_irq, 0, pdev->name, hw);
310 dev_err(&pdev->dev, "Cannot claim IRQ\n");
314 hw->clk = clk_get(&pdev->dev, "spi");
315 if (IS_ERR(hw->clk)) {
316 dev_err(&pdev->dev, "No clock for device\n");
317 err = PTR_ERR(hw->clk);
321 /* for the moment, permanently enable the clock */
325 /* program defaults into the registers */
327 writeb(0xff, hw->regs + S3C2410_SPPRE);
328 writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
329 writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
331 /* setup any gpio we can */
333 if (!hw->pdata->set_cs) {
334 s3c2410_gpio_setpin(hw->pdata->pin_cs, 1);
335 s3c2410_gpio_cfgpin(hw->pdata->pin_cs, S3C2410_GPIO_OUTPUT);
338 /* register our spi controller */
340 err = spi_bitbang_start(&hw->bitbang);
342 dev_err(&pdev->dev, "Failed to register SPI master\n");
346 dev_dbg(hw->dev, "shutdown=%d\n", hw->bitbang.shutdown);
348 /* register all the devices associated */
350 bi = &hw->pdata->board_info[0];
351 for (i = 0; i < hw->pdata->board_size; i++, bi++) {
352 dev_info(hw->dev, "registering %s\n", bi->modalias);
354 bi->controller_data = hw;
355 spi_new_device(master, bi);
361 clk_disable(hw->clk);
365 free_irq(hw->irq, hw);
371 release_resource(hw->ioarea);
376 spi_master_put(hw->master);;
382 static int s3c24xx_spi_remove(struct platform_device *dev)
384 struct s3c24xx_spi *hw = platform_get_drvdata(dev);
386 platform_set_drvdata(dev, NULL);
388 spi_unregister_master(hw->master);
390 clk_disable(hw->clk);
393 free_irq(hw->irq, hw);
396 release_resource(hw->ioarea);
399 spi_master_put(hw->master);
406 static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg)
408 struct s3c24xx_spi *hw = platform_get_drvdata(dev);
410 clk_disable(hw->clk);
414 static int s3c24xx_spi_resume(struct platform_device *pdev)
416 struct s3c24xx_spi *hw = platform_get_drvdata(dev);
423 #define s3c24xx_spi_suspend NULL
424 #define s3c24xx_spi_resume NULL
427 static struct platform_driver s3c24xx_spidrv = {
428 .probe = s3c24xx_spi_probe,
429 .remove = s3c24xx_spi_remove,
430 .suspend = s3c24xx_spi_suspend,
431 .resume = s3c24xx_spi_resume,
433 .name = "s3c2410-spi",
434 .owner = THIS_MODULE,
438 static int __init s3c24xx_spi_init(void)
440 return platform_driver_register(&s3c24xx_spidrv);
443 static void __exit s3c24xx_spi_exit(void)
445 platform_driver_unregister(&s3c24xx_spidrv);
448 module_init(s3c24xx_spi_init);
449 module_exit(s3c24xx_spi_exit);
451 MODULE_DESCRIPTION("S3C24XX SPI Driver");
452 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
453 MODULE_LICENSE("GPL");