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   1 /*
   2  * MPC8313E RDB Device Tree Source
   3  *
   4  * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8313ERDB";
  14         compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 PowerPC,8313@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         d-cache-line-size = <20>;       // 32 bytes
  26                         i-cache-line-size = <20>;       // 32 bytes
  27                         d-cache-size = <4000>;          // L1, 16K
  28                         i-cache-size = <4000>;          // L1, 16K
  29                         timebase-frequency = <0>;       // from bootloader
  30                         bus-frequency = <0>;            // from bootloader
  31                         clock-frequency = <0>;          // from bootloader
  32                         32-bit;
  33                 };
  34         };
  35
  36         memory {
  37                 device_type = "memory";
  38                 reg = <00000000 08000000>;      // 128MB at 0
  39         };
  40
  41         soc8313@e0000000 {
  42                 #address-cells = <1>;
  43                 #size-cells = <1>;
  44                 #interrupt-cells = <2>;
  45                 device_type = "soc";
  46                 ranges = <0 e0000000 00100000>;
  47                 reg = <e0000000 00000200>;
  48                 bus-frequency = <0>;
  49
  50                 wdt@200 {
  51                         device_type = "watchdog";
  52                         compatible = "mpc83xx_wdt";
  53                         reg = <200 100>;
  54                 };
  55
  56                 i2c@3000 {
  57                         device_type = "i2c";
  58                         compatible = "fsl-i2c";
  59                         reg = <3000 100>;
  60                         interrupts = <e 8>;
  61                         interrupt-parent = < &ipic >;
  62                         dfsrr;
  63                 };
  64
  65                 i2c@3100 {
  66                         device_type = "i2c";
  67                         compatible = "fsl-i2c";
  68                         reg = <3100 100>;
  69                         interrupts = <f 8>;
  70                         interrupt-parent = < &ipic >;
  71                         dfsrr;
  72                 };
  73
  74                 spi@7000 {
  75                         device_type = "spi";
  76                         compatible = "mpc83xx_spi";
  77                         reg = <7000 1000>;
  78                         interrupts = <10 8>;
  79                         interrupt-parent = < &ipic >;
  80                         mode = <0>;
  81                 };
  82
  83                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  84                 usb@23000 {
  85                         device_type = "usb";
  86                         compatible = "fsl-usb2-dr";
  87                         reg = <23000 1000>;
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         interrupt-parent = < &ipic >;
  91                         interrupts = <26 8>;
  92                         phy_type = "utmi_wide";
  93                 };
  94
  95                 mdio@24520 {
  96                         device_type = "mdio";
  97                         compatible = "gianfar";
  98                         reg = <24520 20>;
  99                         #address-cells = <1>;
 100                         #size-cells = <0>;
 101                         phy1: ethernet-phy@1 {
 102                                 interrupt-parent = < &ipic >;
 103                                 interrupts = <13 8>;
 104                                 reg = <1>;
 105                                 device_type = "ethernet-phy";
 106                         };
 107                         phy4: ethernet-phy@4 {
 108                                 interrupt-parent = < &ipic >;
 109                                 interrupts = <14 8>;
 110                                 reg = <4>;
 111                                 device_type = "ethernet-phy";
 112                         };
 113                 };
 114
 115                 ethernet@24000 {
 116                         device_type = "network";
 117                         model = "eTSEC";
 118                         compatible = "gianfar";
 119                         reg = <24000 1000>;
 120                         local-mac-address = [ 00 00 00 00 00 00 ];
 121                         interrupts = <25 8 24 8 23 8>;
 122                         interrupt-parent = < &ipic >;
 123                         phy-handle = < &phy1 >;
 124                 };
 125
 126                 ethernet@25000 {
 127                         device_type = "network";
 128                         model = "eTSEC";
 129                         compatible = "gianfar";
 130                         reg = <25000 1000>;
 131                         local-mac-address = [ 00 00 00 00 00 00 ];
 132                         interrupts = <22 8 21 8 20 8>;
 133                         interrupt-parent = < &ipic >;
 134                         phy-handle = < &phy4 >;
 135                 };
 136
 137                 serial@4500 {
 138                         device_type = "serial";
 139                         compatible = "ns16550";
 140                         reg = <4500 100>;
 141                         clock-frequency = <0>;
 142                         interrupts = <9 8>;
 143                         interrupt-parent = < &ipic >;
 144                 };
 145
 146                 serial@4600 {
 147                         device_type = "serial";
 148                         compatible = "ns16550";
 149                         reg = <4600 100>;
 150                         clock-frequency = <0>;
 151                         interrupts = <a 8>;
 152                         interrupt-parent = < &ipic >;
 153                 };
 154
 155                 pci@8500 {
 156                         interrupt-map-mask = <f800 0 0 7>;
 157                         interrupt-map = <
 158
 159                                         /* IDSEL 0x0E -mini PCI */
 160                                          7000 0 0 1 &ipic 12 8
 161                                          7000 0 0 2 &ipic 12 8
 162                                          7000 0 0 3 &ipic 12 8
 163                                          7000 0 0 4 &ipic 12 8
 164
 165                                         /* IDSEL 0x0F - PCI slot */
 166                                          7800 0 0 1 &ipic 11 8
 167                                          7800 0 0 2 &ipic 12 8
 168                                          7800 0 0 3 &ipic 11 8
 169                                          7800 0 0 4 &ipic 12 8>;
 170                         interrupt-parent = < &ipic >;
 171                         interrupts = <42 8>;
 172                         bus-range = <0 0>;
 173                         ranges = <02000000 0 90000000 90000000 0 10000000
 174                                   42000000 0 80000000 80000000 0 10000000
 175                                   01000000 0 00000000 e2000000 0 00100000>;
 176                         clock-frequency = <3f940aa>;
 177                         #interrupt-cells = <1>;
 178                         #size-cells = <2>;
 179                         #address-cells = <3>;
 180                         reg = <8500 100>;
 181                         compatible = "83xx";
 182                         device_type = "pci";
 183                 };
 184
 185                 crypto@30000 {
 186                         device_type = "crypto";
 187                         model = "SEC2";
 188                         compatible = "talitos";
 189                         reg = <30000 7000>;
 190                         interrupts = <b 8>;
 191                         interrupt-parent = < &ipic >;
 192                         /* Rev. 2.2 */
 193                         num-channels = <1>;
 194                         channel-fifo-len = <18>;
 195                         exec-units-mask = <0000004c>;
 196                         descriptor-types-mask = <0122003f>;
 197                 };
 198
 199                 /* IPIC
 200                  * interrupts cell = <intr #, sense>
 201                  * sense values match linux IORESOURCE_IRQ_* defines:
 202                  * sense == 8: Level, low assertion
 203                  * sense == 2: Edge, high-to-low change
 204                  */
 205                 ipic: pic@700 {
 206                         interrupt-controller;
 207                         #address-cells = <0>;
 208                         #interrupt-cells = <2>;
 209                         reg = <700 100>;
 210                         built-in;
 211                         device_type = "ipic";
 212                 };
 213         };
 214 };