2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIP report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Andi Kleen : Changed for SMP boot into long mode.
33 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
34 * Andi Kleen : Converted to new state machine.
36 * Probably mostly hotplug CPU ready now.
37 * Ashok Raj : CPU hotplug support
41 #include <linux/init.h>
44 #include <linux/kernel_stat.h>
45 #include <linux/smp_lock.h>
46 #include <linux/bootmem.h>
47 #include <linux/thread_info.h>
48 #include <linux/module.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <linux/smp.h>
54 #include <asm/pgalloc.h>
56 #include <asm/kdebug.h>
57 #include <asm/tlbflush.h>
58 #include <asm/proto.h>
61 #include <asm/hw_irq.h>
63 #include <asm/genapic.h>
65 /* Number of siblings per CPU package */
66 int smp_num_siblings = 1;
67 EXPORT_SYMBOL(smp_num_siblings);
69 /* Last level cache ID of each logical CPU */
70 u8 cpu_llc_id[NR_CPUS] __cpuinitdata = {[0 ... NR_CPUS-1] = BAD_APICID};
71 EXPORT_SYMBOL(cpu_llc_id);
73 /* Bitmask of currently online CPUs */
74 cpumask_t cpu_online_map __read_mostly;
76 EXPORT_SYMBOL(cpu_online_map);
79 * Private maps to synchronize booting between AP and BP.
80 * Probably not needed anymore, but it makes for easier debugging. -AK
82 cpumask_t cpu_callin_map;
83 cpumask_t cpu_callout_map;
84 EXPORT_SYMBOL(cpu_callout_map);
86 cpumask_t cpu_possible_map;
87 EXPORT_SYMBOL(cpu_possible_map);
89 /* Per CPU bogomips and other parameters */
90 struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
91 EXPORT_SYMBOL(cpu_data);
93 /* Set when the idlers are all forked */
94 int smp_threads_ready;
96 /* representing HT siblings of each logical CPU */
97 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
98 EXPORT_SYMBOL(cpu_sibling_map);
100 /* representing HT and core siblings of each logical CPU */
101 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
102 EXPORT_SYMBOL(cpu_core_map);
105 * Trampoline 80x86 program as an array.
108 extern unsigned char trampoline_data[];
109 extern unsigned char trampoline_end[];
111 /* State of each CPU */
112 DEFINE_PER_CPU(int, cpu_state) = { 0 };
115 * Store all idle threads, this can be reused instead of creating
116 * a new thread. Also avoids complicated thread destroy functionality
119 struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
121 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
122 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
125 * Currently trivial. Write the real->protected mode
126 * bootstrap into the page concerned. The caller
127 * has made sure it's suitably aligned.
130 static unsigned long __cpuinit setup_trampoline(void)
132 void *tramp = __va(SMP_TRAMPOLINE_BASE);
133 memcpy(tramp, trampoline_data, trampoline_end - trampoline_data);
134 return virt_to_phys(tramp);
138 * The bootstrap kernel entry code has set these up. Save them for
142 static void __cpuinit smp_store_cpu_info(int id)
144 struct cpuinfo_x86 *c = cpu_data + id;
151 static atomic_t init_deasserted __cpuinitdata;
154 * Report back to the Boot Processor.
157 void __cpuinit smp_callin(void)
160 unsigned long timeout;
163 * If waken up by an INIT in an 82489DX configuration
164 * we may get here before an INIT-deassert IPI reaches
165 * our local APIC. We have to wait for the IPI or we'll
166 * lock up on an APIC access.
168 while (!atomic_read(&init_deasserted))
172 * (This works even if the APIC is not enabled.)
174 phys_id = GET_APIC_ID(apic_read(APIC_ID));
175 cpuid = smp_processor_id();
176 if (cpu_isset(cpuid, cpu_callin_map)) {
177 panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
180 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
183 * STARTUP IPIs are fragile beasts as they might sometimes
184 * trigger some glue motherboard logic. Complete APIC bus
185 * silence for 1 second, this overestimates the time the
186 * boot CPU is spending to send the up to 2 STARTUP IPIs
187 * by a factor of two. This should be enough.
191 * Waiting 2s total for startup (udelay is not yet working)
193 timeout = jiffies + 2*HZ;
194 while (time_before(jiffies, timeout)) {
196 * Has the boot CPU finished it's STARTUP sequence?
198 if (cpu_isset(cpuid, cpu_callout_map))
203 if (!time_before(jiffies, timeout)) {
204 panic("smp_callin: CPU%d started up but did not get a callout!\n",
209 * the boot CPU has finished the init stage and is spinning
210 * on callin_map until we finish. We are free to set up this
211 * CPU, first the APIC. (this is probably redundant on most
215 Dprintk("CALLIN, before setup_local_APIC().\n");
221 * Need to enable IRQs because it can take longer and then
222 * the NMI watchdog might kill us.
227 Dprintk("Stack at about %p\n",&cpuid);
229 disable_APIC_timer();
232 * Save our processor parameters
234 smp_store_cpu_info(cpuid);
237 * Allow the master to continue.
239 cpu_set(cpuid, cpu_callin_map);
242 /* maps the cpu to the sched domain representing multi-core */
243 cpumask_t cpu_coregroup_map(int cpu)
245 struct cpuinfo_x86 *c = cpu_data + cpu;
247 * For perf, we return last level cache shared map.
248 * And for power savings, we return cpu_core_map
250 if (sched_mc_power_savings || sched_smt_power_savings)
251 return cpu_core_map[cpu];
253 return c->llc_shared_map;
256 /* representing cpus for which sibling maps can be computed */
257 static cpumask_t cpu_sibling_setup_map;
259 static inline void set_cpu_sibling_map(int cpu)
262 struct cpuinfo_x86 *c = cpu_data;
264 cpu_set(cpu, cpu_sibling_setup_map);
266 if (smp_num_siblings > 1) {
267 for_each_cpu_mask(i, cpu_sibling_setup_map) {
268 if (c[cpu].phys_proc_id == c[i].phys_proc_id &&
269 c[cpu].cpu_core_id == c[i].cpu_core_id) {
270 cpu_set(i, cpu_sibling_map[cpu]);
271 cpu_set(cpu, cpu_sibling_map[i]);
272 cpu_set(i, cpu_core_map[cpu]);
273 cpu_set(cpu, cpu_core_map[i]);
274 cpu_set(i, c[cpu].llc_shared_map);
275 cpu_set(cpu, c[i].llc_shared_map);
279 cpu_set(cpu, cpu_sibling_map[cpu]);
282 cpu_set(cpu, c[cpu].llc_shared_map);
284 if (current_cpu_data.x86_max_cores == 1) {
285 cpu_core_map[cpu] = cpu_sibling_map[cpu];
286 c[cpu].booted_cores = 1;
290 for_each_cpu_mask(i, cpu_sibling_setup_map) {
291 if (cpu_llc_id[cpu] != BAD_APICID &&
292 cpu_llc_id[cpu] == cpu_llc_id[i]) {
293 cpu_set(i, c[cpu].llc_shared_map);
294 cpu_set(cpu, c[i].llc_shared_map);
296 if (c[cpu].phys_proc_id == c[i].phys_proc_id) {
297 cpu_set(i, cpu_core_map[cpu]);
298 cpu_set(cpu, cpu_core_map[i]);
300 * Does this new cpu bringup a new core?
302 if (cpus_weight(cpu_sibling_map[cpu]) == 1) {
304 * for each core in package, increment
305 * the booted_cores for this new cpu
307 if (first_cpu(cpu_sibling_map[i]) == i)
308 c[cpu].booted_cores++;
310 * increment the core count for all
311 * the other cpus in this package
315 } else if (i != cpu && !c[cpu].booted_cores)
316 c[cpu].booted_cores = c[i].booted_cores;
322 * Setup code on secondary processor (after comming out of the trampoline)
324 void __cpuinit start_secondary(void)
327 * Dont put anything before smp_callin(), SMP
328 * booting is too fragile that we want to limit the
329 * things done here to the most necessary things.
335 /* otherwise gcc will move up the smp_processor_id before the cpu_init */
339 * Check TSC sync first:
341 check_tsc_sync_target();
343 Dprintk("cpu %d: setting up apic clock\n", smp_processor_id());
344 setup_secondary_APIC_clock();
346 Dprintk("cpu %d: enabling apic timer\n", smp_processor_id());
348 if (nmi_watchdog == NMI_IO_APIC) {
349 disable_8259A_irq(0);
350 enable_NMI_through_LVT0(NULL);
357 * The sibling maps must be set before turing the online map on for
360 set_cpu_sibling_map(smp_processor_id());
363 * We need to hold call_lock, so there is no inconsistency
364 * between the time smp_call_function() determines number of
365 * IPI receipients, and the time when the determination is made
366 * for which cpus receive the IPI in genapic_flat.c. Holding this
367 * lock helps us to not include this cpu in a currently in progress
368 * smp_call_function().
370 lock_ipi_call_lock();
371 spin_lock(&vector_lock);
373 /* Setup the per cpu irq handling data structures */
374 __setup_vector_irq(smp_processor_id());
376 * Allow the master to continue.
378 cpu_set(smp_processor_id(), cpu_online_map);
379 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
380 spin_unlock(&vector_lock);
382 unlock_ipi_call_lock();
387 extern volatile unsigned long init_rsp;
388 extern void (*initial_code)(void);
391 static void inquire_remote_apic(int apicid)
393 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
394 char *names[] = { "ID", "VERSION", "SPIV" };
397 printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
399 for (i = 0; i < sizeof(regs) / sizeof(*regs); i++) {
400 printk("... APIC #%d %s: ", apicid, names[i]);
405 apic_wait_icr_idle();
407 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
408 apic_write(APIC_ICR, APIC_DM_REMRD | regs[i]);
413 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
414 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
417 case APIC_ICR_RR_VALID:
418 status = apic_read(APIC_RRR);
419 printk("%08x\n", status);
429 * Kick the secondary to wake up.
431 static int __cpuinit wakeup_secondary_via_INIT(int phys_apicid, unsigned int start_rip)
433 unsigned long send_status = 0, accept_status = 0;
434 int maxlvt, timeout, num_starts, j;
436 Dprintk("Asserting INIT.\n");
439 * Turn INIT on target chip
441 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
446 apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
449 Dprintk("Waiting for send to finish...\n");
454 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
455 } while (send_status && (timeout++ < 1000));
459 Dprintk("Deasserting INIT.\n");
462 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
465 apic_write(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
467 Dprintk("Waiting for send to finish...\n");
472 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
473 } while (send_status && (timeout++ < 1000));
476 atomic_set(&init_deasserted, 1);
481 * Run STARTUP IPI loop.
483 Dprintk("#startup loops: %d.\n", num_starts);
485 maxlvt = get_maxlvt();
487 for (j = 1; j <= num_starts; j++) {
488 Dprintk("Sending STARTUP #%d.\n",j);
489 apic_write(APIC_ESR, 0);
491 Dprintk("After apic_write.\n");
498 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
500 /* Boot on the stack */
501 /* Kick the second */
502 apic_write(APIC_ICR, APIC_DM_STARTUP | (start_rip >> 12));
505 * Give the other CPU some time to accept the IPI.
509 Dprintk("Startup point 1.\n");
511 Dprintk("Waiting for send to finish...\n");
516 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
517 } while (send_status && (timeout++ < 1000));
520 * Give the other CPU some time to accept the IPI.
524 * Due to the Pentium erratum 3AP.
527 apic_write(APIC_ESR, 0);
529 accept_status = (apic_read(APIC_ESR) & 0xEF);
530 if (send_status || accept_status)
533 Dprintk("After Startup.\n");
536 printk(KERN_ERR "APIC never delivered???\n");
538 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
540 return (send_status | accept_status);
544 struct work_struct work;
545 struct task_struct *idle;
546 struct completion done;
550 void do_fork_idle(struct work_struct *work)
552 struct create_idle *c_idle =
553 container_of(work, struct create_idle, work);
555 c_idle->idle = fork_idle(c_idle->cpu);
556 complete(&c_idle->done);
562 static int __cpuinit do_boot_cpu(int cpu, int apicid)
564 unsigned long boot_error;
566 unsigned long start_rip;
567 struct create_idle c_idle = {
568 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle),
570 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
573 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
574 if (!cpu_gdt_descr[cpu].address &&
575 !(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
576 printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
580 /* Allocate node local memory for AP pdas */
581 if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
582 struct x8664_pda *newpda, *pda;
583 int node = cpu_to_node(cpu);
585 newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
588 memcpy(newpda, pda, sizeof (struct x8664_pda));
589 cpu_pda(cpu) = newpda;
592 "Could not allocate node local PDA for CPU %d on node %d\n",
596 alternatives_smp_switch(1);
598 c_idle.idle = get_idle_for_cpu(cpu);
601 c_idle.idle->thread.rsp = (unsigned long) (((struct pt_regs *)
602 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
603 init_idle(c_idle.idle, cpu);
608 * During cold boot process, keventd thread is not spun up yet.
609 * When we do cpu hot-add, we create idle threads on the fly, we should
610 * not acquire any attributes from the calling context. Hence the clean
611 * way to create kernel_threads() is to do that from keventd().
612 * We do the current_is_keventd() due to the fact that ACPI notifier
613 * was also queuing to keventd() and when the caller is already running
614 * in context of keventd(), we would end up with locking up the keventd
617 if (!keventd_up() || current_is_keventd())
618 c_idle.work.func(&c_idle.work);
620 schedule_work(&c_idle.work);
621 wait_for_completion(&c_idle.done);
624 if (IS_ERR(c_idle.idle)) {
625 printk("failed fork for CPU %d\n", cpu);
626 return PTR_ERR(c_idle.idle);
629 set_idle_for_cpu(cpu, c_idle.idle);
633 cpu_pda(cpu)->pcurrent = c_idle.idle;
635 start_rip = setup_trampoline();
637 init_rsp = c_idle.idle->thread.rsp;
638 per_cpu(init_tss,cpu).rsp0 = init_rsp;
639 initial_code = start_secondary;
640 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
642 printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
643 cpus_weight(cpu_present_map),
647 * This grunge runs the startup process for
648 * the targeted processor.
651 atomic_set(&init_deasserted, 0);
653 Dprintk("Setting warm reset code and vector.\n");
655 CMOS_WRITE(0xa, 0xf);
658 *((volatile unsigned short *) phys_to_virt(0x469)) = start_rip >> 4;
660 *((volatile unsigned short *) phys_to_virt(0x467)) = start_rip & 0xf;
664 * Be paranoid about clearing APIC errors.
666 apic_write(APIC_ESR, 0);
670 * Status is now clean
675 * Starting actual IPI sequence...
677 boot_error = wakeup_secondary_via_INIT(apicid, start_rip);
681 * allow APs to start initializing.
683 Dprintk("Before Callout %d.\n", cpu);
684 cpu_set(cpu, cpu_callout_map);
685 Dprintk("After Callout %d.\n", cpu);
688 * Wait 5s total for a response
690 for (timeout = 0; timeout < 50000; timeout++) {
691 if (cpu_isset(cpu, cpu_callin_map))
692 break; /* It has booted */
696 if (cpu_isset(cpu, cpu_callin_map)) {
697 /* number CPUs logically, starting from 1 (BSP is 0) */
698 Dprintk("CPU has booted.\n");
701 if (*((volatile unsigned char *)phys_to_virt(SMP_TRAMPOLINE_BASE))
703 /* trampoline started but...? */
704 printk("Stuck ??\n");
706 /* trampoline code not run */
707 printk("Not responding.\n");
709 inquire_remote_apic(apicid);
714 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
715 clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */
716 clear_node_cpumask(cpu); /* was set by numa_add_cpu */
717 cpu_clear(cpu, cpu_present_map);
718 cpu_clear(cpu, cpu_possible_map);
719 x86_cpu_to_apicid[cpu] = BAD_APICID;
720 x86_cpu_to_log_apicid[cpu] = BAD_APICID;
727 cycles_t cacheflush_time;
728 unsigned long cache_decay_ticks;
731 * Cleanup possible dangling ends...
733 static __cpuinit void smp_cleanup_boot(void)
736 * Paranoid: Set warm reset code and vector here back
742 * Reset trampoline flag
744 *((volatile int *) phys_to_virt(0x467)) = 0;
748 * Fall back to non SMP mode after errors.
750 * RED-PEN audit/test this more. I bet there is more state messed up here.
752 static __init void disable_smp(void)
754 cpu_present_map = cpumask_of_cpu(0);
755 cpu_possible_map = cpumask_of_cpu(0);
756 if (smp_found_config)
757 phys_cpu_present_map = physid_mask_of_physid(boot_cpu_id);
759 phys_cpu_present_map = physid_mask_of_physid(0);
760 cpu_set(0, cpu_sibling_map[0]);
761 cpu_set(0, cpu_core_map[0]);
764 #ifdef CONFIG_HOTPLUG_CPU
766 int additional_cpus __initdata = -1;
769 * cpu_possible_map should be static, it cannot change as cpu's
770 * are onlined, or offlined. The reason is per-cpu data-structures
771 * are allocated by some modules at init time, and dont expect to
772 * do this dynamically on cpu arrival/departure.
773 * cpu_present_map on the other hand can change dynamically.
774 * In case when cpu_hotplug is not compiled, then we resort to current
775 * behaviour, which is cpu_possible == cpu_present.
778 * Three ways to find out the number of additional hotplug CPUs:
779 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
780 * - The user can overwrite it with additional_cpus=NUM
781 * - Otherwise don't reserve additional CPUs.
782 * We do this because additional CPUs waste a lot of memory.
785 __init void prefill_possible_map(void)
790 if (additional_cpus == -1) {
791 if (disabled_cpus > 0)
792 additional_cpus = disabled_cpus;
796 possible = num_processors + additional_cpus;
797 if (possible > NR_CPUS)
800 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
802 max_t(int, possible - num_processors, 0));
804 for (i = 0; i < possible; i++)
805 cpu_set(i, cpu_possible_map);
810 * Various sanity checks.
812 static int __init smp_sanity_check(unsigned max_cpus)
814 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
815 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
816 hard_smp_processor_id());
817 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
821 * If we couldn't find an SMP configuration at boot time,
822 * get out of here now!
824 if (!smp_found_config) {
825 printk(KERN_NOTICE "SMP motherboard not detected.\n");
827 if (APIC_init_uniprocessor())
828 printk(KERN_NOTICE "Local APIC not detected."
829 " Using dummy APIC emulation.\n");
834 * Should not be necessary because the MP table should list the boot
835 * CPU too, but we do it for the sake of robustness anyway.
837 if (!physid_isset(boot_cpu_id, phys_cpu_present_map)) {
838 printk(KERN_NOTICE "weird, boot CPU (#%d) not listed by the BIOS.\n",
840 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
844 * If we couldn't find a local APIC, then get out of here now!
847 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
849 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
855 * If SMP should be disabled, then really disable it!
858 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
867 * Prepare for SMP bootup. The MP table or ACPI has been read
868 * earlier. Just do some sanity checking here and enable APIC mode.
870 void __init smp_prepare_cpus(unsigned int max_cpus)
872 nmi_watchdog_default();
873 current_cpu_data = boot_cpu_data;
874 current_thread_info()->cpu = 0; /* needed? */
875 set_cpu_sibling_map(0);
877 if (smp_sanity_check(max_cpus) < 0) {
878 printk(KERN_INFO "SMP disabled\n");
885 * Switch from PIC to APIC mode.
889 if (GET_APIC_ID(apic_read(APIC_ID)) != boot_cpu_id) {
890 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
891 GET_APIC_ID(apic_read(APIC_ID)), boot_cpu_id);
892 /* Or can we switch back to PIC here? */
896 * Now start the IO-APICs
898 if (!skip_ioapic_setup && nr_ioapics)
904 * Set up local APIC timer on boot CPU.
907 setup_boot_APIC_clock();
911 * Early setup to make printk work.
913 void __init smp_prepare_boot_cpu(void)
915 int me = smp_processor_id();
916 cpu_set(me, cpu_online_map);
917 cpu_set(me, cpu_callout_map);
918 per_cpu(cpu_state, me) = CPU_ONLINE;
922 * Entry point to boot a CPU.
924 int __cpuinit __cpu_up(unsigned int cpu)
926 int apicid = cpu_present_to_apicid(cpu);
930 WARN_ON(irqs_disabled());
932 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
934 if (apicid == BAD_APICID || apicid == boot_cpu_id ||
935 !physid_isset(apicid, phys_cpu_present_map)) {
936 printk("__cpu_up: bad cpu %d\n", cpu);
941 * Already booted CPU?
943 if (cpu_isset(cpu, cpu_callin_map)) {
944 Dprintk("do_boot_cpu %d Already started\n", cpu);
948 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
950 err = do_boot_cpu(cpu, apicid);
952 Dprintk("do_boot_cpu failed %d\n", err);
956 /* Unleash the CPU! */
957 Dprintk("waiting for cpu %d\n", cpu);
960 * Make sure and check TSC sync:
962 local_irq_save(flags);
963 check_tsc_sync_source(cpu);
964 local_irq_restore(flags);
966 while (!cpu_isset(cpu, cpu_online_map))
969 if (num_online_cpus() > 8 && genapic == &apic_flat) {
971 "flat APIC routing can't be used with > 8 cpus\n");
981 * Finish the SMP boot.
983 void __init smp_cpus_done(unsigned int max_cpus)
987 check_nmi_watchdog();
990 #ifdef CONFIG_HOTPLUG_CPU
992 static void remove_siblinginfo(int cpu)
995 struct cpuinfo_x86 *c = cpu_data;
997 for_each_cpu_mask(sibling, cpu_core_map[cpu]) {
998 cpu_clear(cpu, cpu_core_map[sibling]);
1000 * last thread sibling in this cpu core going down
1002 if (cpus_weight(cpu_sibling_map[cpu]) == 1)
1003 c[sibling].booted_cores--;
1006 for_each_cpu_mask(sibling, cpu_sibling_map[cpu])
1007 cpu_clear(cpu, cpu_sibling_map[sibling]);
1008 cpus_clear(cpu_sibling_map[cpu]);
1009 cpus_clear(cpu_core_map[cpu]);
1010 c[cpu].phys_proc_id = 0;
1011 c[cpu].cpu_core_id = 0;
1012 cpu_clear(cpu, cpu_sibling_setup_map);
1015 void remove_cpu_from_maps(void)
1017 int cpu = smp_processor_id();
1019 cpu_clear(cpu, cpu_callout_map);
1020 cpu_clear(cpu, cpu_callin_map);
1021 clear_bit(cpu, &cpu_initialized); /* was set by cpu_init() */
1022 clear_node_cpumask(cpu);
1025 int __cpu_disable(void)
1027 int cpu = smp_processor_id();
1030 * Perhaps use cpufreq to drop frequency, but that could go
1031 * into generic code.
1033 * We won't take down the boot processor on i386 due to some
1034 * interrupts only being able to be serviced by the BSP.
1035 * Especially so if we're not using an IOAPIC -zwane
1040 if (nmi_watchdog == NMI_LOCAL_APIC)
1041 stop_apic_nmi_watchdog(NULL);
1046 * Allow any queued timer interrupts to get serviced
1047 * This is only a temporary solution until we cleanup
1048 * fixup_irqs as we do for IA64.
1053 local_irq_disable();
1054 remove_siblinginfo(cpu);
1056 spin_lock(&vector_lock);
1057 /* It's now safe to remove this processor from the online map */
1058 cpu_clear(cpu, cpu_online_map);
1059 spin_unlock(&vector_lock);
1060 remove_cpu_from_maps();
1061 fixup_irqs(cpu_online_map);
1065 void __cpu_die(unsigned int cpu)
1067 /* We don't do anything here: idle task is faking death itself. */
1070 for (i = 0; i < 10; i++) {
1071 /* They ack this in play_dead by setting CPU_DEAD */
1072 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1073 printk ("CPU %d is now offline\n", cpu);
1074 if (1 == num_online_cpus())
1075 alternatives_smp_switch(0);
1080 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1083 static __init int setup_additional_cpus(char *s)
1085 return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
1087 early_param("additional_cpus", setup_additional_cpus);
1089 #else /* ... !CONFIG_HOTPLUG_CPU */
1091 int __cpu_disable(void)
1096 void __cpu_die(unsigned int cpu)
1098 /* We said "no" in __cpu_disable */
1101 #endif /* CONFIG_HOTPLUG_CPU */