2 * saa7114 - Philips SAA7114H video decoder driver version 0.0.1
4 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
6 * Based on saa7111 driver by Dave Perks
8 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
10 * Slight changes for video timing and attachment output by
11 * Wolfgang Scherr <scherr@net4you.net>
13 * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
36 #include <linux/kernel.h>
37 #include <linux/major.h>
39 #include <linux/slab.h>
42 #include <linux/pci.h>
43 #include <linux/signal.h>
45 #include <asm/pgtable.h>
47 #include <linux/sched.h>
48 #include <linux/types.h>
50 #include <linux/videodev.h>
51 #include <asm/uaccess.h>
53 MODULE_DESCRIPTION("Philips SAA7114H video decoder driver");
54 MODULE_AUTHOR("Maxim Yevtyushkin");
55 MODULE_LICENSE("GPL");
57 #include <linux/i2c.h>
59 #define I2C_NAME(x) (x)->name
61 #include <linux/video_decoder.h>
64 module_param(debug, int, 0);
65 MODULE_PARM_DESC(debug, "Debug level (0-1)");
67 #define dprintk(num, format, args...) \
70 printk(format, ##args); \
73 /* ----------------------------------------------------------------------- */
76 unsigned char reg[0xf0 * 2];
88 #define I2C_SAA7114 0x42
89 #define I2C_SAA7114A 0x40
94 //#define SAA_7114_NTSC_HSYNC_START (-3)
95 //#define SAA_7114_NTSC_HSYNC_STOP (-18)
97 #define SAA_7114_NTSC_HSYNC_START (-17)
98 #define SAA_7114_NTSC_HSYNC_STOP (-32)
100 //#define SAA_7114_NTSC_HOFFSET (5)
101 #define SAA_7114_NTSC_HOFFSET (6)
102 #define SAA_7114_NTSC_VOFFSET (10)
103 #define SAA_7114_NTSC_WIDTH (720)
104 #define SAA_7114_NTSC_HEIGHT (250)
106 #define SAA_7114_SECAM_HSYNC_START (-17)
107 #define SAA_7114_SECAM_HSYNC_STOP (-32)
109 #define SAA_7114_SECAM_HOFFSET (2)
110 #define SAA_7114_SECAM_VOFFSET (10)
111 #define SAA_7114_SECAM_WIDTH (720)
112 #define SAA_7114_SECAM_HEIGHT (300)
114 #define SAA_7114_PAL_HSYNC_START (-17)
115 #define SAA_7114_PAL_HSYNC_STOP (-32)
117 #define SAA_7114_PAL_HOFFSET (2)
118 #define SAA_7114_PAL_VOFFSET (10)
119 #define SAA_7114_PAL_WIDTH (720)
120 #define SAA_7114_PAL_HEIGHT (300)
124 #define SAA_7114_VERTICAL_CHROMA_OFFSET 0 //0x50504040
125 #define SAA_7114_VERTICAL_LUMA_OFFSET 0
127 #define REG_ADDR(x) (((x) << 1) + 1)
128 #define LOBYTE(x) ((unsigned char)((x) & 0xff))
129 #define HIBYTE(x) ((unsigned char)(((x) >> 8) & 0xff))
130 #define LOWORD(x) ((unsigned short int)((x) & 0xffff))
131 #define HIWORD(x) ((unsigned short int)(((x) >> 16) & 0xffff))
134 /* ----------------------------------------------------------------------- */
137 saa7114_write (struct i2c_client *client,
141 /*struct saa7114 *decoder = i2c_get_clientdata(client);*/
143 /*decoder->reg[reg] = value;*/
144 return i2c_smbus_write_byte_data(client, reg, value);
148 saa7114_write_block (struct i2c_client *client,
155 /* the saa7114 has an autoincrement function, use it if
156 * the adapter understands raw I2C */
157 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
158 /* do raw I2C, not smbus compatible */
159 /*struct saa7114 *decoder = i2c_get_clientdata(client);*/
163 msg.addr = client->addr;
166 msg.buf = (char *) block_data;
168 block_data[msg.len++] = reg = data[0];
170 block_data[msg.len++] =
171 /*decoder->reg[reg++] =*/ data[1];
174 } while (len >= 2 && data[0] == reg &&
176 if ((ret = i2c_transfer(client->adapter,
181 /* do some slow I2C emulation kind of thing */
184 if ((ret = saa7114_write(client, reg,
195 saa7114_read (struct i2c_client *client,
198 return i2c_smbus_read_byte_data(client, reg);
201 /* ----------------------------------------------------------------------- */
203 // initially set NTSC, composite
206 static const unsigned char init[] = {
207 0x00, 0x00, /* 00 - ID byte , chip version,
209 0x01, 0x08, /* 01 - X,X,X,X, IDEL3 to IDEL0 -
210 * horizontal increment delay,
211 * recommended position */
212 0x02, 0x00, /* 02 - FUSE=3, GUDL=2, MODE=0 ;
214 0x03, 0x10, /* 03 - HLNRS=0, VBSL=1, WPOFF=0,
215 * HOLDG=0, GAFIX=0, GAI1=256, GAI2=256 */
216 0x04, 0x90, /* 04 - GAI1=256 */
217 0x05, 0x90, /* 05 - GAI2=256 */
218 0x06, SAA_7114_NTSC_HSYNC_START, /* 06 - HSB: hsync start,
219 * depends on the video standard */
220 0x07, SAA_7114_NTSC_HSYNC_STOP, /* 07 - HSS: hsync stop, depends
221 *on the video standard */
222 0x08, 0xb8, /* 08 - AUFD=1, FSEL=1, EXFIL=0, VTRC=1,
223 * HPLL: free running in playback, locked
224 * in capture, VNOI=0 */
225 0x09, 0x80, /* 09 - BYPS=0, PREF=0, BPSS=0, VBLB=0,
226 * UPTCV=0, APER=1; depends from input */
227 0x0a, 0x80, /* 0a - BRIG=128 */
228 0x0b, 0x44, /* 0b - CONT=1.109 */
229 0x0c, 0x40, /* 0c - SATN=1.0 */
230 0x0d, 0x00, /* 0d - HUE=0 */
231 0x0e, 0x84, /* 0e - CDTO, CSTD2 to 0, DCVF, FCTC,
232 * CCOMB; depends from video standard */
233 0x0f, 0x24, /* 0f - ACGC,CGAIN6 to CGAIN0; depends
234 * from video standard */
235 0x10, 0x03, /* 10 - OFFU1 to 0, OFFV1 to 0, CHBW,
237 0x11, 0x59, /* 11 - COLO, RTP1, HEDL1 to 0, RTP0,
239 0x12, 0xc9, /* 12 - RT signal control RTSE13 to 10
241 0x13, 0x80, /* 13 - RT/X port output control */
242 0x14, 0x00, /* 14 - analog, ADC, compatibility control */
243 0x15, 0x00, /* 15 - VGATE start FID change */
244 0x16, 0xfe, /* 16 - VGATE stop */
245 0x17, 0x00, /* 17 - Misc., VGATE MSBs */
246 0x18, 0x40, /* RAWG */
247 0x19, 0x80, /* RAWO */
253 0x1f, 0x00, /* status byte, read only */
254 0x20, 0x00, /* video decoder reserved part */
270 0x30, 0xbc, /* audio clock generator */
286 0x40, 0x00, /* VBI data slicer */
310 0x58, 0x40, // framing code
311 0x59, 0x47, // horizontal offset
312 0x5a, 0x06, // vertical offset
313 0x5b, 0x83, // field offset
314 0x5c, 0x00, // reserved
315 0x5d, 0x3e, // header and data
316 0x5e, 0x00, // sliced data
317 0x5f, 0x00, // reserved
318 0x60, 0x00, /* video decoder reserved part */
334 0x70, 0x00, /* video decoder reserved part */
350 0x80, 0x00, /* X-port, I-port and scaler */
355 0x85, 0x0d, // hsync and vsync ?
366 0x90, 0x03, /* Task A definition */
370 0x94, 0x00, // window settings
382 0xa0, 0x01, /* horizontal integer prescaling ratio */
383 0xa1, 0x00, /* horizontal prescaler accumulation
385 0xa2, 0x00, /* UV FIR filter, Y FIR filter, prescaler
388 0xa4, 0x80, // luminance brightness
389 0xa5, 0x40, // luminance gain
390 0xa6, 0x40, // chrominance saturation
392 0xa8, 0x00, // horizontal luminance scaling increment
394 0xaa, 0x00, // horizontal luminance phase offset
396 0xac, 0x00, // horizontal chrominance scaling increment
398 0xae, 0x00, // horizontal chrominance phase offset
400 0xb0, 0x00, // vertical luminance scaling increment
402 0xb2, 0x00, // vertical chrominance scaling increment
416 0xc0, 0x02, // Task B definition
420 0xc4, 0x00, // window settings
432 0xd0, 0x01, // horizontal integer prescaling ratio
433 0xd1, 0x00, // horizontal prescaler accumulation sequence length
434 0xd2, 0x00, // UV FIR filter, Y FIR filter, prescaler DC gain
436 0xd4, 0x80, // luminance brightness
437 0xd5, 0x40, // luminance gain
438 0xd6, 0x40, // chrominance saturation
440 0xd8, 0x00, // horizontal luminance scaling increment
442 0xda, 0x00, // horizontal luminance phase offset
444 0xdc, 0x00, // horizontal chrominance scaling increment
446 0xde, 0x00, // horizontal chrominance phase offset
448 0xe0, 0x00, // vertical luminance scaling increment
450 0xe2, 0x00, // vertical chrominance scaling increment
467 saa7114_command (struct i2c_client *client,
471 struct saa7114 *decoder = i2c_get_clientdata(client);
476 //dprintk(1, KERN_INFO "%s: writing init\n", I2C_NAME(client));
477 //saa7114_write_block(client, init, sizeof(init));
484 dprintk(1, KERN_INFO "%s: decoder dump\n", I2C_NAME(client));
486 for (i = 0; i < 32; i += 16) {
489 printk(KERN_DEBUG "%s: %03x", I2C_NAME(client), i);
490 for (j = 0; j < 16; ++j) {
492 saa7114_read(client, i + j));
499 case DECODER_GET_CAPABILITIES:
501 struct video_decoder_capability *cap = arg;
503 dprintk(1, KERN_DEBUG "%s: decoder get capabilities\n",
506 cap->flags = VIDEO_DECODER_PAL |
515 case DECODER_GET_STATUS:
521 status = saa7114_read(client, 0x1f);
523 dprintk(1, KERN_DEBUG "%s status: 0x%02x\n", I2C_NAME(client),
526 if ((status & (1 << 6)) == 0) {
527 res |= DECODER_STATUS_GOOD;
529 switch (decoder->norm) {
530 case VIDEO_MODE_NTSC:
531 res |= DECODER_STATUS_NTSC;
534 res |= DECODER_STATUS_PAL;
536 case VIDEO_MODE_SECAM:
537 res |= DECODER_STATUS_SECAM;
540 case VIDEO_MODE_AUTO:
541 if ((status & (1 << 5)) != 0) {
542 res |= DECODER_STATUS_NTSC;
544 res |= DECODER_STATUS_PAL;
548 if ((status & (1 << 0)) != 0) {
549 res |= DECODER_STATUS_COLOR;
555 case DECODER_SET_NORM:
559 short int hoff = 0, voff = 0, w = 0, h = 0;
561 dprintk(1, KERN_DEBUG "%s: decoder set norm ",
565 case VIDEO_MODE_NTSC:
566 dprintk(1, "NTSC\n");
567 decoder->reg[REG_ADDR(0x06)] =
568 SAA_7114_NTSC_HSYNC_START;
569 decoder->reg[REG_ADDR(0x07)] =
570 SAA_7114_NTSC_HSYNC_STOP;
572 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
574 decoder->reg[REG_ADDR(0x0e)] = 0x85;
575 decoder->reg[REG_ADDR(0x0f)] = 0x24;
577 hoff = SAA_7114_NTSC_HOFFSET;
578 voff = SAA_7114_NTSC_VOFFSET;
579 w = SAA_7114_NTSC_WIDTH;
580 h = SAA_7114_NTSC_HEIGHT;
586 decoder->reg[REG_ADDR(0x06)] =
587 SAA_7114_PAL_HSYNC_START;
588 decoder->reg[REG_ADDR(0x07)] =
589 SAA_7114_PAL_HSYNC_STOP;
591 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
593 decoder->reg[REG_ADDR(0x0e)] = 0x81;
594 decoder->reg[REG_ADDR(0x0f)] = 0x24;
596 hoff = SAA_7114_PAL_HOFFSET;
597 voff = SAA_7114_PAL_VOFFSET;
598 w = SAA_7114_PAL_WIDTH;
599 h = SAA_7114_PAL_HEIGHT;
604 dprintk(1, " Unknown video mode!!!\n");
610 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
611 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
612 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
613 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
614 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
615 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
616 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
617 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
618 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
619 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
620 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
621 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
623 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
624 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
625 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
626 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
627 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
628 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
629 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
630 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
631 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
632 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
633 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
634 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
637 saa7114_write(client, 0x80, 0x06); // i-port and scaler back end clock selection, task A&B off
638 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
639 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
641 saa7114_write_block(client, decoder->reg + (0x06 << 1),
643 saa7114_write_block(client, decoder->reg + (0x0e << 1),
645 saa7114_write_block(client, decoder->reg + (0x5a << 1),
648 saa7114_write_block(client, decoder->reg + (0x94 << 1),
649 (0x9f + 1 - 0x94) << 1);
650 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
651 (0xcf + 1 - 0xc4) << 1);
653 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
654 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
655 saa7114_write(client, 0x80, 0x36); // i-port and scaler back end clock selection
657 decoder->norm = *iarg;
661 case DECODER_SET_INPUT:
665 dprintk(1, KERN_DEBUG "%s: decoder set input (%d)\n",
666 I2C_NAME(client), *iarg);
667 if (*iarg < 0 || *iarg > 7) {
671 if (decoder->input != *iarg) {
672 dprintk(1, KERN_DEBUG "%s: now setting %s input\n",
674 *iarg >= 6 ? "S-Video" : "Composite");
675 decoder->input = *iarg;
678 decoder->reg[REG_ADDR(0x02)] =
680 reg[REG_ADDR(0x02)] & 0xf0) | (decoder->
683 saa7114_write(client, 0x02,
684 decoder->reg[REG_ADDR(0x02)]);
686 /* bypass chrominance trap for modes 6..9 */
687 decoder->reg[REG_ADDR(0x09)] =
689 reg[REG_ADDR(0x09)] & 0x7f) | (decoder->
693 saa7114_write(client, 0x09,
694 decoder->reg[REG_ADDR(0x09)]);
696 decoder->reg[REG_ADDR(0x0e)] =
699 reg[REG_ADDR(0x0e)] | 1 : decoder->
700 reg[REG_ADDR(0x0e)] & ~1;
701 saa7114_write(client, 0x0e,
702 decoder->reg[REG_ADDR(0x0e)]);
707 case DECODER_SET_OUTPUT:
711 dprintk(1, KERN_DEBUG "%s: decoder set output\n",
714 /* not much choice of outputs */
721 case DECODER_ENABLE_OUTPUT:
724 int enable = (*iarg != 0);
726 dprintk(1, KERN_DEBUG "%s: decoder %s output\n",
727 I2C_NAME(client), enable ? "enable" : "disable");
729 decoder->playback = !enable;
731 if (decoder->enable != enable) {
732 decoder->enable = enable;
734 /* RJ: If output should be disabled (for
735 * playing videos), we also need a open PLL.
736 * The input is set to 0 (where no input
737 * source is connected), although this
740 * If output should be enabled, we have to
744 if (decoder->enable) {
745 decoder->reg[REG_ADDR(0x08)] = 0xb8;
746 decoder->reg[REG_ADDR(0x12)] = 0xc9;
747 decoder->reg[REG_ADDR(0x13)] = 0x80;
748 decoder->reg[REG_ADDR(0x87)] = 0x01;
750 decoder->reg[REG_ADDR(0x08)] = 0x7c;
751 decoder->reg[REG_ADDR(0x12)] = 0x00;
752 decoder->reg[REG_ADDR(0x13)] = 0x00;
753 decoder->reg[REG_ADDR(0x87)] = 0x00;
756 saa7114_write_block(client,
757 decoder->reg + (0x12 << 1),
759 saa7114_write(client, 0x08,
760 decoder->reg[REG_ADDR(0x08)]);
761 saa7114_write(client, 0x87,
762 decoder->reg[REG_ADDR(0x87)]);
763 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
764 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
765 saa7114_write(client, 0x80, 0x36);
771 case DECODER_SET_PICTURE:
773 struct video_picture *pic = arg;
777 "%s: decoder set picture bright=%d contrast=%d saturation=%d hue=%d\n",
778 I2C_NAME(client), pic->brightness, pic->contrast,
779 pic->colour, pic->hue);
781 if (decoder->bright != pic->brightness) {
782 /* We want 0 to 255 we get 0-65535 */
783 decoder->bright = pic->brightness;
784 saa7114_write(client, 0x0a, decoder->bright >> 8);
786 if (decoder->contrast != pic->contrast) {
787 /* We want 0 to 127 we get 0-65535 */
788 decoder->contrast = pic->contrast;
789 saa7114_write(client, 0x0b,
790 decoder->contrast >> 9);
792 if (decoder->sat != pic->colour) {
793 /* We want 0 to 127 we get 0-65535 */
794 decoder->sat = pic->colour;
795 saa7114_write(client, 0x0c, decoder->sat >> 9);
797 if (decoder->hue != pic->hue) {
798 /* We want -128 to 127 we get 0-65535 */
799 decoder->hue = pic->hue;
800 saa7114_write(client, 0x0d,
801 (decoder->hue - 32768) >> 8);
813 /* ----------------------------------------------------------------------- */
817 * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
819 static unsigned short normal_i2c[] =
820 { I2C_SAA7114 >> 1, I2C_SAA7114A >> 1, I2C_CLIENT_END };
822 static unsigned short ignore = I2C_CLIENT_END;
824 static struct i2c_client_address_data addr_data = {
825 .normal_i2c = normal_i2c,
830 static struct i2c_driver i2c_driver_saa7114;
833 saa7114_detect_client (struct i2c_adapter *adapter,
838 short int hoff = SAA_7114_NTSC_HOFFSET;
839 short int voff = SAA_7114_NTSC_VOFFSET;
840 short int w = SAA_7114_NTSC_WIDTH;
841 short int h = SAA_7114_NTSC_HEIGHT;
842 struct i2c_client *client;
843 struct saa7114 *decoder;
847 "saa7114.c: detecting saa7114 client on address 0x%x\n",
850 /* Check if the adapter supports the needed features */
851 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
854 client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
857 client->addr = address;
858 client->adapter = adapter;
859 client->driver = &i2c_driver_saa7114;
860 strlcpy(I2C_NAME(client), "saa7114", sizeof(I2C_NAME(client)));
862 decoder = kzalloc(sizeof(struct saa7114), GFP_KERNEL);
863 if (decoder == NULL) {
867 decoder->norm = VIDEO_MODE_NTSC;
870 decoder->bright = 32768;
871 decoder->contrast = 32768;
872 decoder->hue = 32768;
873 decoder->sat = 32768;
874 decoder->playback = 0; // initially capture mode useda
875 i2c_set_clientdata(client, decoder);
877 memcpy(decoder->reg, init, sizeof(init));
879 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
880 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
881 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
882 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
883 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
884 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
885 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
886 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
887 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
888 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
889 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
890 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
892 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
893 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
894 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
895 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
896 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
897 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
898 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
899 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
900 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
901 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
902 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
903 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
905 decoder->reg[REG_ADDR(0xb8)] =
906 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
907 decoder->reg[REG_ADDR(0xb9)] =
908 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
909 decoder->reg[REG_ADDR(0xba)] =
910 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
911 decoder->reg[REG_ADDR(0xbb)] =
912 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
914 decoder->reg[REG_ADDR(0xbc)] =
915 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
916 decoder->reg[REG_ADDR(0xbd)] =
917 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
918 decoder->reg[REG_ADDR(0xbe)] =
919 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
920 decoder->reg[REG_ADDR(0xbf)] =
921 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
923 decoder->reg[REG_ADDR(0xe8)] =
924 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
925 decoder->reg[REG_ADDR(0xe9)] =
926 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
927 decoder->reg[REG_ADDR(0xea)] =
928 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
929 decoder->reg[REG_ADDR(0xeb)] =
930 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
932 decoder->reg[REG_ADDR(0xec)] =
933 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
934 decoder->reg[REG_ADDR(0xed)] =
935 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
936 decoder->reg[REG_ADDR(0xee)] =
937 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
938 decoder->reg[REG_ADDR(0xef)] =
939 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
942 decoder->reg[REG_ADDR(0x13)] = 0x80; // RTC0 on
943 decoder->reg[REG_ADDR(0x87)] = 0x01; // I-Port
944 decoder->reg[REG_ADDR(0x12)] = 0xc9; // RTS0
946 decoder->reg[REG_ADDR(0x02)] = 0xc0; // set composite1 input, aveasy
947 decoder->reg[REG_ADDR(0x09)] = 0x00; // chrominance trap
948 decoder->reg[REG_ADDR(0x0e)] |= 1; // combfilter on
951 dprintk(1, KERN_DEBUG "%s_attach: starting decoder init\n",
955 saa7114_write_block(client, decoder->reg + (0x20 << 1),
958 saa7114_write_block(client, decoder->reg + (0x30 << 1),
961 saa7114_write_block(client, decoder->reg + (0x63 << 1),
962 (0x7f + 1 - 0x63) << 1);
964 saa7114_write_block(client, decoder->reg + (0x89 << 1),
967 saa7114_write_block(client, decoder->reg + (0xb8 << 1),
970 saa7114_write_block(client, decoder->reg + (0xe8 << 1),
974 for (i = 0; i <= 5; i++) {
978 "%s_attach: init error %d at stage %d, leaving attach.\n",
979 I2C_NAME(client), i, err[i]);
986 for (i = 6; i < 8; i++) {
989 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
990 I2C_NAME(client), i, saa7114_read(client, i),
991 decoder->reg[REG_ADDR(i)]);
996 "%s_attach: performing decoder reset sequence\n",
999 err[6] = saa7114_write(client, 0x80, 0x06); // i-port and scaler backend clock selection, task A&B off
1000 err[7] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1001 err[8] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1003 for (i = 6; i <= 8; i++) {
1007 "%s_attach: init error %d at stage %d, leaving attach.\n",
1008 I2C_NAME(client), i, err[i]);
1015 dprintk(1, KERN_INFO "%s_attach: performing the rest of init\n",
1019 err[9] = saa7114_write(client, 0x01, decoder->reg[REG_ADDR(0x01)]);
1020 err[10] = saa7114_write_block(client, decoder->reg + (0x03 << 1), (0x1e + 1 - 0x03) << 1); // big seq
1021 err[11] = saa7114_write_block(client, decoder->reg + (0x40 << 1), (0x5f + 1 - 0x40) << 1); // slicer
1022 err[12] = saa7114_write_block(client, decoder->reg + (0x81 << 1), 2 << 1); // ?
1023 err[13] = saa7114_write_block(client, decoder->reg + (0x83 << 1), 5 << 1); // ?
1024 err[14] = saa7114_write_block(client, decoder->reg + (0x90 << 1), 4 << 1); // Task A
1026 saa7114_write_block(client, decoder->reg + (0x94 << 1),
1029 saa7114_write_block(client, decoder->reg + (0xa0 << 1),
1032 saa7114_write_block(client, decoder->reg + (0xa8 << 1),
1035 saa7114_write_block(client, decoder->reg + (0xb0 << 1),
1037 err[19] = saa7114_write_block(client, decoder->reg + (0xc0 << 1), 4 << 1); // Task B
1039 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
1042 saa7114_write_block(client, decoder->reg + (0xd0 << 1),
1045 saa7114_write_block(client, decoder->reg + (0xd8 << 1),
1048 saa7114_write_block(client, decoder->reg + (0xe0 << 1),
1051 for (i = 9; i <= 18; i++) {
1055 "%s_attach: init error %d at stage %d, leaving attach.\n",
1056 I2C_NAME(client), i, err[i]);
1064 for (i = 6; i < 8; i++) {
1067 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1068 I2C_NAME(client), i, saa7114_read(client, i),
1069 decoder->reg[REG_ADDR(i)]);
1073 for (i = 0x11; i <= 0x13; i++) {
1076 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1077 I2C_NAME(client), i, saa7114_read(client, i),
1078 decoder->reg[REG_ADDR(i)]);
1082 dprintk(1, KERN_DEBUG "%s_attach: setting video input\n",
1086 saa7114_write(client, 0x02, decoder->reg[REG_ADDR(0x02)]);
1088 saa7114_write(client, 0x09, decoder->reg[REG_ADDR(0x09)]);
1090 saa7114_write(client, 0x0e, decoder->reg[REG_ADDR(0x0e)]);
1092 for (i = 19; i <= 21; i++) {
1096 "%s_attach: init error %d at stage %d, leaving attach.\n",
1097 I2C_NAME(client), i, err[i]);
1106 "%s_attach: performing decoder reset sequence\n",
1109 err[22] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1110 err[23] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1111 err[24] = saa7114_write(client, 0x80, 0x36); // i-port and scaler backend clock selection, task A&B off
1114 for (i = 22; i <= 24; i++) {
1118 "%s_attach: init error %d at stage %d, leaving attach.\n",
1119 I2C_NAME(client), i, err[i]);
1126 err[25] = saa7114_write(client, 0x06, init[REG_ADDR(0x06)]);
1127 err[26] = saa7114_write(client, 0x07, init[REG_ADDR(0x07)]);
1128 err[27] = saa7114_write(client, 0x10, init[REG_ADDR(0x10)]);
1132 "%s_attach: chip version %x, decoder status 0x%02x\n",
1133 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1134 saa7114_read(client, 0x1f));
1137 "%s_attach: power save control: 0x%02x, scaler status: 0x%02x\n",
1138 I2C_NAME(client), saa7114_read(client, 0x88),
1139 saa7114_read(client, 0x8f));
1142 for (i = 0x94; i < 0x96; i++) {
1145 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1146 I2C_NAME(client), i, saa7114_read(client, i),
1147 decoder->reg[REG_ADDR(i)]);
1150 i = i2c_attach_client(client);
1157 //i = saa7114_write_block(client, init, sizeof(init));
1160 dprintk(1, KERN_ERR "%s_attach error: init status %d\n",
1161 I2C_NAME(client), i);
1165 "%s_attach: chip version %x at address 0x%x\n",
1166 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1174 saa7114_attach_adapter (struct i2c_adapter *adapter)
1178 "saa7114.c: starting probe for adapter %s (0x%x)\n",
1179 I2C_NAME(adapter), adapter->id);
1180 return i2c_probe(adapter, &addr_data, &saa7114_detect_client);
1184 saa7114_detach_client (struct i2c_client *client)
1186 struct saa7114 *decoder = i2c_get_clientdata(client);
1189 err = i2c_detach_client(client);
1200 /* ----------------------------------------------------------------------- */
1202 static struct i2c_driver i2c_driver_saa7114 = {
1207 .id = I2C_DRIVERID_SAA7114,
1209 .attach_adapter = saa7114_attach_adapter,
1210 .detach_client = saa7114_detach_client,
1211 .command = saa7114_command,
1217 return i2c_add_driver(&i2c_driver_saa7114);
1223 i2c_del_driver(&i2c_driver_saa7114);
1226 module_init(saa7114_init);
1227 module_exit(saa7114_exit);