git.oblomov.eu Git - linux-2.6/blob - drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
   7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
   8  *           Waleri Fomin <fomin@de.ibm.com>
   9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  10  *           Reinhard Ernst <rernst@de.ibm.com>
  11  *           Heiko J Schick <schickhj@de.ibm.com>
  12  *
  13  *  Copyright (c) 2005 IBM Corporation
  14  *
  15  *  All rights reserved.
  16  *
  17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  18  *  BSD.
  19  *
  20  * OpenIB BSD License
  21  *
  22  * Redistribution and use in source and binary forms, with or without
  23  * modification, are permitted provided that the following conditions are met:
  24  *
  25  * Redistributions of source code must retain the above copyright notice, this
  26  * list of conditions and the following disclaimer.
  27  *
  28  * Redistributions in binary form must reproduce the above copyright notice,
  29  * this list of conditions and the following disclaimer in the documentation
  30  * and/or other materials
  31  * provided with the distribution.
  32  *
  33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  43  * POSSIBILITY OF SUCH DAMAGE.
  44  */
  45
  46
  47 #include <asm/current.h>
  48
  49 #include "ehca_classes.h"
  50 #include "ehca_tools.h"
  51 #include "ehca_qes.h"
  52 #include "ehca_iverbs.h"
  53 #include "hcp_if.h"
  54 #include "hipz_fns.h"
  55
  56 static struct kmem_cache *qp_cache;
  57
  58 /*
  59  * attributes not supported by query qp
  60  */
  61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  63                                      IB_QP_ACCESS_FLAGS       | \
  64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  65
  66 /*
  67  * ehca (internal) qp state values
  68  */
  69 enum ehca_qp_state {
  70         EHCA_QPS_RESET = 1,
  71         EHCA_QPS_INIT = 2,
  72         EHCA_QPS_RTR = 3,
  73         EHCA_QPS_RTS = 5,
  74         EHCA_QPS_SQD = 6,
  75         EHCA_QPS_SQE = 8,
  76         EHCA_QPS_ERR = 128
  77 };
  78
  79 /*
  80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  81  */
  82 enum ib_qp_statetrans {
  83         IB_QPST_ANY2RESET,
  84         IB_QPST_ANY2ERR,
  85         IB_QPST_RESET2INIT,
  86         IB_QPST_INIT2RTR,
  87         IB_QPST_INIT2INIT,
  88         IB_QPST_RTR2RTS,
  89         IB_QPST_RTS2SQD,
  90         IB_QPST_RTS2RTS,
  91         IB_QPST_SQD2RTS,
  92         IB_QPST_SQE2RTS,
  93         IB_QPST_SQD2SQD,
  94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  95 };
  96
  97 /*
  98  * ib2ehca_qp_state maps IB to ehca qp_state
  99  * returns ehca qp state corresponding to given ib qp state
 100  */
 101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
 102 {
 103         switch (ib_qp_state) {
 104         case IB_QPS_RESET:
 105                 return EHCA_QPS_RESET;
 106         case IB_QPS_INIT:
 107                 return EHCA_QPS_INIT;
 108         case IB_QPS_RTR:
 109                 return EHCA_QPS_RTR;
 110         case IB_QPS_RTS:
 111                 return EHCA_QPS_RTS;
 112         case IB_QPS_SQD:
 113                 return EHCA_QPS_SQD;
 114         case IB_QPS_SQE:
 115                 return EHCA_QPS_SQE;
 116         case IB_QPS_ERR:
 117                 return EHCA_QPS_ERR;
 118         default:
 119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 120                 return -EINVAL;
 121         }
 122 }
 123
 124 /*
 125  * ehca2ib_qp_state maps ehca to IB qp_state
 126  * returns ib qp state corresponding to given ehca qp state
 127  */
 128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 129                                                 ehca_qp_state)
 130 {
 131         switch (ehca_qp_state) {
 132         case EHCA_QPS_RESET:
 133                 return IB_QPS_RESET;
 134         case EHCA_QPS_INIT:
 135                 return IB_QPS_INIT;
 136         case EHCA_QPS_RTR:
 137                 return IB_QPS_RTR;
 138         case EHCA_QPS_RTS:
 139                 return IB_QPS_RTS;
 140         case EHCA_QPS_SQD:
 141                 return IB_QPS_SQD;
 142         case EHCA_QPS_SQE:
 143                 return IB_QPS_SQE;
 144         case EHCA_QPS_ERR:
 145                 return IB_QPS_ERR;
 146         default:
 147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 148                 return -EINVAL;
 149         }
 150 }
 151
 152 /*
 153  * ehca_qp_type used as index for req_attr and opt_attr of
 154  * struct ehca_modqp_statetrans
 155  */
 156 enum ehca_qp_type {
 157         QPT_RC = 0,
 158         QPT_UC = 1,
 159         QPT_UD = 2,
 160         QPT_SQP = 3,
 161         QPT_MAX
 162 };
 163
 164 /*
 165  * ib2ehcaqptype maps Ib to ehca qp_type
 166  * returns ehca qp type corresponding to ib qp type
 167  */
 168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 169 {
 170         switch (ibqptype) {
 171         case IB_QPT_SMI:
 172         case IB_QPT_GSI:
 173                 return QPT_SQP;
 174         case IB_QPT_RC:
 175                 return QPT_RC;
 176         case IB_QPT_UC:
 177                 return QPT_UC;
 178         case IB_QPT_UD:
 179                 return QPT_UD;
 180         default:
 181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 182                 return -EINVAL;
 183         }
 184 }
 185
 186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 187                                                          int ib_tostate)
 188 {
 189         int index = -EINVAL;
 190         switch (ib_tostate) {
 191         case IB_QPS_RESET:
 192                 index = IB_QPST_ANY2RESET;
 193                 break;
 194         case IB_QPS_INIT:
 195                 switch (ib_fromstate) {
 196                 case IB_QPS_RESET:
 197                         index = IB_QPST_RESET2INIT;
 198                         break;
 199                 case IB_QPS_INIT:
 200                         index = IB_QPST_INIT2INIT;
 201                         break;
 202                 }
 203                 break;
 204         case IB_QPS_RTR:
 205                 if (ib_fromstate == IB_QPS_INIT)
 206                         index = IB_QPST_INIT2RTR;
 207                 break;
 208         case IB_QPS_RTS:
 209                 switch (ib_fromstate) {
 210                 case IB_QPS_RTR:
 211                         index = IB_QPST_RTR2RTS;
 212                         break;
 213                 case IB_QPS_RTS:
 214                         index = IB_QPST_RTS2RTS;
 215                         break;
 216                 case IB_QPS_SQD:
 217                         index = IB_QPST_SQD2RTS;
 218                         break;
 219                 case IB_QPS_SQE:
 220                         index = IB_QPST_SQE2RTS;
 221                         break;
 222                 }
 223                 break;
 224         case IB_QPS_SQD:
 225                 if (ib_fromstate == IB_QPS_RTS)
 226                         index = IB_QPST_RTS2SQD;
 227                 break;
 228         case IB_QPS_SQE:
 229                 break;
 230         case IB_QPS_ERR:
 231                 index = IB_QPST_ANY2ERR;
 232                 break;
 233         default:
 234                 break;
 235         }
 236         return index;
 237 }
 238
 239 /*
 240  * ibqptype2servicetype returns hcp service type corresponding to given
 241  * ib qp type used by create_qp()
 242  */
 243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 244 {
 245         switch (ibqptype) {
 246         case IB_QPT_SMI:
 247         case IB_QPT_GSI:
 248                 return ST_UD;
 249         case IB_QPT_RC:
 250                 return ST_RC;
 251         case IB_QPT_UC:
 252                 return ST_UC;
 253         case IB_QPT_UD:
 254                 return ST_UD;
 255         case IB_QPT_RAW_IPV6:
 256                 return -EINVAL;
 257         case IB_QPT_RAW_ETY:
 258                 return -EINVAL;
 259         default:
 260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 261                 return -EINVAL;
 262         }
 263 }
 264
 265 /*
 266  * init userspace queue info from ipz_queue data
 267  */
 268 static inline void queue2resp(struct ipzu_queue_resp *resp,
 269                               struct ipz_queue *queue)
 270 {
 271         resp->qe_size = queue->qe_size;
 272         resp->act_nr_of_sg = queue->act_nr_of_sg;
 273         resp->queue_length = queue->queue_length;
 274         resp->pagesize = queue->pagesize;
 275         resp->toggle_state = queue->toggle_state;
 276         resp->offset = queue->offset;
 277 }
 278
 279 /*
 280  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 281  */
 282 static inline int init_qp_queue(struct ehca_shca *shca,
 283                                 struct ehca_pd *pd,
 284                                 struct ehca_qp *my_qp,
 285                                 struct ipz_queue *queue,
 286                                 int q_type,
 287                                 u64 expected_hret,
 288                                 struct ehca_alloc_queue_parms *parms,
 289                                 int wqe_size)
 290 {
 291         int ret, cnt, ipz_rc, nr_q_pages;
 292         void *vpage;
 293         u64 rpage, h_ret;
 294         struct ib_device *ib_dev = &shca->ib_device;
 295         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 296
 297         if (!parms->queue_size)
 298                 return 0;
 299
 300         if (parms->is_small) {
 301                 nr_q_pages = 1;
 302                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 303                                         128 << parms->page_size,
 304                                         wqe_size, parms->act_nr_sges, 1);
 305         } else {
 306                 nr_q_pages = parms->queue_size;
 307                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 308                                         EHCA_PAGESIZE, wqe_size,
 309                                         parms->act_nr_sges, 0);
 310         }
 311
 312         if (!ipz_rc) {
 313                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%i",
 314                          ipz_rc);
 315                 return -EBUSY;
 316         }
 317
 318         /* register queue pages */
 319         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 320                 vpage = ipz_qpageit_get_inc(queue);
 321                 if (!vpage) {
 322                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 323                                  "failed p_vpage= %p", vpage);
 324                         ret = -EINVAL;
 325                         goto init_qp_queue1;
 326                 }
 327                 rpage = virt_to_abs(vpage);
 328
 329                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 330                                                  my_qp->ipz_qp_handle,
 331                                                  NULL, 0, q_type,
 332                                                  rpage, parms->is_small ? 0 : 1,
 333                                                  my_qp->galpas.kernel);
 334                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 335                         if (h_ret != expected_hret) {
 336                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 337                                          "h_ret=%li", h_ret);
 338                                 ret = ehca2ib_return_code(h_ret);
 339                                 goto init_qp_queue1;
 340                         }
 341                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 342                         if (vpage) {
 343                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 344                                          "should not succeed vpage=%p", vpage);
 345                                 ret = -EINVAL;
 346                                 goto init_qp_queue1;
 347                         }
 348                 } else {
 349                         if (h_ret != H_PAGE_REGISTERED) {
 350                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 351                                          "h_ret=%li", h_ret);
 352                                 ret = ehca2ib_return_code(h_ret);
 353                                 goto init_qp_queue1;
 354                         }
 355                 }
 356         }
 357
 358         ipz_qeit_reset(queue);
 359
 360         return 0;
 361
 362 init_qp_queue1:
 363         ipz_queue_dtor(pd, queue);
 364         return ret;
 365 }
 366
 367 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
 368 {
 369         if (is_llqp)
 370                 return 128 << act_nr_sge;
 371         else
 372                 return offsetof(struct ehca_wqe,
 373                                 u.nud.sg_list[act_nr_sge]);
 374 }
 375
 376 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
 377                                        int req_nr_sge, int is_llqp)
 378 {
 379         u32 wqe_size, q_size;
 380         int act_nr_sge = req_nr_sge;
 381
 382         if (!is_llqp)
 383                 /* round up #SGEs so WQE size is a power of 2 */
 384                 for (act_nr_sge = 4; act_nr_sge <= 252;
 385                      act_nr_sge = 4 + 2 * act_nr_sge)
 386                         if (act_nr_sge >= req_nr_sge)
 387                                 break;
 388
 389         wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
 390         q_size = wqe_size * (queue->max_wr + 1);
 391
 392         if (q_size <= 512)
 393                 queue->page_size = 2;
 394         else if (q_size <= 1024)
 395                 queue->page_size = 3;
 396         else
 397                 queue->page_size = 0;
 398
 399         queue->is_small = (queue->page_size != 0);
 400 }
 401
 402 /*
 403  * Create an ib_qp struct that is either a QP or an SRQ, depending on
 404  * the value of the is_srq parameter. If init_attr and srq_init_attr share
 405  * fields, the field out of init_attr is used.
 406  */
 407 static struct ehca_qp *internal_create_qp(
 408         struct ib_pd *pd,
 409         struct ib_qp_init_attr *init_attr,
 410         struct ib_srq_init_attr *srq_init_attr,
 411         struct ib_udata *udata, int is_srq)
 412 {
 413         struct ehca_qp *my_qp;
 414         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 415         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 416                                               ib_device);
 417         struct ib_ucontext *context = NULL;
 418         u64 h_ret;
 419         int is_llqp = 0, has_srq = 0;
 420         int qp_type, max_send_sge, max_recv_sge, ret;
 421
 422         /* h_call's out parameters */
 423         struct ehca_alloc_qp_parms parms;
 424         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
 425         unsigned long flags;
 426
 427         memset(&parms, 0, sizeof(parms));
 428         qp_type = init_attr->qp_type;
 429
 430         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 431                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 432                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 433                          init_attr->sq_sig_type);
 434                 return ERR_PTR(-EINVAL);
 435         }
 436
 437         /* save LLQP info */
 438         if (qp_type & 0x80) {
 439                 is_llqp = 1;
 440                 parms.ext_type = EQPT_LLQP;
 441                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 442         }
 443         qp_type &= 0x1F;
 444         init_attr->qp_type &= 0x1F;
 445
 446         /* handle SRQ base QPs */
 447         if (init_attr->srq) {
 448                 struct ehca_qp *my_srq =
 449                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
 450
 451                 has_srq = 1;
 452                 parms.ext_type = EQPT_SRQBASE;
 453                 parms.srq_qpn = my_srq->real_qp_num;
 454                 parms.srq_token = my_srq->token;
 455         }
 456
 457         if (is_llqp && has_srq) {
 458                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 459                 return ERR_PTR(-EINVAL);
 460         }
 461
 462         /* handle SRQs */
 463         if (is_srq) {
 464                 parms.ext_type = EQPT_SRQ;
 465                 parms.srq_limit = srq_init_attr->attr.srq_limit;
 466                 if (init_attr->cap.max_recv_sge > 3) {
 467                         ehca_err(pd->device, "no more than three SGEs "
 468                                  "supported for SRQ  pd=%p  max_sge=%x",
 469                                  pd, init_attr->cap.max_recv_sge);
 470                         return ERR_PTR(-EINVAL);
 471                 }
 472         }
 473
 474         /* check QP type */
 475         if (qp_type != IB_QPT_UD &&
 476             qp_type != IB_QPT_UC &&
 477             qp_type != IB_QPT_RC &&
 478             qp_type != IB_QPT_SMI &&
 479             qp_type != IB_QPT_GSI) {
 480                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 481                 return ERR_PTR(-EINVAL);
 482         }
 483
 484         if (is_llqp) {
 485                 switch (qp_type) {
 486                 case IB_QPT_RC:
 487                         if ((init_attr->cap.max_send_wr > 255) ||
 488                             (init_attr->cap.max_recv_wr > 255)) {
 489                                 ehca_err(pd->device,
 490                                          "Invalid Number of max_sq_wr=%x "
 491                                          "or max_rq_wr=%x for RC LLQP",
 492                                          init_attr->cap.max_send_wr,
 493                                          init_attr->cap.max_recv_wr);
 494                                 return ERR_PTR(-EINVAL);
 495                         }
 496                         break;
 497                 case IB_QPT_UD:
 498                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
 499                                 ehca_err(pd->device, "UD LLQP not supported "
 500                                          "by this adapter");
 501                                 return ERR_PTR(-ENOSYS);
 502                         }
 503                         if (!(init_attr->cap.max_send_sge <= 5
 504                             && init_attr->cap.max_send_sge >= 1
 505                             && init_attr->cap.max_recv_sge <= 5
 506                             && init_attr->cap.max_recv_sge >= 1)) {
 507                                 ehca_err(pd->device,
 508                                          "Invalid Number of max_send_sge=%x "
 509                                          "or max_recv_sge=%x for UD LLQP",
 510                                          init_attr->cap.max_send_sge,
 511                                          init_attr->cap.max_recv_sge);
 512                                 return ERR_PTR(-EINVAL);
 513                         } else if (init_attr->cap.max_send_wr > 255) {
 514                                 ehca_err(pd->device,
 515                                          "Invalid Number of "
 516                                          "max_send_wr=%x for UD QP_TYPE=%x",
 517                                          init_attr->cap.max_send_wr, qp_type);
 518                                 return ERR_PTR(-EINVAL);
 519                         }
 520                         break;
 521                 default:
 522                         ehca_err(pd->device, "unsupported LL QP Type=%x",
 523                                  qp_type);
 524                         return ERR_PTR(-EINVAL);
 525                         break;
 526                 }
 527         } else {
 528                 int max_sge = (qp_type == IB_QPT_UD || qp_type == IB_QPT_SMI
 529                                || qp_type == IB_QPT_GSI) ? 250 : 252;
 530
 531                 if (init_attr->cap.max_send_sge > max_sge
 532                     || init_attr->cap.max_recv_sge > max_sge) {
 533                         ehca_err(pd->device, "Invalid number of SGEs requested "
 534                                  "send_sge=%x recv_sge=%x max_sge=%x",
 535                                  init_attr->cap.max_send_sge,
 536                                  init_attr->cap.max_recv_sge, max_sge);
 537                         return ERR_PTR(-EINVAL);
 538                 }
 539         }
 540
 541         if (pd->uobject && udata)
 542                 context = pd->uobject->context;
 543
 544         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 545         if (!my_qp) {
 546                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 547                 return ERR_PTR(-ENOMEM);
 548         }
 549
 550         spin_lock_init(&my_qp->spinlock_s);
 551         spin_lock_init(&my_qp->spinlock_r);
 552         my_qp->qp_type = qp_type;
 553         my_qp->ext_type = parms.ext_type;
 554
 555         if (init_attr->recv_cq)
 556                 my_qp->recv_cq =
 557                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 558         if (init_attr->send_cq)
 559                 my_qp->send_cq =
 560                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 561
 562         do {
 563                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 564                         ret = -ENOMEM;
 565                         ehca_err(pd->device, "Can't reserve idr resources.");
 566                         goto create_qp_exit0;
 567                 }
 568
 569                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
 570                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 571                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 572         } while (ret == -EAGAIN);
 573
 574         if (ret) {
 575                 ret = -ENOMEM;
 576                 ehca_err(pd->device, "Can't allocate new idr entry.");
 577                 goto create_qp_exit0;
 578         }
 579
 580         if (my_qp->token > 0x1FFFFFF) {
 581                 ret = -EINVAL;
 582                 ehca_err(pd->device, "Invalid number of qp");
 583                 goto create_qp_exit1;
 584         }
 585
 586         parms.servicetype = ibqptype2servicetype(qp_type);
 587         if (parms.servicetype < 0) {
 588                 ret = -EINVAL;
 589                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 590                 goto create_qp_exit1;
 591         }
 592
 593         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
 594                 parms.sigtype = HCALL_SIGT_EVERY;
 595         else
 596                 parms.sigtype = HCALL_SIGT_BY_WQE;
 597
 598         /* UD_AV CIRCUMVENTION */
 599         max_send_sge = init_attr->cap.max_send_sge;
 600         max_recv_sge = init_attr->cap.max_recv_sge;
 601         if (parms.servicetype == ST_UD && !is_llqp) {
 602                 max_send_sge += 2;
 603                 max_recv_sge += 2;
 604         }
 605
 606         parms.token = my_qp->token;
 607         parms.eq_handle = shca->eq.ipz_eq_handle;
 608         parms.pd = my_pd->fw_pd;
 609         if (my_qp->send_cq)
 610                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 611         if (my_qp->recv_cq)
 612                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 613
 614         parms.squeue.max_wr = init_attr->cap.max_send_wr;
 615         parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
 616         parms.squeue.max_sge = max_send_sge;
 617         parms.rqueue.max_sge = max_recv_sge;
 618
 619         if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)) {
 620                 if (HAS_SQ(my_qp))
 621                         ehca_determine_small_queue(
 622                                 &parms.squeue, max_send_sge, is_llqp);
 623                 if (HAS_RQ(my_qp))
 624                         ehca_determine_small_queue(
 625                                 &parms.rqueue, max_recv_sge, is_llqp);
 626                 parms.qp_storage =
 627                         (parms.squeue.is_small || parms.rqueue.is_small);
 628         }
 629
 630         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 631         if (h_ret != H_SUCCESS) {
 632                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%li",
 633                          h_ret);
 634                 ret = ehca2ib_return_code(h_ret);
 635                 goto create_qp_exit1;
 636         }
 637
 638         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
 639         my_qp->ipz_qp_handle = parms.qp_handle;
 640         my_qp->galpas = parms.galpas;
 641
 642         swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
 643         rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
 644
 645         switch (qp_type) {
 646         case IB_QPT_RC:
 647                 if (is_llqp) {
 648                         parms.squeue.act_nr_sges = 1;
 649                         parms.rqueue.act_nr_sges = 1;
 650                 }
 651                 break;
 652         case IB_QPT_UD:
 653         case IB_QPT_GSI:
 654         case IB_QPT_SMI:
 655                 /* UD circumvention */
 656                 if (is_llqp) {
 657                         parms.squeue.act_nr_sges = 1;
 658                         parms.rqueue.act_nr_sges = 1;
 659                 } else {
 660                         parms.squeue.act_nr_sges -= 2;
 661                         parms.rqueue.act_nr_sges -= 2;
 662                 }
 663
 664                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 665                         parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
 666                         parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
 667                         parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
 668                         parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
 669                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 670                 }
 671
 672                 break;
 673
 674         default:
 675                 break;
 676         }
 677
 678         /* initialize r/squeue and register queue pages */
 679         if (HAS_SQ(my_qp)) {
 680                 ret = init_qp_queue(
 681                         shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
 682                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
 683                         &parms.squeue, swqe_size);
 684                 if (ret) {
 685                         ehca_err(pd->device, "Couldn't initialize squeue "
 686                                  "and pages ret=%i", ret);
 687                         goto create_qp_exit2;
 688                 }
 689         }
 690
 691         if (HAS_RQ(my_qp)) {
 692                 ret = init_qp_queue(
 693                         shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
 694                         H_SUCCESS, &parms.rqueue, rwqe_size);
 695                 if (ret) {
 696                         ehca_err(pd->device, "Couldn't initialize rqueue "
 697                                  "and pages ret=%i", ret);
 698                         goto create_qp_exit3;
 699                 }
 700         }
 701
 702         if (is_srq) {
 703                 my_qp->ib_srq.pd = &my_pd->ib_pd;
 704                 my_qp->ib_srq.device = my_pd->ib_pd.device;
 705
 706                 my_qp->ib_srq.srq_context = init_attr->qp_context;
 707                 my_qp->ib_srq.event_handler = init_attr->event_handler;
 708         } else {
 709                 my_qp->ib_qp.qp_num = ib_qp_num;
 710                 my_qp->ib_qp.pd = &my_pd->ib_pd;
 711                 my_qp->ib_qp.device = my_pd->ib_pd.device;
 712
 713                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 714                 my_qp->ib_qp.send_cq = init_attr->send_cq;
 715
 716                 my_qp->ib_qp.qp_type = qp_type;
 717                 my_qp->ib_qp.srq = init_attr->srq;
 718
 719                 my_qp->ib_qp.qp_context = init_attr->qp_context;
 720                 my_qp->ib_qp.event_handler = init_attr->event_handler;
 721         }
 722
 723         init_attr->cap.max_inline_data = 0; /* not supported yet */
 724         init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
 725         init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
 726         init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
 727         init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
 728         my_qp->init_attr = *init_attr;
 729
 730         /* NOTE: define_apq0() not supported yet */
 731         if (qp_type == IB_QPT_GSI) {
 732                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 733                 if (h_ret != H_SUCCESS) {
 734                         ret = ehca2ib_return_code(h_ret);
 735                         goto create_qp_exit4;
 736                 }
 737         }
 738
 739         if (my_qp->send_cq) {
 740                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
 741                 if (ret) {
 742                         ehca_err(pd->device,
 743                                  "Couldn't assign qp to send_cq ret=%i", ret);
 744                         goto create_qp_exit4;
 745                 }
 746         }
 747
 748         /* copy queues, galpa data to user space */
 749         if (context && udata) {
 750                 struct ehca_create_qp_resp resp;
 751                 memset(&resp, 0, sizeof(resp));
 752
 753                 resp.qp_num = my_qp->real_qp_num;
 754                 resp.token = my_qp->token;
 755                 resp.qp_type = my_qp->qp_type;
 756                 resp.ext_type = my_qp->ext_type;
 757                 resp.qkey = my_qp->qkey;
 758                 resp.real_qp_num = my_qp->real_qp_num;
 759
 760                 if (HAS_SQ(my_qp))
 761                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
 762                 if (HAS_RQ(my_qp))
 763                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
 764                 resp.fw_handle_ofs = (u32)
 765                         (my_qp->galpas.user.fw_handle & (PAGE_SIZE - 1));
 766
 767                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 768                         ehca_err(pd->device, "Copy to udata failed");
 769                         ret = -EINVAL;
 770                         goto create_qp_exit4;
 771                 }
 772         }
 773
 774         return my_qp;
 775
 776 create_qp_exit4:
 777         if (HAS_RQ(my_qp))
 778                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
 779
 780 create_qp_exit3:
 781         if (HAS_SQ(my_qp))
 782                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
 783
 784 create_qp_exit2:
 785         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 786
 787 create_qp_exit1:
 788         write_lock_irqsave(&ehca_qp_idr_lock, flags);
 789         idr_remove(&ehca_qp_idr, my_qp->token);
 790         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 791
 792 create_qp_exit0:
 793         kmem_cache_free(qp_cache, my_qp);
 794         return ERR_PTR(ret);
 795 }
 796
 797 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 798                              struct ib_qp_init_attr *qp_init_attr,
 799                              struct ib_udata *udata)
 800 {
 801         struct ehca_qp *ret;
 802
 803         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
 804         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
 805 }
 806
 807 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 808                                struct ib_uobject *uobject);
 809
 810 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
 811                                struct ib_srq_init_attr *srq_init_attr,
 812                                struct ib_udata *udata)
 813 {
 814         struct ib_qp_init_attr qp_init_attr;
 815         struct ehca_qp *my_qp;
 816         struct ib_srq *ret;
 817         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 818                                               ib_device);
 819         struct hcp_modify_qp_control_block *mqpcb;
 820         u64 hret, update_mask;
 821
 822         /* For common attributes, internal_create_qp() takes its info
 823          * out of qp_init_attr, so copy all common attrs there.
 824          */
 825         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 826         qp_init_attr.event_handler = srq_init_attr->event_handler;
 827         qp_init_attr.qp_context = srq_init_attr->srq_context;
 828         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
 829         qp_init_attr.qp_type = IB_QPT_RC;
 830         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
 831         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
 832
 833         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
 834         if (IS_ERR(my_qp))
 835                 return (struct ib_srq *)my_qp;
 836
 837         /* copy back return values */
 838         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
 839         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
 840
 841         /* drive SRQ into RTR state */
 842         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 843         if (!mqpcb) {
 844                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
 845                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
 846                 ret = ERR_PTR(-ENOMEM);
 847                 goto create_srq1;
 848         }
 849
 850         mqpcb->qp_state = EHCA_QPS_INIT;
 851         mqpcb->prim_phys_port = 1;
 852         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 853         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 854                                 my_qp->ipz_qp_handle,
 855                                 &my_qp->pf,
 856                                 update_mask,
 857                                 mqpcb, my_qp->galpas.kernel);
 858         if (hret != H_SUCCESS) {
 859                 ehca_err(pd->device, "Could not modify SRQ to INIT"
 860                          "ehca_qp=%p qp_num=%x h_ret=%li",
 861                          my_qp, my_qp->real_qp_num, hret);
 862                 goto create_srq2;
 863         }
 864
 865         mqpcb->qp_enable = 1;
 866         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
 867         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 868                                 my_qp->ipz_qp_handle,
 869                                 &my_qp->pf,
 870                                 update_mask,
 871                                 mqpcb, my_qp->galpas.kernel);
 872         if (hret != H_SUCCESS) {
 873                 ehca_err(pd->device, "Could not enable SRQ"
 874                          "ehca_qp=%p qp_num=%x h_ret=%li",
 875                          my_qp, my_qp->real_qp_num, hret);
 876                 goto create_srq2;
 877         }
 878
 879         mqpcb->qp_state  = EHCA_QPS_RTR;
 880         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 881         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 882                                 my_qp->ipz_qp_handle,
 883                                 &my_qp->pf,
 884                                 update_mask,
 885                                 mqpcb, my_qp->galpas.kernel);
 886         if (hret != H_SUCCESS) {
 887                 ehca_err(pd->device, "Could not modify SRQ to RTR"
 888                          "ehca_qp=%p qp_num=%x h_ret=%li",
 889                          my_qp, my_qp->real_qp_num, hret);
 890                 goto create_srq2;
 891         }
 892
 893         return &my_qp->ib_srq;
 894
 895 create_srq2:
 896         ret = ERR_PTR(ehca2ib_return_code(hret));
 897         ehca_free_fw_ctrlblock(mqpcb);
 898
 899 create_srq1:
 900         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
 901
 902         return ret;
 903 }
 904
 905 /*
 906  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 907  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 908  * returns total number of bad wqes in bad_wqe_cnt
 909  */
 910 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 911                            int *bad_wqe_cnt)
 912 {
 913         u64 h_ret;
 914         struct ipz_queue *squeue;
 915         void *bad_send_wqe_p, *bad_send_wqe_v;
 916         u64 q_ofs;
 917         struct ehca_wqe *wqe;
 918         int qp_num = my_qp->ib_qp.qp_num;
 919
 920         /* get send wqe pointer */
 921         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 922                                            my_qp->ipz_qp_handle, &my_qp->pf,
 923                                            &bad_send_wqe_p, NULL, 2);
 924         if (h_ret != H_SUCCESS) {
 925                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 926                          " ehca_qp=%p qp_num=%x h_ret=%li",
 927                          my_qp, qp_num, h_ret);
 928                 return ehca2ib_return_code(h_ret);
 929         }
 930         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
 931         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 932                  qp_num, bad_send_wqe_p);
 933         /* convert wqe pointer to vadr */
 934         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 935         if (ehca_debug_level)
 936                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 937         squeue = &my_qp->ipz_squeue;
 938         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 939                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 940                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 941                 return -EFAULT;
 942         }
 943
 944         /* loop sets wqe's purge bit */
 945         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 946         *bad_wqe_cnt = 0;
 947         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
 948                 if (ehca_debug_level)
 949                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
 950                 wqe->nr_of_data_seg = 0; /* suppress data access */
 951                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
 952                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
 953                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 954                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
 955         }
 956         /*
 957          * bad wqe will be reprocessed and ignored when pol_cq() is called,
 958          *  i.e. nr of wqes with flush error status is one less
 959          */
 960         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
 961                  qp_num, (*bad_wqe_cnt)-1);
 962         wqe->wqef = 0;
 963
 964         return 0;
 965 }
 966
 967 /*
 968  * internal_modify_qp with circumvention to handle aqp0 properly
 969  * smi_reset2init indicates if this is an internal reset-to-init-call for
 970  * smi. This flag must always be zero if called from ehca_modify_qp()!
 971  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
 972  */
 973 static int internal_modify_qp(struct ib_qp *ibqp,
 974                               struct ib_qp_attr *attr,
 975                               int attr_mask, int smi_reset2init)
 976 {
 977         enum ib_qp_state qp_cur_state, qp_new_state;
 978         int cnt, qp_attr_idx, ret = 0;
 979         enum ib_qp_statetrans statetrans;
 980         struct hcp_modify_qp_control_block *mqpcb;
 981         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
 982         struct ehca_shca *shca =
 983                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
 984         u64 update_mask;
 985         u64 h_ret;
 986         int bad_wqe_cnt = 0;
 987         int squeue_locked = 0;
 988         unsigned long flags = 0;
 989
 990         /* do query_qp to obtain current attr values */
 991         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 992         if (!mqpcb) {
 993                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
 994                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
 995                 return -ENOMEM;
 996         }
 997
 998         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
 999                                 my_qp->ipz_qp_handle,
1000                                 &my_qp->pf,
1001                                 mqpcb, my_qp->galpas.kernel);
1002         if (h_ret != H_SUCCESS) {
1003                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
1004                          "ehca_qp=%p qp_num=%x h_ret=%li",
1005                          my_qp, ibqp->qp_num, h_ret);
1006                 ret = ehca2ib_return_code(h_ret);
1007                 goto modify_qp_exit1;
1008         }
1009
1010         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
1011
1012         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
1013                 ret = -EINVAL;
1014                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
1015                          "ehca_qp=%p qp_num=%x",
1016                          mqpcb->qp_state, my_qp, ibqp->qp_num);
1017                 goto modify_qp_exit1;
1018         }
1019         /*
1020          * circumvention to set aqp0 initial state to init
1021          * as expected by IB spec
1022          */
1023         if (smi_reset2init == 0 &&
1024             ibqp->qp_type == IB_QPT_SMI &&
1025             qp_cur_state == IB_QPS_RESET &&
1026             (attr_mask & IB_QP_STATE) &&
1027             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1028                 struct ib_qp_attr smiqp_attr = {
1029                         .qp_state = IB_QPS_INIT,
1030                         .port_num = my_qp->init_attr.port_num,
1031                         .pkey_index = 0,
1032                         .qkey = 0
1033                 };
1034                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1035                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
1036                 int smirc = internal_modify_qp(
1037                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1038                 if (smirc) {
1039                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1040                                  "ehca_modify_qp() rc=%i", smirc);
1041                         ret = H_PARAMETER;
1042                         goto modify_qp_exit1;
1043                 }
1044                 qp_cur_state = IB_QPS_INIT;
1045                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1046         }
1047         /* is transmitted current state  equal to "real" current state */
1048         if ((attr_mask & IB_QP_CUR_STATE) &&
1049             qp_cur_state != attr->cur_qp_state) {
1050                 ret = -EINVAL;
1051                 ehca_err(ibqp->device,
1052                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1053                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1054                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1055                 goto modify_qp_exit1;
1056         }
1057
1058         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1059                  "new qp_state=%x attribute_mask=%x",
1060                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1061
1062         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1063         if (!smi_reset2init &&
1064             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1065                                 attr_mask)) {
1066                 ret = -EINVAL;
1067                 ehca_err(ibqp->device,
1068                          "Invalid qp transition new_state=%x cur_state=%x "
1069                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1070                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1071                 goto modify_qp_exit1;
1072         }
1073
1074         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1075         if (mqpcb->qp_state)
1076                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1077         else {
1078                 ret = -EINVAL;
1079                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1080                          "ehca_qp=%p qp_num=%x",
1081                          qp_new_state, my_qp, ibqp->qp_num);
1082                 goto modify_qp_exit1;
1083         }
1084
1085         /* retrieve state transition struct to get req and opt attrs */
1086         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1087         if (statetrans < 0) {
1088                 ret = -EINVAL;
1089                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1090                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1091                          "qp_num=%x", qp_cur_state, qp_new_state,
1092                          statetrans, my_qp, ibqp->qp_num);
1093                 goto modify_qp_exit1;
1094         }
1095
1096         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1097
1098         if (qp_attr_idx < 0) {
1099                 ret = qp_attr_idx;
1100                 ehca_err(ibqp->device,
1101                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1102                          ibqp->qp_type, my_qp, ibqp->qp_num);
1103                 goto modify_qp_exit1;
1104         }
1105
1106         ehca_dbg(ibqp->device,
1107                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1108                  my_qp, ibqp->qp_num, statetrans);
1109
1110         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1111          * in non-LL UD QPs.
1112          */
1113         if ((my_qp->qp_type == IB_QPT_UD) &&
1114             (my_qp->ext_type != EQPT_LLQP) &&
1115             (statetrans == IB_QPST_INIT2RTR) &&
1116             (shca->hw_level >= 0x22)) {
1117                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1118                 mqpcb->send_grh_flag = 1;
1119         }
1120
1121         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1122         if ((my_qp->qp_type == IB_QPT_UD ||
1123              my_qp->qp_type == IB_QPT_GSI ||
1124              my_qp->qp_type == IB_QPT_SMI) &&
1125             statetrans == IB_QPST_SQE2RTS) {
1126                 /* mark next free wqe if kernel */
1127                 if (!ibqp->uobject) {
1128                         struct ehca_wqe *wqe;
1129                         /* lock send queue */
1130                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1131                         squeue_locked = 1;
1132                         /* mark next free wqe */
1133                         wqe = (struct ehca_wqe *)
1134                                 ipz_qeit_get(&my_qp->ipz_squeue);
1135                         wqe->optype = wqe->wqef = 0xff;
1136                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1137                                  ibqp->qp_num, wqe);
1138                 }
1139                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1140                 if (ret) {
1141                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1142                                  "ehca_qp=%p qp_num=%x ret=%i",
1143                                  my_qp, ibqp->qp_num, ret);
1144                         goto modify_qp_exit2;
1145                 }
1146         }
1147
1148         /*
1149          * enable RDMA_Atomic_Control if reset->init und reliable con
1150          * this is necessary since gen2 does not provide that flag,
1151          * but pHyp requires it
1152          */
1153         if (statetrans == IB_QPST_RESET2INIT &&
1154             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1155                 mqpcb->rdma_atomic_ctrl = 3;
1156                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1157         }
1158         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1159         if (statetrans == IB_QPST_INIT2RTR &&
1160             (ibqp->qp_type == IB_QPT_UC) &&
1161             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1162                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1163                 update_mask |=
1164                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1165         }
1166
1167         if (attr_mask & IB_QP_PKEY_INDEX) {
1168                 mqpcb->prim_p_key_idx = attr->pkey_index;
1169                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1170         }
1171         if (attr_mask & IB_QP_PORT) {
1172                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1173                         ret = -EINVAL;
1174                         ehca_err(ibqp->device, "Invalid port=%x. "
1175                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1176                                  attr->port_num, my_qp, ibqp->qp_num,
1177                                  shca->num_ports);
1178                         goto modify_qp_exit2;
1179                 }
1180                 mqpcb->prim_phys_port = attr->port_num;
1181                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1182         }
1183         if (attr_mask & IB_QP_QKEY) {
1184                 mqpcb->qkey = attr->qkey;
1185                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1186         }
1187         if (attr_mask & IB_QP_AV) {
1188                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1189                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1190                                                 init_attr.port_num].rate);
1191
1192                 mqpcb->dlid = attr->ah_attr.dlid;
1193                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1194                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1195                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1196                 mqpcb->service_level = attr->ah_attr.sl;
1197                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1198
1199                 if (ah_mult < ehca_mult)
1200                         mqpcb->max_static_rate = (ah_mult > 0) ?
1201                         ((ehca_mult - 1) / ah_mult) : 0;
1202                 else
1203                         mqpcb->max_static_rate = 0;
1204                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1205
1206                 /*
1207                  * Always supply the GRH flag, even if it's zero, to give the
1208                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1209                  */
1210                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1211
1212                 /*
1213                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1214                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1215                  */
1216                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1217                         mqpcb->send_grh_flag = 1;
1218
1219                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1220                         update_mask |=
1221                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1222
1223                         for (cnt = 0; cnt < 16; cnt++)
1224                                 mqpcb->dest_gid.byte[cnt] =
1225                                         attr->ah_attr.grh.dgid.raw[cnt];
1226
1227                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1228                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1229                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1230                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1231                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1232                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1233                         update_mask |=
1234                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1235                 }
1236         }
1237
1238         if (attr_mask & IB_QP_PATH_MTU) {
1239                 mqpcb->path_mtu = attr->path_mtu;
1240                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1241         }
1242         if (attr_mask & IB_QP_TIMEOUT) {
1243                 mqpcb->timeout = attr->timeout;
1244                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1245         }
1246         if (attr_mask & IB_QP_RETRY_CNT) {
1247                 mqpcb->retry_count = attr->retry_cnt;
1248                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1249         }
1250         if (attr_mask & IB_QP_RNR_RETRY) {
1251                 mqpcb->rnr_retry_count = attr->rnr_retry;
1252                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1253         }
1254         if (attr_mask & IB_QP_RQ_PSN) {
1255                 mqpcb->receive_psn = attr->rq_psn;
1256                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1257         }
1258         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1259                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1260                         attr->max_dest_rd_atomic : 2;
1261                 update_mask |=
1262                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1263         }
1264         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1265                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1266                         attr->max_rd_atomic : 2;
1267                 update_mask |=
1268                         EHCA_BMASK_SET
1269                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1270         }
1271         if (attr_mask & IB_QP_ALT_PATH) {
1272                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1273                 int ehca_mult = ib_rate_to_mult(
1274                         shca->sport[my_qp->init_attr.port_num].rate);
1275
1276                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1277                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1278                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1279                 update_mask |=
1280                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1281                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1282                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1283
1284                 if (ah_mult < ehca_mult)
1285                         mqpcb->max_static_rate = (ah_mult > 0) ?
1286                         ((ehca_mult - 1) / ah_mult) : 0;
1287                 else
1288                         mqpcb->max_static_rate_al = 0;
1289
1290                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1291
1292                 /*
1293                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1294                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1295                  */
1296                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1297                         mqpcb->send_grh_flag_al = 1 << 31;
1298                         update_mask |=
1299                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1300                         mqpcb->source_gid_idx_al =
1301                                 attr->alt_ah_attr.grh.sgid_index;
1302                         update_mask |=
1303                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1304
1305                         for (cnt = 0; cnt < 16; cnt++)
1306                                 mqpcb->dest_gid_al.byte[cnt] =
1307                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1308
1309                         update_mask |=
1310                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1311                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1312                         update_mask |=
1313                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1314                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1315                         update_mask |=
1316                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1317                         mqpcb->traffic_class_al =
1318                                 attr->alt_ah_attr.grh.traffic_class;
1319                         update_mask |=
1320                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1321                 }
1322         }
1323
1324         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1325                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1326                 update_mask |=
1327                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1328         }
1329
1330         if (attr_mask & IB_QP_SQ_PSN) {
1331                 mqpcb->send_psn = attr->sq_psn;
1332                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1333         }
1334
1335         if (attr_mask & IB_QP_DEST_QPN) {
1336                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1337                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1338         }
1339
1340         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1341                 mqpcb->path_migration_state = attr->path_mig_state;
1342                 update_mask |=
1343                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1344         }
1345
1346         if (attr_mask & IB_QP_CAP) {
1347                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1348                 update_mask |=
1349                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1350                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1351                 update_mask |=
1352                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1353                 /* no support for max_send/recv_sge yet */
1354         }
1355
1356         if (ehca_debug_level)
1357                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1358
1359         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1360                                  my_qp->ipz_qp_handle,
1361                                  &my_qp->pf,
1362                                  update_mask,
1363                                  mqpcb, my_qp->galpas.kernel);
1364
1365         if (h_ret != H_SUCCESS) {
1366                 ret = ehca2ib_return_code(h_ret);
1367                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed h_ret=%li "
1368                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1369                 goto modify_qp_exit2;
1370         }
1371
1372         if ((my_qp->qp_type == IB_QPT_UD ||
1373              my_qp->qp_type == IB_QPT_GSI ||
1374              my_qp->qp_type == IB_QPT_SMI) &&
1375             statetrans == IB_QPST_SQE2RTS) {
1376                 /* doorbell to reprocessing wqes */
1377                 iosync(); /* serialize GAL register access */
1378                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1379                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1380         }
1381
1382         if (statetrans == IB_QPST_RESET2INIT ||
1383             statetrans == IB_QPST_INIT2INIT) {
1384                 mqpcb->qp_enable = 1;
1385                 mqpcb->qp_state = EHCA_QPS_INIT;
1386                 update_mask = 0;
1387                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1388
1389                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1390                                          my_qp->ipz_qp_handle,
1391                                          &my_qp->pf,
1392                                          update_mask,
1393                                          mqpcb,
1394                                          my_qp->galpas.kernel);
1395
1396                 if (h_ret != H_SUCCESS) {
1397                         ret = ehca2ib_return_code(h_ret);
1398                         ehca_err(ibqp->device, "ENABLE in context of "
1399                                  "RESET_2_INIT failed! Maybe you didn't get "
1400                                  "a LID h_ret=%li ehca_qp=%p qp_num=%x",
1401                                  h_ret, my_qp, ibqp->qp_num);
1402                         goto modify_qp_exit2;
1403                 }
1404         }
1405
1406         if (statetrans == IB_QPST_ANY2RESET) {
1407                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1408                 ipz_qeit_reset(&my_qp->ipz_squeue);
1409         }
1410
1411         if (attr_mask & IB_QP_QKEY)
1412                 my_qp->qkey = attr->qkey;
1413
1414 modify_qp_exit2:
1415         if (squeue_locked) { /* this means: sqe -> rts */
1416                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1417                 my_qp->sqerr_purgeflag = 1;
1418         }
1419
1420 modify_qp_exit1:
1421         ehca_free_fw_ctrlblock(mqpcb);
1422
1423         return ret;
1424 }
1425
1426 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1427                    struct ib_udata *udata)
1428 {
1429         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1430         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1431                                              ib_pd);
1432         u32 cur_pid = current->tgid;
1433
1434         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1435             my_pd->ownpid != cur_pid) {
1436                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1437                          cur_pid, my_pd->ownpid);
1438                 return -EINVAL;
1439         }
1440
1441         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1442 }
1443
1444 int ehca_query_qp(struct ib_qp *qp,
1445                   struct ib_qp_attr *qp_attr,
1446                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1447 {
1448         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1449         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1450                                              ib_pd);
1451         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1452                                               ib_device);
1453         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1454         struct hcp_modify_qp_control_block *qpcb;
1455         u32 cur_pid = current->tgid;
1456         int cnt, ret = 0;
1457         u64 h_ret;
1458
1459         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1460             my_pd->ownpid != cur_pid) {
1461                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1462                          cur_pid, my_pd->ownpid);
1463                 return -EINVAL;
1464         }
1465
1466         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1467                 ehca_err(qp->device, "Invalid attribute mask "
1468                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1469                          my_qp, qp->qp_num, qp_attr_mask);
1470                 return -EINVAL;
1471         }
1472
1473         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1474         if (!qpcb) {
1475                 ehca_err(qp->device, "Out of memory for qpcb "
1476                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1477                 return -ENOMEM;
1478         }
1479
1480         h_ret = hipz_h_query_qp(adapter_handle,
1481                                 my_qp->ipz_qp_handle,
1482                                 &my_qp->pf,
1483                                 qpcb, my_qp->galpas.kernel);
1484
1485         if (h_ret != H_SUCCESS) {
1486                 ret = ehca2ib_return_code(h_ret);
1487                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1488                          "ehca_qp=%p qp_num=%x h_ret=%li",
1489                          my_qp, qp->qp_num, h_ret);
1490                 goto query_qp_exit1;
1491         }
1492
1493         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1494         qp_attr->qp_state = qp_attr->cur_qp_state;
1495
1496         if (qp_attr->cur_qp_state == -EINVAL) {
1497                 ret = -EINVAL;
1498                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1499                          "ehca_qp=%p qp_num=%x",
1500                          qpcb->qp_state, my_qp, qp->qp_num);
1501                 goto query_qp_exit1;
1502         }
1503
1504         if (qp_attr->qp_state == IB_QPS_SQD)
1505                 qp_attr->sq_draining = 1;
1506
1507         qp_attr->qkey = qpcb->qkey;
1508         qp_attr->path_mtu = qpcb->path_mtu;
1509         qp_attr->path_mig_state = qpcb->path_migration_state;
1510         qp_attr->rq_psn = qpcb->receive_psn;
1511         qp_attr->sq_psn = qpcb->send_psn;
1512         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1513         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1514         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1515         /* UD_AV CIRCUMVENTION */
1516         if (my_qp->qp_type == IB_QPT_UD) {
1517                 qp_attr->cap.max_send_sge =
1518                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1519                 qp_attr->cap.max_recv_sge =
1520                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1521         } else {
1522                 qp_attr->cap.max_send_sge =
1523                         qpcb->actual_nr_sges_in_sq_wqe;
1524                 qp_attr->cap.max_recv_sge =
1525                         qpcb->actual_nr_sges_in_rq_wqe;
1526         }
1527
1528         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1529         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1530
1531         qp_attr->pkey_index =
1532                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1533
1534         qp_attr->port_num =
1535                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1536
1537         qp_attr->timeout = qpcb->timeout;
1538         qp_attr->retry_cnt = qpcb->retry_count;
1539         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1540
1541         qp_attr->alt_pkey_index =
1542                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1543
1544         qp_attr->alt_port_num = qpcb->alt_phys_port;
1545         qp_attr->alt_timeout = qpcb->timeout_al;
1546
1547         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1548         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1549
1550         /* primary av */
1551         qp_attr->ah_attr.sl = qpcb->service_level;
1552
1553         if (qpcb->send_grh_flag) {
1554                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1555         }
1556
1557         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1558         qp_attr->ah_attr.dlid = qpcb->dlid;
1559         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1560         qp_attr->ah_attr.port_num = qp_attr->port_num;
1561
1562         /* primary GRH */
1563         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1564         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1565         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1566         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1567
1568         for (cnt = 0; cnt < 16; cnt++)
1569                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1570                         qpcb->dest_gid.byte[cnt];
1571
1572         /* alternate AV */
1573         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1574         if (qpcb->send_grh_flag_al) {
1575                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1576         }
1577
1578         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1579         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1580         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1581
1582         /* alternate GRH */
1583         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1584         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1585         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1586         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1587
1588         for (cnt = 0; cnt < 16; cnt++)
1589                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1590                         qpcb->dest_gid_al.byte[cnt];
1591
1592         /* return init attributes given in ehca_create_qp */
1593         if (qp_init_attr)
1594                 *qp_init_attr = my_qp->init_attr;
1595
1596         if (ehca_debug_level)
1597                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1598
1599 query_qp_exit1:
1600         ehca_free_fw_ctrlblock(qpcb);
1601
1602         return ret;
1603 }
1604
1605 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1606                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1607 {
1608         struct ehca_qp *my_qp =
1609                 container_of(ibsrq, struct ehca_qp, ib_srq);
1610         struct ehca_pd *my_pd =
1611                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1612         struct ehca_shca *shca =
1613                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1614         struct hcp_modify_qp_control_block *mqpcb;
1615         u64 update_mask;
1616         u64 h_ret;
1617         int ret = 0;
1618
1619         u32 cur_pid = current->tgid;
1620         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1621             my_pd->ownpid != cur_pid) {
1622                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1623                          cur_pid, my_pd->ownpid);
1624                 return -EINVAL;
1625         }
1626
1627         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1628         if (!mqpcb) {
1629                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1630                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1631                 return -ENOMEM;
1632         }
1633
1634         update_mask = 0;
1635         if (attr_mask & IB_SRQ_LIMIT) {
1636                 attr_mask &= ~IB_SRQ_LIMIT;
1637                 update_mask |=
1638                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1639                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1640                 mqpcb->curr_srq_limit =
1641                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1642                 mqpcb->qp_aff_asyn_ev_log_reg =
1643                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1644         }
1645
1646         /* by now, all bits in attr_mask should have been cleared */
1647         if (attr_mask) {
1648                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1649                          "attr_mask=%x", attr_mask);
1650                 ret = -EINVAL;
1651                 goto modify_srq_exit0;
1652         }
1653
1654         if (ehca_debug_level)
1655                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1656
1657         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1658                                  NULL, update_mask, mqpcb,
1659                                  my_qp->galpas.kernel);
1660
1661         if (h_ret != H_SUCCESS) {
1662                 ret = ehca2ib_return_code(h_ret);
1663                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed h_ret=%li "
1664                          "ehca_qp=%p qp_num=%x",
1665                          h_ret, my_qp, my_qp->real_qp_num);
1666         }
1667
1668 modify_srq_exit0:
1669         ehca_free_fw_ctrlblock(mqpcb);
1670
1671         return ret;
1672 }
1673
1674 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1675 {
1676         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1677         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1678         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1679                                               ib_device);
1680         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1681         struct hcp_modify_qp_control_block *qpcb;
1682         u32 cur_pid = current->tgid;
1683         int ret = 0;
1684         u64 h_ret;
1685
1686         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1687             my_pd->ownpid != cur_pid) {
1688                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1689                          cur_pid, my_pd->ownpid);
1690                 return -EINVAL;
1691         }
1692
1693         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1694         if (!qpcb) {
1695                 ehca_err(srq->device, "Out of memory for qpcb "
1696                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1697                 return -ENOMEM;
1698         }
1699
1700         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1701                                 NULL, qpcb, my_qp->galpas.kernel);
1702
1703         if (h_ret != H_SUCCESS) {
1704                 ret = ehca2ib_return_code(h_ret);
1705                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1706                          "ehca_qp=%p qp_num=%x h_ret=%li",
1707                          my_qp, my_qp->real_qp_num, h_ret);
1708                 goto query_srq_exit1;
1709         }
1710
1711         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1712         srq_attr->srq_limit = EHCA_BMASK_GET(
1713                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1714
1715         if (ehca_debug_level)
1716                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1717
1718 query_srq_exit1:
1719         ehca_free_fw_ctrlblock(qpcb);
1720
1721         return ret;
1722 }
1723
1724 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1725                                struct ib_uobject *uobject)
1726 {
1727         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1728         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1729                                              ib_pd);
1730         u32 cur_pid = current->tgid;
1731         u32 qp_num = my_qp->real_qp_num;
1732         int ret;
1733         u64 h_ret;
1734         u8 port_num;
1735         enum ib_qp_type qp_type;
1736         unsigned long flags;
1737
1738         if (uobject) {
1739                 if (my_qp->mm_count_galpa ||
1740                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1741                         ehca_err(dev, "Resources still referenced in "
1742                                  "user space qp_num=%x", qp_num);
1743                         return -EINVAL;
1744                 }
1745                 if (my_pd->ownpid != cur_pid) {
1746                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1747                                  cur_pid, my_pd->ownpid);
1748                         return -EINVAL;
1749                 }
1750         }
1751
1752         if (my_qp->send_cq) {
1753                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1754                 if (ret) {
1755                         ehca_err(dev, "Couldn't unassign qp from "
1756                                  "send_cq ret=%i qp_num=%x cq_num=%x", ret,
1757                                  qp_num, my_qp->send_cq->cq_number);
1758                         return ret;
1759                 }
1760         }
1761
1762         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1763         idr_remove(&ehca_qp_idr, my_qp->token);
1764         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1765
1766         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1767         if (h_ret != H_SUCCESS) {
1768                 ehca_err(dev, "hipz_h_destroy_qp() failed h_ret=%li "
1769                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1770                 return ehca2ib_return_code(h_ret);
1771         }
1772
1773         port_num = my_qp->init_attr.port_num;
1774         qp_type  = my_qp->init_attr.qp_type;
1775
1776         /* no support for IB_QPT_SMI yet */
1777         if (qp_type == IB_QPT_GSI) {
1778                 struct ib_event event;
1779                 ehca_info(dev, "device %s: port %x is inactive.",
1780                           shca->ib_device.name, port_num);
1781                 event.device = &shca->ib_device;
1782                 event.event = IB_EVENT_PORT_ERR;
1783                 event.element.port_num = port_num;
1784                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1785                 ib_dispatch_event(&event);
1786         }
1787
1788         if (HAS_RQ(my_qp))
1789                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1790         if (HAS_SQ(my_qp))
1791                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1792         kmem_cache_free(qp_cache, my_qp);
1793         return 0;
1794 }
1795
1796 int ehca_destroy_qp(struct ib_qp *qp)
1797 {
1798         return internal_destroy_qp(qp->device,
1799                                    container_of(qp, struct ehca_qp, ib_qp),
1800                                    qp->uobject);
1801 }
1802
1803 int ehca_destroy_srq(struct ib_srq *srq)
1804 {
1805         return internal_destroy_qp(srq->device,
1806                                    container_of(srq, struct ehca_qp, ib_srq),
1807                                    srq->uobject);
1808 }
1809
1810 int ehca_init_qp_cache(void)
1811 {
1812         qp_cache = kmem_cache_create("ehca_cache_qp",
1813                                      sizeof(struct ehca_qp), 0,
1814                                      SLAB_HWCACHE_ALIGN,
1815                                      NULL);
1816         if (!qp_cache)
1817                 return -ENOMEM;
1818         return 0;
1819 }
1820
1821 void ehca_cleanup_qp_cache(void)
1822 {
1823         if (qp_cache)
1824                 kmem_cache_destroy(qp_cache);
1825 }