2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/smp_lock.h>
18 #include <linux/types.h>
19 #include <linux/miscdevice.h>
20 #include <linux/major.h>
21 #include <linux/ioport.h>
22 #include <linux/fcntl.h>
23 #include <linux/init.h>
24 #include <linux/poll.h>
26 #include <linux/proc_fs.h>
27 #include <linux/spinlock.h>
28 #include <linux/sysctl.h>
29 #include <linux/wait.h>
30 #include <linux/bcd.h>
31 #include <linux/seq_file.h>
32 #include <linux/bitops.h>
33 #include <linux/clocksource.h>
35 #include <asm/current.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
40 #include <asm/div64.h>
42 #include <linux/acpi.h>
43 #include <acpi/acpi_bus.h>
44 #include <linux/hpet.h>
47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec.htm
51 #define HPET_USER_FREQ (64)
52 #define HPET_DRIFT (500)
54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
57 /* WARNING -- don't get confused. These macros are never used
58 * to write the (single) counter, and rarely to read it.
59 * They're badly named; to fix, someday.
61 #if BITS_PER_LONG == 64
62 #define write_counter(V, MC) writeq(V, MC)
63 #define read_counter(MC) readq(MC)
65 #define write_counter(V, MC) writel(V, MC)
66 #define read_counter(MC) readl(MC)
69 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
71 /* This clocksource driver currently only works on ia64 */
73 static void __iomem *hpet_mctr;
75 static cycle_t read_hpet(void)
77 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
80 static struct clocksource clocksource_hpet = {
84 .mask = CLOCKSOURCE_MASK(64),
85 .mult = 0, /* to be calculated */
87 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
89 static struct clocksource *hpet_clocksource;
92 /* A lock for concurrent access by app and isr hpet activity. */
93 static DEFINE_SPINLOCK(hpet_lock);
95 #define HPET_DEV_NAME (7)
98 struct hpets *hd_hpets;
99 struct hpet __iomem *hd_hpet;
100 struct hpet_timer __iomem *hd_timer;
101 unsigned long hd_ireqfreq;
102 unsigned long hd_irqdata;
103 wait_queue_head_t hd_waitqueue;
104 struct fasync_struct *hd_async_queue;
105 unsigned int hd_flags;
107 unsigned int hd_hdwirq;
108 char hd_name[HPET_DEV_NAME];
112 struct hpets *hp_next;
113 struct hpet __iomem *hp_hpet;
114 unsigned long hp_hpet_phys;
115 struct clocksource *hp_clocksource;
116 unsigned long long hp_tick_freq;
117 unsigned long hp_delta;
118 unsigned int hp_ntimer;
119 unsigned int hp_which;
120 struct hpet_dev hp_dev[1];
123 static struct hpets *hpets;
125 #define HPET_OPEN 0x0001
126 #define HPET_IE 0x0002 /* interrupt enabled */
127 #define HPET_PERIODIC 0x0004
128 #define HPET_SHARED_IRQ 0x0008
132 static inline unsigned long long readq(void __iomem *addr)
134 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
139 static inline void writeq(unsigned long long v, void __iomem *addr)
141 writel(v & 0xffffffff, addr);
142 writel(v >> 32, addr + 4);
146 static irqreturn_t hpet_interrupt(int irq, void *data)
148 struct hpet_dev *devp;
152 isr = 1 << (devp - devp->hd_hpets->hp_dev);
154 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
155 !(isr & readl(&devp->hd_hpet->hpet_isr)))
158 spin_lock(&hpet_lock);
162 * For non-periodic timers, increment the accumulator.
163 * This has the effect of treating non-periodic like periodic.
165 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
168 t = devp->hd_ireqfreq;
169 m = read_counter(&devp->hd_hpet->hpet_mc);
170 write_counter(t + m + devp->hd_hpets->hp_delta,
171 &devp->hd_timer->hpet_compare);
174 if (devp->hd_flags & HPET_SHARED_IRQ)
175 writel(isr, &devp->hd_hpet->hpet_isr);
176 spin_unlock(&hpet_lock);
178 wake_up_interruptible(&devp->hd_waitqueue);
180 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
185 static void hpet_timer_set_irq(struct hpet_dev *devp)
189 struct hpet_timer __iomem *timer;
191 spin_lock_irq(&hpet_lock);
192 if (devp->hd_hdwirq) {
193 spin_unlock_irq(&hpet_lock);
197 timer = devp->hd_timer;
199 /* we prefer level triggered mode */
200 v = readl(&timer->hpet_config);
201 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
202 v |= Tn_INT_TYPE_CNF_MASK;
203 writel(v, &timer->hpet_config);
205 spin_unlock_irq(&hpet_lock);
207 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
208 Tn_INT_ROUTE_CAP_SHIFT;
211 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
212 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
214 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
219 for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ;
220 irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) {
222 if (irq >= nr_irqs) {
227 gsi = acpi_register_gsi(irq, ACPI_LEVEL_SENSITIVE,
232 /* FIXME: Setup interrupt source table */
235 if (irq < HPET_MAX_IRQ) {
236 spin_lock_irq(&hpet_lock);
237 v = readl(&timer->hpet_config);
238 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
239 writel(v, &timer->hpet_config);
240 devp->hd_hdwirq = gsi;
241 spin_unlock_irq(&hpet_lock);
246 static int hpet_open(struct inode *inode, struct file *file)
248 struct hpet_dev *devp;
252 if (file->f_mode & FMODE_WRITE)
256 spin_lock_irq(&hpet_lock);
258 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
259 for (i = 0; i < hpetp->hp_ntimer; i++)
260 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
263 devp = &hpetp->hp_dev[i];
268 spin_unlock_irq(&hpet_lock);
273 file->private_data = devp;
274 devp->hd_irqdata = 0;
275 devp->hd_flags |= HPET_OPEN;
276 spin_unlock_irq(&hpet_lock);
279 hpet_timer_set_irq(devp);
285 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
287 DECLARE_WAITQUEUE(wait, current);
290 struct hpet_dev *devp;
292 devp = file->private_data;
293 if (!devp->hd_ireqfreq)
296 if (count < sizeof(unsigned long))
299 add_wait_queue(&devp->hd_waitqueue, &wait);
302 set_current_state(TASK_INTERRUPTIBLE);
304 spin_lock_irq(&hpet_lock);
305 data = devp->hd_irqdata;
306 devp->hd_irqdata = 0;
307 spin_unlock_irq(&hpet_lock);
311 else if (file->f_flags & O_NONBLOCK) {
314 } else if (signal_pending(current)) {
315 retval = -ERESTARTSYS;
321 retval = put_user(data, (unsigned long __user *)buf);
323 retval = sizeof(unsigned long);
325 __set_current_state(TASK_RUNNING);
326 remove_wait_queue(&devp->hd_waitqueue, &wait);
331 static unsigned int hpet_poll(struct file *file, poll_table * wait)
334 struct hpet_dev *devp;
336 devp = file->private_data;
338 if (!devp->hd_ireqfreq)
341 poll_wait(file, &devp->hd_waitqueue, wait);
343 spin_lock_irq(&hpet_lock);
344 v = devp->hd_irqdata;
345 spin_unlock_irq(&hpet_lock);
348 return POLLIN | POLLRDNORM;
353 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
355 #ifdef CONFIG_HPET_MMAP
356 struct hpet_dev *devp;
359 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
362 devp = file->private_data;
363 addr = devp->hd_hpets->hp_hpet_phys;
365 if (addr & (PAGE_SIZE - 1))
368 vma->vm_flags |= VM_IO;
369 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
371 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
372 PAGE_SIZE, vma->vm_page_prot)) {
373 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
384 static int hpet_fasync(int fd, struct file *file, int on)
386 struct hpet_dev *devp;
388 devp = file->private_data;
390 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
396 static int hpet_release(struct inode *inode, struct file *file)
398 struct hpet_dev *devp;
399 struct hpet_timer __iomem *timer;
402 devp = file->private_data;
403 timer = devp->hd_timer;
405 spin_lock_irq(&hpet_lock);
407 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
408 &timer->hpet_config);
413 devp->hd_ireqfreq = 0;
415 if (devp->hd_flags & HPET_PERIODIC
416 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
419 v = readq(&timer->hpet_config);
420 v ^= Tn_TYPE_CNF_MASK;
421 writeq(v, &timer->hpet_config);
424 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
425 spin_unlock_irq(&hpet_lock);
430 if (file->f_flags & FASYNC)
431 hpet_fasync(-1, file, 0);
433 file->private_data = NULL;
437 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
440 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
443 struct hpet_dev *devp;
445 devp = file->private_data;
446 return hpet_ioctl_common(devp, cmd, arg, 0);
449 static int hpet_ioctl_ieon(struct hpet_dev *devp)
451 struct hpet_timer __iomem *timer;
452 struct hpet __iomem *hpet;
455 unsigned long g, v, t, m;
456 unsigned long flags, isr;
458 timer = devp->hd_timer;
459 hpet = devp->hd_hpet;
460 hpetp = devp->hd_hpets;
462 if (!devp->hd_ireqfreq)
465 spin_lock_irq(&hpet_lock);
467 if (devp->hd_flags & HPET_IE) {
468 spin_unlock_irq(&hpet_lock);
472 devp->hd_flags |= HPET_IE;
474 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
475 devp->hd_flags |= HPET_SHARED_IRQ;
476 spin_unlock_irq(&hpet_lock);
478 irq = devp->hd_hdwirq;
481 unsigned long irq_flags;
483 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
484 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
485 ? IRQF_SHARED : IRQF_DISABLED;
486 if (request_irq(irq, hpet_interrupt, irq_flags,
487 devp->hd_name, (void *)devp)) {
488 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
494 spin_lock_irq(&hpet_lock);
495 devp->hd_flags ^= HPET_IE;
496 spin_unlock_irq(&hpet_lock);
501 t = devp->hd_ireqfreq;
502 v = readq(&timer->hpet_config);
504 /* 64-bit comparators are not yet supported through the ioctls,
505 * so force this into 32-bit mode if it supports both modes
507 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
509 if (devp->hd_flags & HPET_PERIODIC) {
510 write_counter(t, &timer->hpet_compare);
511 g |= Tn_TYPE_CNF_MASK;
512 v |= Tn_TYPE_CNF_MASK;
513 writeq(v, &timer->hpet_config);
514 v |= Tn_VAL_SET_CNF_MASK;
515 writeq(v, &timer->hpet_config);
516 local_irq_save(flags);
518 /* NOTE: what we modify here is a hidden accumulator
519 * register supported by periodic-capable comparators.
520 * We never want to modify the (single) counter; that
521 * would affect all the comparators.
523 m = read_counter(&hpet->hpet_mc);
524 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
526 local_irq_save(flags);
527 m = read_counter(&hpet->hpet_mc);
528 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
531 if (devp->hd_flags & HPET_SHARED_IRQ) {
532 isr = 1 << (devp - devp->hd_hpets->hp_dev);
533 writel(isr, &hpet->hpet_isr);
535 writeq(g, &timer->hpet_config);
536 local_irq_restore(flags);
541 /* converts Hz to number of timer ticks */
542 static inline unsigned long hpet_time_div(struct hpets *hpets,
545 unsigned long long m;
547 m = hpets->hp_tick_freq + (dis >> 1);
549 return (unsigned long)m;
553 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
555 struct hpet_timer __iomem *timer;
556 struct hpet __iomem *hpet;
567 timer = devp->hd_timer;
568 hpet = devp->hd_hpet;
569 hpetp = devp->hd_hpets;
572 return hpet_ioctl_ieon(devp);
581 if ((devp->hd_flags & HPET_IE) == 0)
583 v = readq(&timer->hpet_config);
584 v &= ~Tn_INT_ENB_CNF_MASK;
585 writeq(v, &timer->hpet_config);
587 free_irq(devp->hd_irq, devp);
590 devp->hd_flags ^= HPET_IE;
594 struct hpet_info info;
596 if (devp->hd_ireqfreq)
598 hpet_time_div(hpetp, devp->hd_ireqfreq);
600 info.hi_ireqfreq = 0;
602 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
603 info.hi_hpet = hpetp->hp_which;
604 info.hi_timer = devp - hpetp->hp_dev;
606 memcpy((void *)arg, &info, sizeof(info));
608 if (copy_to_user((void __user *)arg, &info,
614 v = readq(&timer->hpet_config);
615 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
619 devp->hd_flags |= HPET_PERIODIC;
622 v = readq(&timer->hpet_config);
623 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
627 if (devp->hd_flags & HPET_PERIODIC &&
628 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
629 v = readq(&timer->hpet_config);
630 v ^= Tn_TYPE_CNF_MASK;
631 writeq(v, &timer->hpet_config);
633 devp->hd_flags &= ~HPET_PERIODIC;
636 if (!kernel && (arg > hpet_max_freq) &&
637 !capable(CAP_SYS_RESOURCE)) {
647 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
653 static const struct file_operations hpet_fops = {
654 .owner = THIS_MODULE,
660 .release = hpet_release,
661 .fasync = hpet_fasync,
665 static int hpet_is_known(struct hpet_data *hdp)
669 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
670 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
676 static ctl_table hpet_table[] = {
678 .ctl_name = CTL_UNNUMBERED,
679 .procname = "max-user-freq",
680 .data = &hpet_max_freq,
681 .maxlen = sizeof(int),
683 .proc_handler = &proc_dointvec,
688 static ctl_table hpet_root[] = {
690 .ctl_name = CTL_UNNUMBERED,
699 static ctl_table dev_root[] = {
710 static struct ctl_table_header *sysctl_header;
713 * Adjustment for when arming the timer with
714 * initial conditions. That is, main counter
715 * ticks expired before interrupts are enabled.
717 #define TICK_CALIBRATE (1000UL)
719 static unsigned long hpet_calibrate(struct hpets *hpetp)
721 struct hpet_timer __iomem *timer = NULL;
722 unsigned long t, m, count, i, flags, start;
723 struct hpet_dev *devp;
725 struct hpet __iomem *hpet;
727 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
728 if ((devp->hd_flags & HPET_OPEN) == 0) {
729 timer = devp->hd_timer;
736 hpet = hpetp->hp_hpet;
737 t = read_counter(&timer->hpet_compare);
740 count = hpet_time_div(hpetp, TICK_CALIBRATE);
742 local_irq_save(flags);
744 start = read_counter(&hpet->hpet_mc);
747 m = read_counter(&hpet->hpet_mc);
748 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
749 } while (i++, (m - start) < count);
751 local_irq_restore(flags);
753 return (m - start) / i;
756 int hpet_alloc(struct hpet_data *hdp)
759 struct hpet_dev *devp;
763 struct hpet __iomem *hpet;
764 static struct hpets *last = NULL;
765 unsigned long period;
766 unsigned long long temp;
770 * hpet_alloc can be called by platform dependent code.
771 * If platform dependent code has allocated the hpet that
772 * ACPI has also reported, then we catch it here.
774 if (hpet_is_known(hdp)) {
775 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
780 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
781 sizeof(struct hpet_dev));
783 hpetp = kzalloc(siz, GFP_KERNEL);
788 hpetp->hp_which = hpet_nhpet++;
789 hpetp->hp_hpet = hdp->hd_address;
790 hpetp->hp_hpet_phys = hdp->hd_phys_address;
792 hpetp->hp_ntimer = hdp->hd_nirqs;
794 for (i = 0; i < hdp->hd_nirqs; i++)
795 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
797 hpet = hpetp->hp_hpet;
799 cap = readq(&hpet->hpet_cap);
801 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
803 if (hpetp->hp_ntimer != ntimer) {
804 printk(KERN_WARNING "hpet: number irqs doesn't agree"
805 " with number of timers\n");
811 last->hp_next = hpetp;
817 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
818 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
819 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
820 temp += period >> 1; /* round */
821 do_div(temp, period);
822 hpetp->hp_tick_freq = temp; /* ticks per second */
824 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
825 hpetp->hp_which, hdp->hd_phys_address,
826 hpetp->hp_ntimer > 1 ? "s" : "");
827 for (i = 0; i < hpetp->hp_ntimer; i++)
828 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
831 temp = hpetp->hp_tick_freq;
832 remainder = do_div(temp, 1000000);
834 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
835 hpetp->hp_which, hpetp->hp_ntimer,
836 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
837 (unsigned) temp, remainder);
839 mcfg = readq(&hpet->hpet_config);
840 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
841 write_counter(0L, &hpet->hpet_mc);
842 mcfg |= HPET_ENABLE_CNF_MASK;
843 writeq(mcfg, &hpet->hpet_config);
846 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
847 struct hpet_timer __iomem *timer;
849 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
851 devp->hd_hpets = hpetp;
852 devp->hd_hpet = hpet;
853 devp->hd_timer = timer;
856 * If the timer was reserved by platform code,
857 * then make timer unavailable for opens.
859 if (hdp->hd_state & (1 << i)) {
860 devp->hd_flags = HPET_OPEN;
864 init_waitqueue_head(&devp->hd_waitqueue);
867 hpetp->hp_delta = hpet_calibrate(hpetp);
869 /* This clocksource driver currently only works on ia64 */
871 if (!hpet_clocksource) {
872 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
873 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
874 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
875 clocksource_hpet.shift);
876 clocksource_register(&clocksource_hpet);
877 hpetp->hp_clocksource = &clocksource_hpet;
878 hpet_clocksource = &clocksource_hpet;
885 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
887 struct hpet_data *hdp;
889 struct acpi_resource_address64 addr;
893 status = acpi_resource_to_address64(res, &addr);
895 if (ACPI_SUCCESS(status)) {
896 hdp->hd_phys_address = addr.minimum;
897 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
899 if (hpet_is_known(hdp)) {
900 iounmap(hdp->hd_address);
901 return AE_ALREADY_EXISTS;
903 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
904 struct acpi_resource_fixed_memory32 *fixmem32;
906 fixmem32 = &res->data.fixed_memory32;
910 hdp->hd_phys_address = fixmem32->address;
911 hdp->hd_address = ioremap(fixmem32->address,
914 if (hpet_is_known(hdp)) {
915 iounmap(hdp->hd_address);
916 return AE_ALREADY_EXISTS;
918 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
919 struct acpi_resource_extended_irq *irqp;
922 irqp = &res->data.extended_irq;
924 for (i = 0; i < irqp->interrupt_count; i++) {
925 irq = acpi_register_gsi(irqp->interrupts[i],
926 irqp->triggering, irqp->polarity);
930 hdp->hd_irq[hdp->hd_nirqs] = irq;
938 static int hpet_acpi_add(struct acpi_device *device)
941 struct hpet_data data;
943 memset(&data, 0, sizeof(data));
946 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
947 hpet_resources, &data);
949 if (ACPI_FAILURE(result))
952 if (!data.hd_address || !data.hd_nirqs) {
953 printk("%s: no address or irqs in _CRS\n", __func__);
957 return hpet_alloc(&data);
960 static int hpet_acpi_remove(struct acpi_device *device, int type)
962 /* XXX need to unregister clocksource, dealloc mem, etc */
966 static const struct acpi_device_id hpet_device_ids[] = {
970 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
972 static struct acpi_driver hpet_acpi_driver = {
974 .ids = hpet_device_ids,
976 .add = hpet_acpi_add,
977 .remove = hpet_acpi_remove,
981 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
983 static int __init hpet_init(void)
987 result = misc_register(&hpet_misc);
991 sysctl_header = register_sysctl_table(dev_root);
993 result = acpi_bus_register_driver(&hpet_acpi_driver);
996 unregister_sysctl_table(sysctl_header);
997 misc_deregister(&hpet_misc);
1004 static void __exit hpet_exit(void)
1006 acpi_bus_unregister_driver(&hpet_acpi_driver);
1009 unregister_sysctl_table(sysctl_header);
1010 misc_deregister(&hpet_misc);
1015 module_init(hpet_init);
1016 module_exit(hpet_exit);
1017 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1018 MODULE_LICENSE("GPL");