Merge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6
[linux-2.6] / arch / powerpc / boot / dts / kuroboxHG.dts
1 /*
2  * Device Tree Souce for Buffalo KuroboxHG
3  *
4  * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
5  * the default configuration linkstation_defconfig.
6  *
7  * Based on sandpoint.dts
8  *
9  * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
10  *
11  * This file is licensed under
12  * the terms of the GNU General Public License version 2.  This program
13  * is licensed "as is" without any warranty of any kind, whether express
14  * or implied.
15
16 XXXX add flash parts, rtc, ??
17
18 build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
19
20
21  */
22
23 / {
24         linux,phandle = <1000>;
25         model = "KuroboxHG";
26         compatible = "linkstation";
27         #address-cells = <1>;
28         #size-cells = <1>;
29
30         cpus {
31                 linux,phandle = <2000>;
32                 #address-cells = <1>;
33                 #size-cells = <0>;
34
35                 PowerPC,603e { /* Really 8241 */
36                         linux,phandle = <2100>;
37                         device_type = "cpu";
38                         reg = <0>;
39                         clock-frequency = <fdad680>;    /* Fixed by bootwrapper */
40                         timebase-frequency = <1F04000>; /* Fixed by bootwrapper */
41                         bus-frequency = <0>;            /* From bootloader */
42                         /* Following required by dtc but not used */
43                         i-cache-line-size = <0>;
44                         d-cache-line-size = <0>;
45                         i-cache-size = <4000>;
46                         d-cache-size = <4000>;
47                 };
48         };
49
50         memory {
51                 linux,phandle = <3000>;
52                 device_type = "memory";
53                 reg = <00000000 08000000>;
54         };
55
56         soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
57                 linux,phandle = <4000>;
58                 #address-cells = <1>;
59                 #size-cells = <1>;
60                 #interrupt-cells = <2>;
61                 device_type = "soc";
62                 compatible = "mpc10x";
63                 store-gathering = <0>; /* 0 == off, !0 == on */
64                 reg = <80000000 00100000>;
65                 ranges = <80000000 80000000 70000000    /* pci mem space */
66                           fc000000 fc000000 00100000    /* EUMB */
67                           fe000000 fe000000 00c00000    /* pci i/o space */
68                           fec00000 fec00000 00300000    /* pci cfg regs */
69                           fef00000 fef00000 00100000>;  /* pci iack */
70
71                 i2c@80003000 {
72                         linux,phandle = <4300>;
73                         device_type = "i2c";
74                         compatible = "fsl-i2c";
75                         reg = <80003000 1000>;
76                         interrupts = <5 2>;
77                         interrupt-parent = <4400>;
78                 };
79
80                 serial@80004500 {
81                         linux,phandle = <4511>;
82                         device_type = "serial";
83                         compatible = "ns16550";
84                         reg = <80004500 8>;
85                         clock-frequency = <7c044a8>;
86                         current-speed = <2580>;
87                         interrupts = <9 2>;
88                         interrupt-parent = <4400>;
89                 };
90
91                 serial@80004600 {
92                         linux,phandle = <4512>;
93                         device_type = "serial";
94                         compatible = "ns16550";
95                         reg = <80004600 8>;
96                         clock-frequency = <7c044a8>;
97                         current-speed = <e100>;
98                         interrupts = <a 0>;
99                         interrupt-parent = <4400>;
100                 };
101
102                 pic@80040000 {
103                         linux,phandle = <4400>;
104                         #interrupt-cells = <2>;
105                         #address-cells = <0>;
106                         device_type = "open-pic";
107                         compatible = "chrp,open-pic";
108                         interrupt-controller;
109                         reg = <80040000 40000>;
110                         built-in;
111                 };
112
113                 pci@fec00000 {
114                         linux,phandle = <4500>;
115                         #address-cells = <3>;
116                         #size-cells = <2>;
117                         #interrupt-cells = <1>;
118                         device_type = "pci";
119                         compatible = "mpc10x-pci";
120                         reg = <fec00000 400000>;
121                         ranges = <01000000 0        0 fe000000 0 00c00000
122                                   02000000 0 80000000 80000000 0 70000000>;
123                         bus-range = <0 ff>;
124                         clock-frequency = <7f28155>;
125                         interrupt-parent = <4400>;
126                         interrupt-map-mask = <f800 0 0 7>;
127                         interrupt-map = <
128                                 /* IDSEL 11 - IRQ0 ETH */
129                                 5800 0 0 1 4400 0 1
130                                 5800 0 0 2 4400 1 1
131                                 5800 0 0 3 4400 2 1
132                                 5800 0 0 4 4400 3 1
133                                 /* IDSEL 12 - IRQ1 IDE0 */
134                                 6000 0 0 1 4400 1 1
135                                 6000 0 0 2 4400 2 1
136                                 6000 0 0 3 4400 3 1
137                                 6000 0 0 4 4400 0 1
138                                 /* IDSEL 14 - IRQ3 USB2.0 */
139                                 7000 0 0 1 4400 3 1
140                                 7000 0 0 2 4400 3 1
141                                 7000 0 0 3 4400 3 1
142                                 7000 0 0 4 4400 3 1
143                         >;
144                 };
145         };
146 };