git.oblomov.eu Git - linux-2.6/blob - arch/blackfin/kernel/setup.c

   1 /*
   2  * File:         arch/blackfin/kernel/setup.c
   3  * Based on:
   4  * Author:
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2004-2006 Analog Devices Inc.
  11  *
  12  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2 of the License, or
  17  * (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, see the file COPYING, or write
  26  * to the Free Software Foundation, Inc.,
  27  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  28  */
  29
  30 #include <linux/delay.h>
  31 #include <linux/console.h>
  32 #include <linux/bootmem.h>
  33 #include <linux/seq_file.h>
  34 #include <linux/cpu.h>
  35 #include <linux/module.h>
  36 #include <linux/tty.h>
  37
  38 #include <linux/ext2_fs.h>
  39 #include <linux/cramfs_fs.h>
  40 #include <linux/romfs_fs.h>
  41
  42 #include <asm/cplb.h>
  43 #include <asm/cacheflush.h>
  44 #include <asm/blackfin.h>
  45 #include <asm/cplbinit.h>
  46 #include <asm/fixed_code.h>
  47
  48 u16 _bfin_swrst;
  49
  50 unsigned long memory_start, memory_end, physical_mem_end;
  51 unsigned long reserved_mem_dcache_on;
  52 unsigned long reserved_mem_icache_on;
  53 EXPORT_SYMBOL(memory_start);
  54 EXPORT_SYMBOL(memory_end);
  55 EXPORT_SYMBOL(physical_mem_end);
  56 EXPORT_SYMBOL(_ramend);
  57
  58 #ifdef CONFIG_MTD_UCLINUX
  59 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  60 unsigned long _ebss;
  61 EXPORT_SYMBOL(memory_mtd_end);
  62 EXPORT_SYMBOL(memory_mtd_start);
  63 EXPORT_SYMBOL(mtd_size);
  64 #endif
  65
  66 char __initdata command_line[COMMAND_LINE_SIZE];
  67
  68 void __init bf53x_cache_init(void)
  69 {
  70 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  71         generate_cpl_tables();
  72 #endif
  73
  74 #ifdef CONFIG_BFIN_ICACHE
  75         bfin_icache_init();
  76         printk(KERN_INFO "Instruction Cache Enabled\n");
  77 #endif
  78
  79 #ifdef CONFIG_BFIN_DCACHE
  80         bfin_dcache_init();
  81         printk(KERN_INFO "Data Cache Enabled"
  82 # if defined CONFIG_BFIN_WB
  83                 " (write-back)"
  84 # elif defined CONFIG_BFIN_WT
  85                 " (write-through)"
  86 # endif
  87                 "\n");
  88 #endif
  89 }
  90
  91 void __init bf53x_relocate_l1_mem(void)
  92 {
  93         unsigned long l1_code_length;
  94         unsigned long l1_data_a_length;
  95         unsigned long l1_data_b_length;
  96
  97         l1_code_length = _etext_l1 - _stext_l1;
  98         if (l1_code_length > L1_CODE_LENGTH)
  99                 l1_code_length = L1_CODE_LENGTH;
 100         /* cannot complain as printk is not available as yet.
 101          * But we can continue booting and complain later!
 102          */
 103
 104         /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
 105         dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
 106
 107         l1_data_a_length = _ebss_l1 - _sdata_l1;
 108         if (l1_data_a_length > L1_DATA_A_LENGTH)
 109                 l1_data_a_length = L1_DATA_A_LENGTH;
 110
 111         /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
 112         dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
 113
 114         l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
 115         if (l1_data_b_length > L1_DATA_B_LENGTH)
 116                 l1_data_b_length = L1_DATA_B_LENGTH;
 117
 118         /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
 119         dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
 120                         l1_data_a_length, l1_data_b_length);
 121
 122 }
 123
 124 /*
 125  * Initial parsing of the command line.  Currently, we support:
 126  *  - Controlling the linux memory size: mem=xxx[KMG]
 127  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
 128  *       $ -> reserved memory is dcacheable
 129  *       # -> reserved memory is icacheable
 130  */
 131 static __init void parse_cmdline_early(char *cmdline_p)
 132 {
 133         char c = ' ', *to = cmdline_p;
 134         unsigned int memsize;
 135         for (;;) {
 136                 if (c == ' ') {
 137
 138                         if (!memcmp(to, "mem=", 4)) {
 139                                 to += 4;
 140                                 memsize = memparse(to, &to);
 141                                 if (memsize)
 142                                         _ramend = memsize;
 143
 144                         } else if (!memcmp(to, "max_mem=", 8)) {
 145                                 to += 8;
 146                                 memsize = memparse(to, &to);
 147                                 if (memsize) {
 148                                         physical_mem_end = memsize;
 149                                         if (*to != ' ') {
 150                                                 if (*to == '$'
 151                                                     || *(to + 1) == '$')
 152                                                         reserved_mem_dcache_on =
 153                                                             1;
 154                                                 if (*to == '#'
 155                                                     || *(to + 1) == '#')
 156                                                         reserved_mem_icache_on =
 157                                                             1;
 158                                         }
 159                                 }
 160                         }
 161
 162                 }
 163                 c = *(to++);
 164                 if (!c)
 165                         break;
 166         }
 167 }
 168
 169 void __init setup_arch(char **cmdline_p)
 170 {
 171         int bootmap_size;
 172         unsigned long l1_length, sclk, cclk;
 173 #ifdef CONFIG_MTD_UCLINUX
 174         unsigned long mtd_phys = 0;
 175 #endif
 176
 177 #ifdef CONFIG_DUMMY_CONSOLE
 178         conswitchp = &dummy_con;
 179 #endif
 180         cclk = get_cclk();
 181         sclk = get_sclk();
 182
 183 #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
 184         if (ANOMALY_05000273 && cclk == sclk)
 185                 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
 186 #endif
 187
 188 #ifdef BF561_FAMILY
 189         if (ANOMALY_05000266) {
 190                 bfin_read_IMDMA_D0_IRQ_STATUS();
 191                 bfin_read_IMDMA_D1_IRQ_STATUS();
 192         }
 193 #endif
 194
 195         printk(KERN_INFO "Hardware Trace ");
 196         if (bfin_read_TBUFCTL() & 0x1 )
 197                 printk("Active ");
 198         else
 199                 printk("Off ");
 200         if (bfin_read_TBUFCTL() & 0x2)
 201                 printk("and Enabled\n");
 202         else
 203         printk("and Disabled\n");
 204
 205
 206 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
 207         /* we need to initialize the Flashrom device here since we might
 208          * do things with flash early on in the boot
 209          */
 210         flash_probe();
 211 #endif
 212
 213 #if defined(CONFIG_CMDLINE_BOOL)
 214         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
 215         command_line[sizeof(command_line) - 1] = 0;
 216 #endif
 217
 218         /* Keep a copy of command line */
 219         *cmdline_p = &command_line[0];
 220         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 221         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
 222
 223         /* setup memory defaults from the user config */
 224         physical_mem_end = 0;
 225         _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
 226
 227         parse_cmdline_early(&command_line[0]);
 228
 229         if (physical_mem_end == 0)
 230                 physical_mem_end = _ramend;
 231
 232         /* by now the stack is part of the init task */
 233         memory_end = _ramend - DMA_UNCACHED_REGION;
 234
 235         _ramstart = (unsigned long)__bss_stop;
 236         memory_start = PAGE_ALIGN(_ramstart);
 237
 238 #if defined(CONFIG_MTD_UCLINUX)
 239         /* generic memory mapped MTD driver */
 240         memory_mtd_end = memory_end;
 241
 242         mtd_phys = _ramstart;
 243         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
 244
 245 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
 246         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
 247                 mtd_size =
 248                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
 249 # endif
 250
 251 # if defined(CONFIG_CRAMFS)
 252         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
 253                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
 254 # endif
 255
 256 # if defined(CONFIG_ROMFS_FS)
 257         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
 258             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
 259                 mtd_size =
 260                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
 261 #  if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 262         /* Due to a Hardware Anomaly we need to limit the size of usable
 263          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 264          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 265          */
 266 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 267         if (memory_end >= 56 * 1024 * 1024)
 268                 memory_end = 56 * 1024 * 1024;
 269 #   else
 270         if (memory_end >= 60 * 1024 * 1024)
 271                 memory_end = 60 * 1024 * 1024;
 272 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 273 #  endif                                /* ANOMALY_05000263 */
 274 # endif                         /* CONFIG_ROMFS_FS */
 275
 276         memory_end -= mtd_size;
 277
 278         if (mtd_size == 0) {
 279                 console_init();
 280                 panic("Don't boot kernel without rootfs attached.\n");
 281         }
 282
 283         /* Relocate MTD image to the top of memory after the uncached memory area */
 284         dma_memcpy((char *)memory_end, __bss_stop, mtd_size);
 285
 286         memory_mtd_start = memory_end;
 287         _ebss = memory_mtd_start;       /* define _ebss for compatible */
 288 #endif                          /* CONFIG_MTD_UCLINUX */
 289
 290 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 291         /* Due to a Hardware Anomaly we need to limit the size of usable
 292          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 293          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 294          */
 295 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 296         if (memory_end >= 56 * 1024 * 1024)
 297                 memory_end = 56 * 1024 * 1024;
 298 #else
 299         if (memory_end >= 60 * 1024 * 1024)
 300                 memory_end = 60 * 1024 * 1024;
 301 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 302         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
 303 #endif                          /* ANOMALY_05000263 */
 304
 305 #if !defined(CONFIG_MTD_UCLINUX)
 306         memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
 307 #endif
 308         init_mm.start_code = (unsigned long)_stext;
 309         init_mm.end_code = (unsigned long)_etext;
 310         init_mm.end_data = (unsigned long)_edata;
 311         init_mm.brk = (unsigned long)0;
 312
 313         init_leds();
 314
 315         printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
 316         if (bfin_compiled_revid() == 0xffff)
 317                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
 318         else if (bfin_compiled_revid() == -1)
 319                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
 320         else
 321                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
 322         if (bfin_revid() != bfin_compiled_revid()) {
 323                 if (bfin_compiled_revid() == -1)
 324                         printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
 325                                bfin_revid());
 326                 else if (bfin_compiled_revid() != 0xffff)
 327                         printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
 328                                bfin_compiled_revid(), bfin_revid());
 329         }
 330         if (bfin_revid() < SUPPORTED_REVID)
 331                 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
 332                        CPU, bfin_revid());
 333         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 334
 335         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
 336                cclk / 1000000,  sclk / 1000000);
 337
 338         if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
 339                 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
 340
 341         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
 342         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
 343
 344         printk(KERN_INFO "Memory map:\n"
 345                KERN_INFO "  text      = 0x%p-0x%p\n"
 346                KERN_INFO "  rodata    = 0x%p-0x%p\n"
 347                KERN_INFO "  data      = 0x%p-0x%p\n"
 348                KERN_INFO "    stack   = 0x%p-0x%p\n"
 349                KERN_INFO "  init      = 0x%p-0x%p\n"
 350                KERN_INFO "  bss       = 0x%p-0x%p\n"
 351                KERN_INFO "  available = 0x%p-0x%p\n"
 352 #ifdef CONFIG_MTD_UCLINUX
 353                KERN_INFO "  rootfs    = 0x%p-0x%p\n"
 354 #endif
 355 #if DMA_UNCACHED_REGION > 0
 356                KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
 357 #endif
 358                , _stext, _etext,
 359                __start_rodata, __end_rodata,
 360                _sdata, _edata,
 361                (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000),
 362                __init_begin, __init_end,
 363                __bss_start, __bss_stop,
 364                (void *)_ramstart, (void *)memory_end
 365 #ifdef CONFIG_MTD_UCLINUX
 366                , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
 367 #endif
 368 #if DMA_UNCACHED_REGION > 0
 369                , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
 370 #endif
 371                );
 372
 373         /*
 374          * give all the memory to the bootmap allocator,  tell it to put the
 375          * boot mem_map at the start of memory
 376          */
 377         bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT,      /* map goes here */
 378                                          PAGE_OFFSET >> PAGE_SHIFT,
 379                                          memory_end >> PAGE_SHIFT);
 380         /*
 381          * free the usable memory,  we have to make sure we do not free
 382          * the bootmem bitmap so we then reserve it after freeing it :-)
 383          */
 384         free_bootmem(memory_start, memory_end - memory_start);
 385
 386         reserve_bootmem(memory_start, bootmap_size);
 387         /*
 388          * get kmalloc into gear
 389          */
 390         paging_init();
 391
 392         /* check the size of the l1 area */
 393         l1_length = _etext_l1 - _stext_l1;
 394         if (l1_length > L1_CODE_LENGTH)
 395                 panic("L1 code memory overflow\n");
 396
 397         l1_length = _ebss_l1 - _sdata_l1;
 398         if (l1_length > L1_DATA_A_LENGTH)
 399                 panic("L1 data memory overflow\n");
 400
 401         _bfin_swrst = bfin_read_SWRST();
 402
 403         /* Copy atomic sequences to their fixed location, and sanity check that
 404            these locations are the ones that we advertise to userspace.  */
 405         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
 406                FIXED_CODE_END - FIXED_CODE_START);
 407         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
 408                != SIGRETURN_STUB - FIXED_CODE_START);
 409         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
 410                != ATOMIC_XCHG32 - FIXED_CODE_START);
 411         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
 412                != ATOMIC_CAS32 - FIXED_CODE_START);
 413         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
 414                != ATOMIC_ADD32 - FIXED_CODE_START);
 415         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
 416                != ATOMIC_SUB32 - FIXED_CODE_START);
 417         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
 418                != ATOMIC_IOR32 - FIXED_CODE_START);
 419         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
 420                != ATOMIC_AND32 - FIXED_CODE_START);
 421         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
 422                != ATOMIC_XOR32 - FIXED_CODE_START);
 423
 424         init_exception_vectors();
 425         bf53x_cache_init();
 426 }
 427
 428 static int __init topology_init(void)
 429 {
 430 #if defined (CONFIG_BF561)
 431         static struct cpu cpu[2];
 432         register_cpu(&cpu[0], 0);
 433         register_cpu(&cpu[1], 1);
 434         return 0;
 435 #else
 436         static struct cpu cpu[1];
 437         return register_cpu(cpu, 0);
 438 #endif
 439 }
 440
 441 subsys_initcall(topology_init);
 442
 443 static u_long get_vco(void)
 444 {
 445         u_long msel;
 446         u_long vco;
 447
 448         msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
 449         if (0 == msel)
 450                 msel = 64;
 451
 452         vco = CONFIG_CLKIN_HZ;
 453         vco >>= (1 & bfin_read_PLL_CTL());      /* DF bit */
 454         vco = msel * vco;
 455         return vco;
 456 }
 457
 458 /*Get the Core clock*/
 459 u_long get_cclk(void)
 460 {
 461         u_long csel, ssel;
 462         if (bfin_read_PLL_STAT() & 0x1)
 463                 return CONFIG_CLKIN_HZ;
 464
 465         ssel = bfin_read_PLL_DIV();
 466         csel = ((ssel >> 4) & 0x03);
 467         ssel &= 0xf;
 468         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
 469                 return get_vco() / ssel;
 470         return get_vco() >> csel;
 471 }
 472 EXPORT_SYMBOL(get_cclk);
 473
 474 /* Get the System clock */
 475 u_long get_sclk(void)
 476 {
 477         u_long ssel;
 478
 479         if (bfin_read_PLL_STAT() & 0x1)
 480                 return CONFIG_CLKIN_HZ;
 481
 482         ssel = (bfin_read_PLL_DIV() & 0xf);
 483         if (0 == ssel) {
 484                 printk(KERN_WARNING "Invalid System Clock\n");
 485                 ssel = 1;
 486         }
 487
 488         return get_vco() / ssel;
 489 }
 490 EXPORT_SYMBOL(get_sclk);
 491
 492 /*
 493  *      Get CPU information for use by the procfs.
 494  */
 495 static int show_cpuinfo(struct seq_file *m, void *v)
 496 {
 497         char *cpu, *mmu, *fpu, *name;
 498         uint32_t revid;
 499
 500         u_long cclk = 0, sclk = 0;
 501         u_int dcache_size = 0, dsup_banks = 0;
 502
 503         cpu = CPU;
 504         mmu = "none";
 505         fpu = "none";
 506         revid = bfin_revid();
 507         name = bfin_board_name;
 508
 509         cclk = get_cclk();
 510         sclk = get_sclk();
 511
 512         seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
 513                    "MMU:\t\t%s\n"
 514                    "FPU:\t\t%s\n"
 515                    "Core Clock:\t%9lu Hz\n"
 516                    "System Clock:\t%9lu Hz\n"
 517                    "BogoMips:\t%lu.%02lu\n"
 518                    "Calibration:\t%lu loops\n",
 519                    cpu, revid, mmu, fpu,
 520                    cclk,
 521                    sclk,
 522                    (loops_per_jiffy * HZ) / 500000,
 523                    ((loops_per_jiffy * HZ) / 5000) % 100,
 524                    (loops_per_jiffy * HZ));
 525         seq_printf(m, "Board Name:\t%s\n", name);
 526         seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20);
 527         seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20);
 528         if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC))
 529                 seq_printf(m, "I-CACHE:\tON\n");
 530         else
 531                 seq_printf(m, "I-CACHE:\tOFF\n");
 532         if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
 533                 seq_printf(m, "D-CACHE:\tON"
 534 #if defined CONFIG_BFIN_WB
 535                            " (write-back)"
 536 #elif defined CONFIG_BFIN_WT
 537                            " (write-through)"
 538 #endif
 539                            "\n");
 540         else
 541                 seq_printf(m, "D-CACHE:\tOFF\n");
 542
 543
 544         switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
 545         case ACACHE_BSRAM:
 546                 seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
 547                 dcache_size = 16;
 548                 dsup_banks = 1;
 549                 break;
 550         case ACACHE_BCACHE:
 551                 seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
 552                 dcache_size = 32;
 553                 dsup_banks = 2;
 554                 break;
 555         case ASRAM_BSRAM:
 556                 seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
 557                 dcache_size = 0;
 558                 dsup_banks = 0;
 559                 break;
 560         default:
 561                 break;
 562         }
 563
 564
 565         seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
 566         seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
 567         seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
 568                    BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
 569         seq_printf(m,
 570                    "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
 571                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
 572                    BFIN_DLINES);
 573 #ifdef CONFIG_BFIN_ICACHE_LOCK
 574         switch (read_iloc()) {
 575         case WAY0_L:
 576                 seq_printf(m, "Way0 Locked-Down\n");
 577                 break;
 578         case WAY1_L:
 579                 seq_printf(m, "Way1 Locked-Down\n");
 580                 break;
 581         case WAY01_L:
 582                 seq_printf(m, "Way0,Way1 Locked-Down\n");
 583                 break;
 584         case WAY2_L:
 585                 seq_printf(m, "Way2 Locked-Down\n");
 586                 break;
 587         case WAY02_L:
 588                 seq_printf(m, "Way0,Way2 Locked-Down\n");
 589                 break;
 590         case WAY12_L:
 591                 seq_printf(m, "Way1,Way2 Locked-Down\n");
 592                 break;
 593         case WAY012_L:
 594                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
 595                 break;
 596         case WAY3_L:
 597                 seq_printf(m, "Way3 Locked-Down\n");
 598                 break;
 599         case WAY03_L:
 600                 seq_printf(m, "Way0,Way3 Locked-Down\n");
 601                 break;
 602         case WAY13_L:
 603                 seq_printf(m, "Way1,Way3 Locked-Down\n");
 604                 break;
 605         case WAY013_L:
 606                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
 607                 break;
 608         case WAY32_L:
 609                 seq_printf(m, "Way3,Way2 Locked-Down\n");
 610                 break;
 611         case WAY320_L:
 612                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
 613                 break;
 614         case WAY321_L:
 615                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
 616                 break;
 617         case WAYALL_L:
 618                 seq_printf(m, "All Ways are locked\n");
 619                 break;
 620         default:
 621                 seq_printf(m, "No Ways are locked\n");
 622         }
 623 #endif
 624         return 0;
 625 }
 626
 627 static void *c_start(struct seq_file *m, loff_t *pos)
 628 {
 629         return *pos < NR_CPUS ? ((void *)0x12345678) : NULL;
 630 }
 631
 632 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 633 {
 634         ++*pos;
 635         return c_start(m, pos);
 636 }
 637
 638 static void c_stop(struct seq_file *m, void *v)
 639 {
 640 }
 641
 642 struct seq_operations cpuinfo_op = {
 643         .start = c_start,
 644         .next = c_next,
 645         .stop = c_stop,
 646         .show = show_cpuinfo,
 647 };
 648
 649 void __init cmdline_init(const char *r0)
 650 {
 651         if (r0)
 652                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
 653 }