2 * arch/s390/kernel/head.S
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Rob van der Heij (rvdhei@iae.nl)
10 * There are 5 different IPL methods
11 * 1) load the image directly into ram at address 0 and do an PSW restart
12 * 2) linload will load the image from address 0x10000 to memory 0x10000
13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
14 * 3) generate the tape ipl header, store the generated image on a tape
16 * In case of SL tape you need to IPL 5 times to get past VOL1 etc
17 * 4) generate the vm reader ipl header, move the generated image to the
18 * VM reader (use option NOH!) and do a ipl from reader (VM only)
19 * 5) direct call of start by the SALIPL loader
20 * We use the cpuid to distinguish between VM and native ipl
21 * params for kernel are pushed to 0x10400 (see setup.h)
24 Okt 25 2000 <rvdheij@iae.nl>
25 added code to skip HDR and EOF to allow SL tape IPL (5 retries)
26 changed first CCW from rewind to backspace block
30 #include <linux/config.h>
31 #include <asm/setup.h>
32 #include <asm/lowcore.h>
33 #include <asm/offsets.h>
34 #include <asm/thread_info.h>
39 .long 0x00080000,0x80000000+startup # Just a restart PSW
41 #ifdef CONFIG_IPL_TAPE
44 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
45 .long 0x27000000,0x60000001 # by ipl to addresses 0-23.
46 .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs).
47 .long 0x00000000,0x00000000 # external old psw
48 .long 0x00000000,0x00000000 # svc old psw
49 .long 0x00000000,0x00000000 # program check old psw
50 .long 0x00000000,0x00000000 # machine check old psw
51 .long 0x00000000,0x00000000 # io old psw
52 .long 0x00000000,0x00000000
53 .long 0x00000000,0x00000000
54 .long 0x00000000,0x00000000
55 .long 0x000a0000,0x00000058 # external new psw
56 .long 0x000a0000,0x00000060 # svc new psw
57 .long 0x000a0000,0x00000068 # program check new psw
58 .long 0x000a0000,0x00000070 # machine check new psw
59 .long 0x00080000,0x80000000+.Lioint # io new psw
63 # subroutine for loading from tape
69 la %r3,.Lorbread # r3 = address of orb
70 la %r5,.Lirb # r5 = address of irb
71 st %r2,.Lccwread+4 # initialize CCW data addresses
77 ssch 0(%r3) # load chunk of IPL_BS bytes
81 tm 8(%r5),0x82 # do we have a problem ?
84 icm %r7,3,10(%r5) # get residual count
86 la %r7,IPL_BS(%r7) # IPL_BS-residual=#bytes read
87 ar %r2,%r7 # add to total size
88 tm 8(%r5),0x01 # found a tape mark ?
90 l %r0,.Lccwread+4 # update CCW data addresses
96 br %r14 # r2 contains the total size
98 bas %r14,.Lsense # do the sensing
99 bct %r6,.Lssch # dec. retry count & branch
107 ssch 0(%r7) # start sense command
111 tm 8(%r5),0x82 # do we have a problem ?
115 # Wait for interrupt subroutine
120 c %r1,0xb8 # compare subchannel number
124 tm 8(%r5),0x82 # do we have a problem ?
126 tm 8(%r5),0x04 # got device end ?
135 .long 0x00000000,0x0080ff00,.Lccwread
138 .long 0x00000000,0x0080ff00,.Lccwsense
141 .long 0x02200000+IPL_BS,0x00000000
143 .long 0x04200001,0x00000000
145 .long 0x020a0000,0x80000000+.Lioint
147 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
148 .Lcr6: .long 0xff000000
150 .Lcrash:.long 0x000a0000,0x00000000
153 #endif /* CONFIG_IPL_TAPE */
158 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
159 .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
160 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
161 .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
162 .long 0x020000f0,0x60000050 # The next 160 byte are loaded
163 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
164 .long 0x02000190,0x60000050 # They form the continuation
165 .long 0x020001e0,0x60000050 # of the CCW program started
166 .long 0x02000230,0x60000050 # by ipl and load the range
167 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
168 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
169 .long 0x02000320,0x60000050 # in memory. At the end of
170 .long 0x02000370,0x60000050 # the channel program the PSW
171 .long 0x020003c0,0x60000050 # at location 0 is loaded.
172 .long 0x02000410,0x60000050 # Initial processing starts
173 .long 0x02000460,0x60000050 # at 0xf0 = iplstart.
174 .long 0x020004b0,0x60000050
175 .long 0x02000500,0x60000050
176 .long 0x02000550,0x60000050
177 .long 0x020005a0,0x60000050
178 .long 0x020005f0,0x60000050
179 .long 0x02000640,0x60000050
180 .long 0x02000690,0x60000050
181 .long 0x020006e0,0x20000050
185 # subroutine for loading cards from the reader
188 la %r3,.Lorb # r2 = address of orb into r2
189 la %r5,.Lirb # r4 = address of irb
193 st %r2,4(%r6) # initialize CCW data addresses
198 lctl %c6,%c6,.Lcr6 # set IO subclass mask
201 ssch 0(%r3) # load chunk of 1600 bytes
204 mvc __LC_IO_NEW_PSW(8),.Lnewpsw # set up IO interrupt psw
207 c %r1,0xb8 # compare subchannel number
212 ic %r0,8(%r5) # get device status
213 chi %r0,8 # channel end ?
215 chi %r0,12 # channel end + device end ?
219 s %r0,8(%r3) # r0/8 = number of ccws executed
220 mhi %r0,10 # *10 = number of bytes in ccws
221 lh %r3,10(%r5) # get residual count
222 sr %r0,%r3 # #ccws*80-residual=#bytes read
225 br %r14 # r2 contains the total size
228 ahi %r2,0x640 # add 0x640 to total size
232 l %r0,4(%r6) # update CCW data addresses
243 .Lorb: .long 0x00000000,0x0080ff00,.Lccws
244 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
245 .Lcr6: .long 0xff000000
248 .Lcrash:.long 0x000a0000,0x00000000
250 .long 0x00080000,0x80000000+.Lioint
252 .long 0x020a0000,0x80000000+.Lioint
256 .long 0x02600050,0x00000000
258 .long 0x02200050,0x00000000
259 #endif /* CONFIG_IPL_VM */
262 lh %r1,0xb8 # test if subchannel number
263 bct %r1,.Lnoload # is valid
264 l %r1,0xb8 # load ipl subchannel number
265 la %r2,IPL_BS # load start address
266 bas %r14,.Lloader # load rest of ipl image
267 l %r12,.Lparm # pointer to parameter area
268 st %r1,IPL_DEVICE-PARMAREA(%r12) # store ipl device number
271 # load parameter file from ipl device
274 l %r2,INITRD_START-PARMAREA(%r12) # use ramdisk location as temp
275 bas %r14,.Lloader # load parameter file
276 ltr %r2,%r2 # got anything ?
282 l %r4,INITRD_START-PARMAREA(%r12)
283 clc 0(3,%r4),.L_hdr # if it is HDRx
284 bz .Lagain1 # skip dataset header
285 clc 0(3,%r4),.L_eof # if it is EOFx
286 bz .Lagain1 # skip dateset trailer
290 tm 0(%r5),0x80 # high order bit set ?
291 bo .Ldocv # yes -> convert from EBCDIC
297 tr 0(256,%r4),0(%r3) # convert parameters to ascii
298 tr 256(256,%r4),0(%r3)
299 tr 512(256,%r4),0(%r3)
300 tr 768(122,%r4),0(%r3)
301 .Lnocv: la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
302 mvc 0(256,%r3),0(%r4)
303 mvc 256(256,%r3),256(%r4)
304 mvc 512(256,%r3),512(%r4)
305 mvc 768(122,%r3),768(%r4)
310 chi %r0,0x20 # is it a space ?
318 stc %r0,0(%r2,%r3) # terminate buffer
322 # load ramdisk from ipl device
325 l %r2,INITRD_START-PARMAREA(%r12) # load adr. of ramdisk
326 bas %r14,.Lloader # load ramdisk
327 st %r2,INITRD_SIZE-PARMAREA(%r12) # store size of ramdisk
330 st %r2,INITRD_START-PARMAREA(%r12) # no ramdisk found, null it
332 l %r2,INITRD_START-PARMAREA(%r12)
334 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
341 # reset files in VM reader
343 stidp __LC_CPUID # store cpuid
344 tm __LC_CPUID,0xff # running VM ?
350 stsch 0(%r5) # check if irq is pending
351 tm 30(%r5),0x0f # by verifying if any of the
352 bnz .Lwaitforirq # activity or status control
353 tm 31(%r5),0xff # bits is set in the schib
356 mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw
360 c %r1,0xb8 # compare subchannel number
369 .long 0x00080000,0x80000000+.Lrdrint
371 .long 0x020a0000,0x80000000+.Lrdrint
375 # everything loaded, go for it
381 .Lparm: .long PARMAREA
382 .Lstartup: .long startup
383 .Lcvtab:.long _ebcasc # ebcdic to ascii table
384 .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
385 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
386 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
387 .L_eof: .long 0xc5d6c600 /* C'EOF' */
388 .L_hdr: .long 0xc8c4d900 /* C'HDR' */
390 #endif /* CONFIG_IPL */
393 # SALIPL loader support. Based on a patch by Rob van der Heij.
394 # This entry point is called directly from the SALIPL loader and
395 # doesn't need a builtin ipl record.
400 stm %r0,%r15,0x07b0 # store registers
404 l %r8,.cmd # pointer to command buffer
406 ltr %r9,%r9 # do we have SALIPL parameters?
409 mvc 0(64,%r8),0x00b0 # copy saved registers
410 xc 64(240-64,%r8),0(%r8) # remainder of buffer
411 tr 0(64,%r8),.lowcase
414 mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
416 l %r10,.tbl # EBCDIC to ASCII table
417 tr 0(240,%r8),0(%r10)
418 stidp __LC_CPUID # Are we running on VM maybe
421 .long 0x83300060 # diag 3,0,x'0060' - storage size
424 mvc 0x68(8),.pgmnw # set up pgm check handler
437 st %r0,INITRD_SIZE-PARMAREA(%r11)
438 st %r0,INITRD_START-PARMAREA(%r11)
439 j startup # continue with startup
440 .tbl: .long _ebcasc # translate table
441 .cmd: .long COMMAND_LINE # address of command line buffer
442 .parm: .long PARMAREA
443 .memsize: .long memory_size
444 .fourmeg: .long 0x00400000 # 4M
445 .pgmnw: .long 0x00080000,.pgmx
447 .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
448 .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
449 .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
450 .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
451 .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
452 .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
453 .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
454 .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
455 .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
456 .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
457 .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
458 .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
459 .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
460 .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
461 .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
462 .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
464 .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
465 .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
466 .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
467 .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
468 .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
469 .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
470 .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
471 .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
472 .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
473 .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
474 .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
475 .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
476 .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
477 .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
478 .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
479 .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
482 # startup-code at 0x10000, running in real mode
483 # this is called either by the ipl loader or directly by PSW restart
484 # or linload or SALIPL
487 startup:basr %r13,0 # get base
488 .LPG1: lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
489 la %r12,_pstart-.LPG1(%r13) # pointer to parameter area
490 # move IPL device to lowcore
491 mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
496 l %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
497 l %r3,.Lbss_end-.LPG1(%r13) # end of bss
498 sr %r3,%r2 # length of bss
500 sr %r5,%r5 # set src,length and pad to zero
502 mvcle %r2,%r4,0 # clear mem
503 jo .-4 # branch back, if not finish
505 l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
507 stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
509 stctl %r0, %r0,.Lcr-.LPG1(%r13) # get cr0
510 la %r1,0x200 # set bit 22
511 o %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
512 st %r1,.Lcr-.LPG1(%r13)
513 lctl %r0, %r0,.Lcr-.LPG1(%r13) # load modified cr0
515 mvc __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
516 la %r1, .Lsclph-.LPG1(%r13)
517 a %r1,__LC_EXT_NEW_PSW+4 # set handler
518 st %r1,__LC_EXT_NEW_PSW+4
520 la %r4,_pstart-.LPG1(%r13) # %r4 is our index for sccb stuff
521 la %r1, .Lsccb-PARMAREA(%r4) # our sccb
522 .insn rre,0xb2200000,%r2,%r1 # service call
524 srl %r1,28 # get cc code
527 be .Lfchunk-.LPG1(%r13) # leave
529 be .Lservicecall-.LPG1(%r13)
530 lpsw .Lwaitsclp-.LPG1(%r13)
532 lh %r1,.Lsccbr-PARMAREA(%r4)
533 chi %r1,0x10 # 0x0010 is the sucess code
534 je .Lprocsccb # let's process the sccb
536 bne .Lfchunk-.LPG1(%r13) # unhandled error code
537 c %r2, .Lrcp-.LPG1(%r13) # Did we try Read SCP forced
538 bne .Lfchunk-.LPG1(%r13) # if no, give up
539 l %r2, .Lrcp2-.LPG1(%r13) # try with Read SCP
540 b .Lservicecall-.LPG1(%r13)
543 icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0
545 lhi %r1,0x800 # otherwise report 2GB
547 lhi %r3,0x800 # limit reported memory size to 2GB
552 xr %r3,%r3 # same logic
553 ic %r3,.Lscpa1-PARMAREA(%r4)
556 l %r3,.Lscpa2-PARMAREA(%r13)
558 mr %r2,%r1 # mem in MB on 128-bit
559 l %r1,.Lonemb-.LPG1(%r13)
560 mr %r2,%r1 # mem size in bytes in %r3
561 b .Lfchunk-.LPG1(%r13)
566 .Lpcext:.long 0x00080000,0x80000000
568 .long 0x00 # place holder for cr0
573 .int 0x00120001 # Read SCP forced code
575 .int 0x00020001 # Read SCP code
581 # find memory chunks.
583 lr %r9,%r3 # end of mem
584 mvc __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
585 la %r1,1 # test in increments of 128KB
587 l %r3,.Lmchunk-.LPG1(%r13) # get pointer to memory_chunk array
588 slr %r4,%r4 # set start of chunk to zero
589 slr %r5,%r5 # set end of chunk to zero
590 slr %r6,%r6 # set access code to zero
591 la %r10, MEMORY_CHUNKS # number of chunks
593 tprot 0(%r5),0 # test protection of first byte
596 clr %r6,%r7 # compare cc with last access code
597 be .Lsame-.LPG1(%r13)
598 b .Lchkmem-.LPG1(%r13)
600 ar %r5,%r1 # add 128KB to end of chunk
601 bno .Lloop-.LPG1(%r13) # r1 < 0x80000000 -> loop
602 .Lchkmem: # > 2GB or tprot got a program check
603 clr %r4,%r5 # chunk size > 0?
604 be .Lchkloop-.LPG1(%r13)
605 st %r4,0(%r3) # store start address of chunk
608 st %r0,4(%r3) # store size of chunk
609 st %r6,8(%r3) # store type of chunk
611 l %r4,.Lmemsize-.LPG1(%r13) # address of variable memory_size
612 st %r5,0(%r4) # store last end to memory size
613 ahi %r10,-1 # update chunk number
615 lr %r6,%r7 # set access code to last cc
616 # we got an exception or we're starting a new
617 # chunk , we must check if we should
618 # still try to find valid memory (if we detected
619 # the amount of available storage), and if we
622 clr %r0,%r9 # did we detect memory?
623 je .Ldonemem # if not, leave
624 chi %r10,0 # do we have chunks left?
626 alr %r5,%r1 # add 128KB to end of chunk
627 lr %r4,%r5 # potential new chunk
628 clr %r5,%r9 # should we go on?
631 l %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
633 # find out if we are running under VM
635 stidp __LC_CPUID # store cpuid
636 tm __LC_CPUID,0xff # running under VM ?
637 bno .Lnovm-.LPG1(%r13)
638 oi 3(%r12),1 # set VM flag
640 lh %r0,__LC_CPUID+4 # get cpu version
641 chi %r0,0x7490 # running on a P/390 ?
642 bne .Lnop390-.LPG1(%r13)
643 oi 3(%r12),4 # set P/390 flag
647 # find out if we have an IEEE fpu
649 mvc __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
650 efpc %r0,0 # test IEEE extract fpc instruction
651 oi 3(%r12),2 # set IEEE fpu flag
655 # find out if we have the CSP instruction
657 mvc __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
661 csp %r0,%r2 # Test CSP instruction
662 oi 3(%r12),8 # set CSP flag
666 # find out if we have the MVPG instruction
668 mvc __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
672 mvpg %r1,%r2 # Test CSP instruction
673 oi 3(%r12),16 # set MVPG flag
677 # find out if we have the IDTE instruction
679 mvc __LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
680 .long 0xb2b10000 # store facility list
681 tm 0xc8,0x08 # check bit for clearing-by-ASCE
682 bno .Lchkidte-.LPG1(%r13)
686 oi 3(%r12),0x80 # set IDTE flag
689 lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
690 # virtual and never return ...
692 .Lentry:.long 0x00080000,0x80000000 + _stext
693 .Lctl: .long 0x04b50002 # cr0: various things
694 .long 0 # cr1: primary space segment table
695 .long .Lduct # cr2: dispatchable unit control table
696 .long 0 # cr3: instruction authorization
697 .long 0 # cr4: instruction authorization
698 .long 0xffffffff # cr5: primary-aste origin
699 .long 0 # cr6: I/O interrupts
700 .long 0 # cr7: secondary space segment table
701 .long 0 # cr8: access registers translation
702 .long 0 # cr9: tracing off
703 .long 0 # cr10: tracing off
704 .long 0 # cr11: tracing off
705 .long 0 # cr12: tracing off
706 .long 0 # cr13: home space segment table
707 .long 0xc0000000 # cr14: machine check handling off
708 .long 0 # cr15: linkage stack operations
709 .Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem
710 .Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
711 .Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
712 .Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
713 .Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
714 .Lmemsize:.long memory_size
715 .Lmchunk:.long memory_chunk
716 .Lmflags:.long machine_flags
717 .Lbss_bgn: .long __bss_start
718 .Lbss_end: .long _end
721 .Lduct: .long 0,0,0,0,0,0,0,0
722 .long 0,0,0,0,0,0,0,0
725 # params at 10400 (setup.h)
730 .long 0,0 # IPL_DEVICE
731 .long 0,RAMDISK_ORIGIN # INITRD_START
732 .long 0,RAMDISK_SIZE # INITRD_SIZE
735 .byte "root=/dev/ram0 ro"
739 .hword 0x1000 # length, one page
741 .byte 0x80 # variable response bit set
743 .hword 0x00 # response code
758 #ifdef CONFIG_SHARED_KERNEL
763 # startup-code, running in virtual mode
766 _stext: basr %r13,0 # get base
771 l %r15,.Linittu-.LPG2(%r13)
772 mvc __LC_CURRENT(4),__TI_task(%r15)
773 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
774 st %r15,__LC_KERNEL_STACK # set end of kernel stack
776 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
778 # check control registers
779 stctl %c0,%c15,0(%r15)
780 oi 2(%r15),0x40 # enable sigp emergency signal
781 oi 0(%r15),0x10 # switch on low address protection
782 lctl %c0,%c15,0(%r15)
785 lam 0,15,.Laregs-.LPG2(%r13) # load access regs needed by uaccess
786 l %r14,.Lstart-.LPG2(%r13)
787 basr %r14,%r14 # call start_kernel
789 # We returned from start_kernel ?!? PANIK
792 lpsw .Ldw-.(%r13) # load disabled wait psw
795 .Ldw: .long 0x000a0000,0x00000000
796 .Linittu: .long init_thread_union
797 .Lstart: .long start_kernel
798 .Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0