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   1 /*
   2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
   3  *
   4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
   5  *
   6  *
   7  * Card specific code is based on XFree86's neomagic driver.
   8  * Framebuffer framework code is based on code of cyber2000fb.
   9  *
  10  * This file is subject to the terms and conditions of the GNU General
  11  * Public License.  See the file COPYING in the main directory of this
  12  * archive for more details.
  13  *
  14  *
  15  * 0.4.1
  16  *  - Cosmetic changes (dok)
  17  *
  18  * 0.4
  19  *  - Toshiba Libretto support, allow modes larger than LCD size if
  20  *    LCD is disabled, keep BIOS settings if internal/external display
  21  *    haven't been enabled explicitly
  22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
  23  *
  24  * 0.3.3
  25  *  - Porting over to new fbdev api. (jsimmons)
  26  *
  27  * 0.3.2
  28  *  - got rid of all floating point (dok)
  29  *
  30  * 0.3.1
  31  *  - added module license (dok)
  32  *
  33  * 0.3
  34  *  - hardware accelerated clear and move for 2200 and above (dok)
  35  *  - maximum allowed dotclock is handled now (dok)
  36  *
  37  * 0.2.1
  38  *  - correct panning after X usage (dok)
  39  *  - added module and kernel parameters (dok)
  40  *  - no stretching if external display is enabled (dok)
  41  *
  42  * 0.2
  43  *  - initial version (dok)
  44  *
  45  *
  46  * TODO
  47  * - ioctl for internal/external switching
  48  * - blanking
  49  * - 32bit depth support, maybe impossible
  50  * - disable pan-on-sync, need specs
  51  *
  52  * BUGS
  53  * - white margin on bootup like with tdfxfb (colormap problem?)
  54  *
  55  */
  56
  57 #include <linux/module.h>
  58 #include <linux/kernel.h>
  59 #include <linux/errno.h>
  60 #include <linux/string.h>
  61 #include <linux/mm.h>
  62 #include <linux/slab.h>
  63 #include <linux/delay.h>
  64 #include <linux/fb.h>
  65 #include <linux/pci.h>
  66 #include <linux/init.h>
  67 #ifdef CONFIG_TOSHIBA
  68 #include <linux/toshiba.h>
  69 #endif
  70
  71 #include <asm/io.h>
  72 #include <asm/irq.h>
  73 #include <asm/pgtable.h>
  74 #include <asm/system.h>
  75
  76 #ifdef CONFIG_MTRR
  77 #include <asm/mtrr.h>
  78 #endif
  79
  80 #include <video/vga.h>
  81 #include <video/neomagic.h>
  82
  83 #define NEOFB_VERSION "0.4.2"
  84
  85 /* --------------------------------------------------------------------- */
  86
  87 static int internal;
  88 static int external;
  89 static int libretto;
  90 static int nostretch;
  91 static int nopciburst;
  92 static char *mode_option __devinitdata = NULL;
  93
  94 #ifdef MODULE
  95
  96 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
  97 MODULE_LICENSE("GPL");
  98 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
  99 module_param(internal, bool, 0);
 100 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
 101 module_param(external, bool, 0);
 102 MODULE_PARM_DESC(external, "Enable output on external CRT.");
 103 module_param(libretto, bool, 0);
 104 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
 105 module_param(nostretch, bool, 0);
 106 MODULE_PARM_DESC(nostretch,
 107                  "Disable stretching of modes smaller than LCD.");
 108 module_param(nopciburst, bool, 0);
 109 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
 110 module_param(mode_option, charp, 0);
 111 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
 112
 113 #endif
 114
 115
 116 /* --------------------------------------------------------------------- */
 117
 118 static biosMode bios8[] = {
 119         {320, 240, 0x40},
 120         {300, 400, 0x42},
 121         {640, 400, 0x20},
 122         {640, 480, 0x21},
 123         {800, 600, 0x23},
 124         {1024, 768, 0x25},
 125 };
 126
 127 static biosMode bios16[] = {
 128         {320, 200, 0x2e},
 129         {320, 240, 0x41},
 130         {300, 400, 0x43},
 131         {640, 480, 0x31},
 132         {800, 600, 0x34},
 133         {1024, 768, 0x37},
 134 };
 135
 136 static biosMode bios24[] = {
 137         {640, 480, 0x32},
 138         {800, 600, 0x35},
 139         {1024, 768, 0x38}
 140 };
 141
 142 #ifdef NO_32BIT_SUPPORT_YET
 143 /* FIXME: guessed values, wrong */
 144 static biosMode bios32[] = {
 145         {640, 480, 0x33},
 146         {800, 600, 0x36},
 147         {1024, 768, 0x39}
 148 };
 149 #endif
 150
 151 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
 152 {
 153         writel(val, par->neo2200 + par->cursorOff + regindex);
 154 }
 155
 156 static int neoFindMode(int xres, int yres, int depth)
 157 {
 158         int xres_s;
 159         int i, size;
 160         biosMode *mode;
 161
 162         switch (depth) {
 163         case 8:
 164                 size = ARRAY_SIZE(bios8);
 165                 mode = bios8;
 166                 break;
 167         case 16:
 168                 size = ARRAY_SIZE(bios16);
 169                 mode = bios16;
 170                 break;
 171         case 24:
 172                 size = ARRAY_SIZE(bios24);
 173                 mode = bios24;
 174                 break;
 175 #ifdef NO_32BIT_SUPPORT_YET
 176         case 32:
 177                 size = ARRAY_SIZE(bios32);
 178                 mode = bios32;
 179                 break;
 180 #endif
 181         default:
 182                 return 0;
 183         }
 184
 185         for (i = 0; i < size; i++) {
 186                 if (xres <= mode[i].x_res) {
 187                         xres_s = mode[i].x_res;
 188                         for (; i < size; i++) {
 189                                 if (mode[i].x_res != xres_s)
 190                                         return mode[i - 1].mode;
 191                                 if (yres <= mode[i].y_res)
 192                                         return mode[i].mode;
 193                         }
 194                 }
 195         }
 196         return mode[size - 1].mode;
 197 }
 198
 199 /*
 200  * neoCalcVCLK --
 201  *
 202  * Determine the closest clock frequency to the one requested.
 203  */
 204 #define REF_FREQ 0xe517         /* 14.31818 in 20.12 fixed point */
 205 #define MAX_N 127
 206 #define MAX_D 31
 207 #define MAX_F 1
 208
 209 static void neoCalcVCLK(const struct fb_info *info,
 210                         struct neofb_par *par, long freq)
 211 {
 212         int n, d, f;
 213         int n_best = 0, d_best = 0, f_best = 0;
 214         long f_best_diff = (0x7ffff << 12);     /* 20.12 */
 215         long f_target = (freq << 12) / 1000;    /* 20.12 */
 216
 217         for (f = 0; f <= MAX_F; f++)
 218                 for (n = 0; n <= MAX_N; n++)
 219                         for (d = 0; d <= MAX_D; d++) {
 220                                 long f_out;     /* 20.12 */
 221                                 long f_diff;    /* 20.12 */
 222
 223                                 f_out =
 224                                     ((((n + 1) << 12) / ((d +
 225                                                           1) *
 226                                                          (1 << f))) >> 12)
 227                                     * REF_FREQ;
 228                                 f_diff = abs(f_out - f_target);
 229                                 if (f_diff < f_best_diff) {
 230                                         f_best_diff = f_diff;
 231                                         n_best = n;
 232                                         d_best = d;
 233                                         f_best = f;
 234                                 }
 235                         }
 236
 237         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
 238             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
 239             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
 240             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
 241                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
 242                    We should be able to try n up to 2047 */
 243                 par->VCLK3NumeratorLow = n_best;
 244                 par->VCLK3NumeratorHigh = (f_best << 7);
 245         } else
 246                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
 247
 248         par->VCLK3Denominator = d_best;
 249
 250 #ifdef NEOFB_DEBUG
 251         printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
 252                f_target >> 12,
 253                par->VCLK3NumeratorLow,
 254                par->VCLK3NumeratorHigh,
 255                par->VCLK3Denominator, f_best_diff >> 12);
 256 #endif
 257 }
 258
 259 /*
 260  * vgaHWInit --
 261  *      Handle the initialization, etc. of a screen.
 262  *      Return FALSE on failure.
 263  */
 264
 265 static int vgaHWInit(const struct fb_var_screeninfo *var,
 266                      const struct fb_info *info,
 267                      struct neofb_par *par, struct xtimings *timings)
 268 {
 269         par->MiscOutReg = 0x23;
 270
 271         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
 272                 par->MiscOutReg |= 0x40;
 273
 274         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
 275                 par->MiscOutReg |= 0x80;
 276
 277         /*
 278          * Time Sequencer
 279          */
 280         par->Sequencer[0] = 0x00;
 281         par->Sequencer[1] = 0x01;
 282         par->Sequencer[2] = 0x0F;
 283         par->Sequencer[3] = 0x00;       /* Font select */
 284         par->Sequencer[4] = 0x0E;       /* Misc */
 285
 286         /*
 287          * CRTC Controller
 288          */
 289         par->CRTC[0] = (timings->HTotal >> 3) - 5;
 290         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
 291         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
 292         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
 293         par->CRTC[4] = (timings->HSyncStart >> 3);
 294         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
 295             | (((timings->HSyncEnd >> 3)) & 0x1F);
 296         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
 297         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
 298             | (((timings->VDisplay - 1) & 0x100) >> 7)
 299             | ((timings->VSyncStart & 0x100) >> 6)
 300             | (((timings->VDisplay - 1) & 0x100) >> 5)
 301             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
 302             | (((timings->VDisplay - 1) & 0x200) >> 3)
 303             | ((timings->VSyncStart & 0x200) >> 2);
 304         par->CRTC[8] = 0x00;
 305         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
 306
 307         if (timings->dblscan)
 308                 par->CRTC[9] |= 0x80;
 309
 310         par->CRTC[10] = 0x00;
 311         par->CRTC[11] = 0x00;
 312         par->CRTC[12] = 0x00;
 313         par->CRTC[13] = 0x00;
 314         par->CRTC[14] = 0x00;
 315         par->CRTC[15] = 0x00;
 316         par->CRTC[16] = timings->VSyncStart & 0xFF;
 317         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
 318         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
 319         par->CRTC[19] = var->xres_virtual >> 4;
 320         par->CRTC[20] = 0x00;
 321         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
 322         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
 323         par->CRTC[23] = 0xC3;
 324         par->CRTC[24] = 0xFF;
 325
 326         /*
 327          * are these unnecessary?
 328          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 329          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 330          */
 331
 332         /*
 333          * Graphics Display Controller
 334          */
 335         par->Graphics[0] = 0x00;
 336         par->Graphics[1] = 0x00;
 337         par->Graphics[2] = 0x00;
 338         par->Graphics[3] = 0x00;
 339         par->Graphics[4] = 0x00;
 340         par->Graphics[5] = 0x40;
 341         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
 342         par->Graphics[7] = 0x0F;
 343         par->Graphics[8] = 0xFF;
 344
 345
 346         par->Attribute[0] = 0x00;       /* standard colormap translation */
 347         par->Attribute[1] = 0x01;
 348         par->Attribute[2] = 0x02;
 349         par->Attribute[3] = 0x03;
 350         par->Attribute[4] = 0x04;
 351         par->Attribute[5] = 0x05;
 352         par->Attribute[6] = 0x06;
 353         par->Attribute[7] = 0x07;
 354         par->Attribute[8] = 0x08;
 355         par->Attribute[9] = 0x09;
 356         par->Attribute[10] = 0x0A;
 357         par->Attribute[11] = 0x0B;
 358         par->Attribute[12] = 0x0C;
 359         par->Attribute[13] = 0x0D;
 360         par->Attribute[14] = 0x0E;
 361         par->Attribute[15] = 0x0F;
 362         par->Attribute[16] = 0x41;
 363         par->Attribute[17] = 0xFF;
 364         par->Attribute[18] = 0x0F;
 365         par->Attribute[19] = 0x00;
 366         par->Attribute[20] = 0x00;
 367         return 0;
 368 }
 369
 370 static void vgaHWLock(struct vgastate *state)
 371 {
 372         /* Protect CRTC[0-7] */
 373         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
 374 }
 375
 376 static void vgaHWUnlock(void)
 377 {
 378         /* Unprotect CRTC[0-7] */
 379         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
 380 }
 381
 382 static void neoLock(struct vgastate *state)
 383 {
 384         vga_wgfx(state->vgabase, 0x09, 0x00);
 385         vgaHWLock(state);
 386 }
 387
 388 static void neoUnlock(void)
 389 {
 390         vgaHWUnlock();
 391         vga_wgfx(NULL, 0x09, 0x26);
 392 }
 393
 394 /*
 395  * VGA Palette management
 396  */
 397 static int paletteEnabled = 0;
 398
 399 static inline void VGAenablePalette(void)
 400 {
 401         vga_r(NULL, VGA_IS1_RC);
 402         vga_w(NULL, VGA_ATT_W, 0x00);
 403         paletteEnabled = 1;
 404 }
 405
 406 static inline void VGAdisablePalette(void)
 407 {
 408         vga_r(NULL, VGA_IS1_RC);
 409         vga_w(NULL, VGA_ATT_W, 0x20);
 410         paletteEnabled = 0;
 411 }
 412
 413 static inline void VGAwATTR(u8 index, u8 value)
 414 {
 415         if (paletteEnabled)
 416                 index &= ~0x20;
 417         else
 418                 index |= 0x20;
 419
 420         vga_r(NULL, VGA_IS1_RC);
 421         vga_wattr(NULL, index, value);
 422 }
 423
 424 static void vgaHWProtect(int on)
 425 {
 426         unsigned char tmp;
 427
 428         if (on) {
 429                 /*
 430                  * Turn off screen and disable sequencer.
 431                  */
 432                 tmp = vga_rseq(NULL, 0x01);
 433                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
 434                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
 435
 436                 VGAenablePalette();
 437         } else {
 438                 /*
 439                  * Reenable sequencer, then turn on screen.
 440                  */
 441                 tmp = vga_rseq(NULL, 0x01);
 442                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
 443                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
 444
 445                 VGAdisablePalette();
 446         }
 447 }
 448
 449 static void vgaHWRestore(const struct fb_info *info,
 450                          const struct neofb_par *par)
 451 {
 452         int i;
 453
 454         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
 455
 456         for (i = 1; i < 5; i++)
 457                 vga_wseq(NULL, i, par->Sequencer[i]);
 458
 459         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
 460         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
 461
 462         for (i = 0; i < 25; i++)
 463                 vga_wcrt(NULL, i, par->CRTC[i]);
 464
 465         for (i = 0; i < 9; i++)
 466                 vga_wgfx(NULL, i, par->Graphics[i]);
 467
 468         VGAenablePalette();
 469
 470         for (i = 0; i < 21; i++)
 471                 VGAwATTR(i, par->Attribute[i]);
 472
 473         VGAdisablePalette();
 474 }
 475
 476
 477 /* -------------------- Hardware specific routines ------------------------- */
 478
 479 /*
 480  * Hardware Acceleration for Neo2200+
 481  */
 482 static inline int neo2200_sync(struct fb_info *info)
 483 {
 484         struct neofb_par *par = info->par;
 485
 486         while (readl(&par->neo2200->bltStat) & 1);
 487         return 0;
 488 }
 489
 490 static inline void neo2200_wait_fifo(struct fb_info *info,
 491                                      int requested_fifo_space)
 492 {
 493         //  ndev->neo.waitfifo_calls++;
 494         //  ndev->neo.waitfifo_sum += requested_fifo_space;
 495
 496         /* FIXME: does not work
 497            if (neo_fifo_space < requested_fifo_space)
 498            {
 499            neo_fifo_waitcycles++;
 500
 501            while (1)
 502            {
 503            neo_fifo_space = (neo2200->bltStat >> 8);
 504            if (neo_fifo_space >= requested_fifo_space)
 505            break;
 506            }
 507            }
 508            else
 509            {
 510            neo_fifo_cache_hits++;
 511            }
 512
 513            neo_fifo_space -= requested_fifo_space;
 514          */
 515
 516         neo2200_sync(info);
 517 }
 518
 519 static inline void neo2200_accel_init(struct fb_info *info,
 520                                       struct fb_var_screeninfo *var)
 521 {
 522         struct neofb_par *par = info->par;
 523         Neo2200 __iomem *neo2200 = par->neo2200;
 524         u32 bltMod, pitch;
 525
 526         neo2200_sync(info);
 527
 528         switch (var->bits_per_pixel) {
 529         case 8:
 530                 bltMod = NEO_MODE1_DEPTH8;
 531                 pitch = var->xres_virtual;
 532                 break;
 533         case 15:
 534         case 16:
 535                 bltMod = NEO_MODE1_DEPTH16;
 536                 pitch = var->xres_virtual * 2;
 537                 break;
 538         case 24:
 539                 bltMod = NEO_MODE1_DEPTH24;
 540                 pitch = var->xres_virtual * 3;
 541                 break;
 542         default:
 543                 printk(KERN_ERR
 544                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
 545                 return;
 546         }
 547
 548         writel(bltMod << 16, &neo2200->bltStat);
 549         writel((pitch << 16) | pitch, &neo2200->pitch);
 550 }
 551
 552 /* --------------------------------------------------------------------- */
 553
 554 static int
 555 neofb_open(struct fb_info *info, int user)
 556 {
 557         struct neofb_par *par = info->par;
 558
 559         mutex_lock(&par->open_lock);
 560         if (!par->ref_count) {
 561                 memset(&par->state, 0, sizeof(struct vgastate));
 562                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
 563                 save_vga(&par->state);
 564         }
 565         par->ref_count++;
 566         mutex_unlock(&par->open_lock);
 567
 568         return 0;
 569 }
 570
 571 static int
 572 neofb_release(struct fb_info *info, int user)
 573 {
 574         struct neofb_par *par = info->par;
 575
 576         mutex_lock(&par->open_lock);
 577         if (!par->ref_count) {
 578                 mutex_unlock(&par->open_lock);
 579                 return -EINVAL;
 580         }
 581         if (par->ref_count == 1) {
 582                 restore_vga(&par->state);
 583         }
 584         par->ref_count--;
 585         mutex_unlock(&par->open_lock);
 586
 587         return 0;
 588 }
 589
 590 static int
 591 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 592 {
 593         struct neofb_par *par = info->par;
 594         unsigned int pixclock = var->pixclock;
 595         struct xtimings timings;
 596         int memlen, vramlen;
 597         int mode_ok = 0;
 598
 599         DBG("neofb_check_var");
 600
 601         if (!pixclock)
 602                 pixclock = 10000;       /* 10ns = 100MHz */
 603         timings.pixclock = 1000000000 / pixclock;
 604         if (timings.pixclock < 1)
 605                 timings.pixclock = 1;
 606
 607         if (timings.pixclock > par->maxClock)
 608                 return -EINVAL;
 609
 610         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
 611         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
 612         timings.HDisplay = var->xres;
 613         timings.HSyncStart = timings.HDisplay + var->right_margin;
 614         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
 615         timings.HTotal = timings.HSyncEnd + var->left_margin;
 616         timings.VDisplay = var->yres;
 617         timings.VSyncStart = timings.VDisplay + var->lower_margin;
 618         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
 619         timings.VTotal = timings.VSyncEnd + var->upper_margin;
 620         timings.sync = var->sync;
 621
 622         /* Is the mode larger than the LCD panel? */
 623         if (par->internal_display &&
 624             ((var->xres > par->NeoPanelWidth) ||
 625              (var->yres > par->NeoPanelHeight))) {
 626                 printk(KERN_INFO
 627                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
 628                        var->xres, var->yres, par->NeoPanelWidth,
 629                        par->NeoPanelHeight);
 630                 return -EINVAL;
 631         }
 632
 633         /* Is the mode one of the acceptable sizes? */
 634         if (!par->internal_display)
 635                 mode_ok = 1;
 636         else {
 637                 switch (var->xres) {
 638                 case 1280:
 639                         if (var->yres == 1024)
 640                                 mode_ok = 1;
 641                         break;
 642                 case 1024:
 643                         if (var->yres == 768)
 644                                 mode_ok = 1;
 645                         break;
 646                 case 800:
 647                         if (var->yres == (par->libretto ? 480 : 600))
 648                                 mode_ok = 1;
 649                         break;
 650                 case 640:
 651                         if (var->yres == 480)
 652                                 mode_ok = 1;
 653                         break;
 654                 }
 655         }
 656
 657         if (!mode_ok) {
 658                 printk(KERN_INFO
 659                        "Mode (%dx%d) won't display properly on LCD\n",
 660                        var->xres, var->yres);
 661                 return -EINVAL;
 662         }
 663
 664         var->red.msb_right = 0;
 665         var->green.msb_right = 0;
 666         var->blue.msb_right = 0;
 667         var->transp.msb_right = 0;
 668
 669         switch (var->bits_per_pixel) {
 670         case 8:         /* PSEUDOCOLOUR, 256 */
 671                 var->transp.offset = 0;
 672                 var->transp.length = 0;
 673                 var->red.offset = 0;
 674                 var->red.length = 8;
 675                 var->green.offset = 0;
 676                 var->green.length = 8;
 677                 var->blue.offset = 0;
 678                 var->blue.length = 8;
 679                 break;
 680
 681         case 16:                /* DIRECTCOLOUR, 64k */
 682                 var->transp.offset = 0;
 683                 var->transp.length = 0;
 684                 var->red.offset = 11;
 685                 var->red.length = 5;
 686                 var->green.offset = 5;
 687                 var->green.length = 6;
 688                 var->blue.offset = 0;
 689                 var->blue.length = 5;
 690                 break;
 691
 692         case 24:                /* TRUECOLOUR, 16m */
 693                 var->transp.offset = 0;
 694                 var->transp.length = 0;
 695                 var->red.offset = 16;
 696                 var->red.length = 8;
 697                 var->green.offset = 8;
 698                 var->green.length = 8;
 699                 var->blue.offset = 0;
 700                 var->blue.length = 8;
 701                 break;
 702
 703 #ifdef NO_32BIT_SUPPORT_YET
 704         case 32:                /* TRUECOLOUR, 16m */
 705                 var->transp.offset = 24;
 706                 var->transp.length = 8;
 707                 var->red.offset = 16;
 708                 var->red.length = 8;
 709                 var->green.offset = 8;
 710                 var->green.length = 8;
 711                 var->blue.offset = 0;
 712                 var->blue.length = 8;
 713                 break;
 714 #endif
 715         default:
 716                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
 717                        var->bits_per_pixel);
 718                 return -EINVAL;
 719         }
 720
 721         vramlen = info->fix.smem_len;
 722         if (vramlen > 4 * 1024 * 1024)
 723                 vramlen = 4 * 1024 * 1024;
 724
 725         if (var->yres_virtual < var->yres)
 726                 var->yres_virtual = var->yres;
 727         if (var->xres_virtual < var->xres)
 728                 var->xres_virtual = var->xres;
 729
 730         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
 731
 732         if (memlen > vramlen) {
 733                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
 734                                         var->bits_per_pixel);
 735                 memlen = var->xres_virtual * var->bits_per_pixel *
 736                                 var->yres_virtual / 8;
 737         }
 738
 739         /* we must round yres/xres down, we already rounded y/xres_virtual up
 740            if it was possible. We should return -EINVAL, but I disagree */
 741         if (var->yres_virtual < var->yres)
 742                 var->yres = var->yres_virtual;
 743         if (var->xres_virtual < var->xres)
 744                 var->xres = var->xres_virtual;
 745         if (var->xoffset + var->xres > var->xres_virtual)
 746                 var->xoffset = var->xres_virtual - var->xres;
 747         if (var->yoffset + var->yres > var->yres_virtual)
 748                 var->yoffset = var->yres_virtual - var->yres;
 749
 750         var->nonstd = 0;
 751         var->height = -1;
 752         var->width = -1;
 753
 754         if (var->bits_per_pixel >= 24 || !par->neo2200)
 755                 var->accel_flags &= ~FB_ACCELF_TEXT;
 756         return 0;
 757 }
 758
 759 static int neofb_set_par(struct fb_info *info)
 760 {
 761         struct neofb_par *par = info->par;
 762         struct xtimings timings;
 763         unsigned char temp;
 764         int i, clock_hi = 0;
 765         int lcd_stretch;
 766         int hoffset, voffset;
 767
 768         DBG("neofb_set_par");
 769
 770         neoUnlock();
 771
 772         vgaHWProtect(1);        /* Blank the screen */
 773
 774         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
 775         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
 776         timings.HDisplay = info->var.xres;
 777         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
 778         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
 779         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
 780         timings.VDisplay = info->var.yres;
 781         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
 782         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
 783         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
 784         timings.sync = info->var.sync;
 785         timings.pixclock = PICOS2KHZ(info->var.pixclock);
 786
 787         if (timings.pixclock < 1)
 788                 timings.pixclock = 1;
 789
 790         /*
 791          * This will allocate the datastructure and initialize all of the
 792          * generic VGA registers.
 793          */
 794
 795         if (vgaHWInit(&info->var, info, par, &timings))
 796                 return -EINVAL;
 797
 798         /*
 799          * The default value assigned by vgaHW.c is 0x41, but this does
 800          * not work for NeoMagic.
 801          */
 802         par->Attribute[16] = 0x01;
 803
 804         switch (info->var.bits_per_pixel) {
 805         case 8:
 806                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
 807                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
 808                 par->ExtColorModeSelect = 0x11;
 809                 break;
 810         case 16:
 811                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
 812                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
 813                 par->ExtColorModeSelect = 0x13;
 814                 break;
 815         case 24:
 816                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
 817                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
 818                 par->ExtColorModeSelect = 0x14;
 819                 break;
 820 #ifdef NO_32BIT_SUPPORT_YET
 821         case 32:                /* FIXME: guessed values */
 822                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
 823                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
 824                 par->ExtColorModeSelect = 0x15;
 825                 break;
 826 #endif
 827         default:
 828                 break;
 829         }
 830
 831         par->ExtCRTDispAddr = 0x10;
 832
 833         /* Vertical Extension */
 834         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
 835             | (((timings.VDisplay - 1) & 0x400) >> 9)
 836             | (((timings.VSyncStart) & 0x400) >> 8)
 837             | (((timings.VSyncStart) & 0x400) >> 7);
 838
 839         /* Fast write bursts on unless disabled. */
 840         if (par->pci_burst)
 841                 par->SysIfaceCntl1 = 0x30;
 842         else
 843                 par->SysIfaceCntl1 = 0x00;
 844
 845         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
 846
 847         /* Initialize: by default, we want display config register to be read */
 848         par->PanelDispCntlRegRead = 1;
 849
 850         /* Enable any user specified display devices. */
 851         par->PanelDispCntlReg1 = 0x00;
 852         if (par->internal_display)
 853                 par->PanelDispCntlReg1 |= 0x02;
 854         if (par->external_display)
 855                 par->PanelDispCntlReg1 |= 0x01;
 856
 857         /* If the user did not specify any display devices, then... */
 858         if (par->PanelDispCntlReg1 == 0x00) {
 859                 /* Default to internal (i.e., LCD) only. */
 860                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
 861         }
 862
 863         /* If we are using a fixed mode, then tell the chip we are. */
 864         switch (info->var.xres) {
 865         case 1280:
 866                 par->PanelDispCntlReg1 |= 0x60;
 867                 break;
 868         case 1024:
 869                 par->PanelDispCntlReg1 |= 0x40;
 870                 break;
 871         case 800:
 872                 par->PanelDispCntlReg1 |= 0x20;
 873                 break;
 874         case 640:
 875         default:
 876                 break;
 877         }
 878
 879         /* Setup shadow register locking. */
 880         switch (par->PanelDispCntlReg1 & 0x03) {
 881         case 0x01:              /* External CRT only mode: */
 882                 par->GeneralLockReg = 0x00;
 883                 /* We need to program the VCLK for external display only mode. */
 884                 par->ProgramVCLK = 1;
 885                 break;
 886         case 0x02:              /* Internal LCD only mode: */
 887         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
 888                 par->GeneralLockReg = 0x01;
 889                 /* Don't program the VCLK when using the LCD. */
 890                 par->ProgramVCLK = 0;
 891                 break;
 892         }
 893
 894         /*
 895          * If the screen is to be stretched, turn on stretching for the
 896          * various modes.
 897          *
 898          * OPTION_LCD_STRETCH means stretching should be turned off!
 899          */
 900         par->PanelDispCntlReg2 = 0x00;
 901         par->PanelDispCntlReg3 = 0x00;
 902
 903         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
 904             (info->var.xres != par->NeoPanelWidth)) {
 905                 switch (info->var.xres) {
 906                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
 907                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
 908                 case 640:
 909                 case 800:
 910                 case 1024:
 911                         lcd_stretch = 1;
 912                         par->PanelDispCntlReg2 |= 0xC6;
 913                         break;
 914                 default:
 915                         lcd_stretch = 0;
 916                         /* No stretching in these modes. */
 917                 }
 918         } else
 919                 lcd_stretch = 0;
 920
 921         /*
 922          * If the screen is to be centerd, turn on the centering for the
 923          * various modes.
 924          */
 925         par->PanelVertCenterReg1 = 0x00;
 926         par->PanelVertCenterReg2 = 0x00;
 927         par->PanelVertCenterReg3 = 0x00;
 928         par->PanelVertCenterReg4 = 0x00;
 929         par->PanelVertCenterReg5 = 0x00;
 930         par->PanelHorizCenterReg1 = 0x00;
 931         par->PanelHorizCenterReg2 = 0x00;
 932         par->PanelHorizCenterReg3 = 0x00;
 933         par->PanelHorizCenterReg4 = 0x00;
 934         par->PanelHorizCenterReg5 = 0x00;
 935
 936
 937         if (par->PanelDispCntlReg1 & 0x02) {
 938                 if (info->var.xres == par->NeoPanelWidth) {
 939                         /*
 940                          * No centering required when the requested display width
 941                          * equals the panel width.
 942                          */
 943                 } else {
 944                         par->PanelDispCntlReg2 |= 0x01;
 945                         par->PanelDispCntlReg3 |= 0x10;
 946
 947                         /* Calculate the horizontal and vertical offsets. */
 948                         if (!lcd_stretch) {
 949                                 hoffset =
 950                                     ((par->NeoPanelWidth -
 951                                       info->var.xres) >> 4) - 1;
 952                                 voffset =
 953                                     ((par->NeoPanelHeight -
 954                                       info->var.yres) >> 1) - 2;
 955                         } else {
 956                                 /* Stretched modes cannot be centered. */
 957                                 hoffset = 0;
 958                                 voffset = 0;
 959                         }
 960
 961                         switch (info->var.xres) {
 962                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
 963                                 par->PanelHorizCenterReg3 = hoffset;
 964                                 par->PanelVertCenterReg2 = voffset;
 965                                 break;
 966                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
 967                                 par->PanelHorizCenterReg4 = hoffset;
 968                                 par->PanelVertCenterReg1 = voffset;
 969                                 break;
 970                         case 640:
 971                                 par->PanelHorizCenterReg1 = hoffset;
 972                                 par->PanelVertCenterReg3 = voffset;
 973                                 break;
 974                         case 800:
 975                                 par->PanelHorizCenterReg2 = hoffset;
 976                                 par->PanelVertCenterReg4 = voffset;
 977                                 break;
 978                         case 1024:
 979                                 par->PanelHorizCenterReg5 = hoffset;
 980                                 par->PanelVertCenterReg5 = voffset;
 981                                 break;
 982                         case 1280:
 983                         default:
 984                                 /* No centering in these modes. */
 985                                 break;
 986                         }
 987                 }
 988         }
 989
 990         par->biosMode =
 991             neoFindMode(info->var.xres, info->var.yres,
 992                         info->var.bits_per_pixel);
 993
 994         /*
 995          * Calculate the VCLK that most closely matches the requested dot
 996          * clock.
 997          */
 998         neoCalcVCLK(info, par, timings.pixclock);
 999
1000         /* Since we program the clocks ourselves, always use VCLK3. */
1001         par->MiscOutReg |= 0x0C;
1002
1003         /* alread unlocked above */
1004         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
1005
1006         /* don't know what this is, but it's 0 from bootup anyway */
1007         vga_wgfx(NULL, 0x15, 0x00);
1008
1009         /* was set to 0x01 by my bios in text and vesa modes */
1010         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1011
1012         /*
1013          * The color mode needs to be set before calling vgaHWRestore
1014          * to ensure the DAC is initialized properly.
1015          *
1016          * NOTE: Make sure we don't change bits make sure we don't change
1017          * any reserved bits.
1018          */
1019         temp = vga_rgfx(NULL, 0x90);
1020         switch (info->fix.accel) {
1021         case FB_ACCEL_NEOMAGIC_NM2070:
1022                 temp &= 0xF0;   /* Save bits 7:4 */
1023                 temp |= (par->ExtColorModeSelect & ~0xF0);
1024                 break;
1025         case FB_ACCEL_NEOMAGIC_NM2090:
1026         case FB_ACCEL_NEOMAGIC_NM2093:
1027         case FB_ACCEL_NEOMAGIC_NM2097:
1028         case FB_ACCEL_NEOMAGIC_NM2160:
1029         case FB_ACCEL_NEOMAGIC_NM2200:
1030         case FB_ACCEL_NEOMAGIC_NM2230:
1031         case FB_ACCEL_NEOMAGIC_NM2360:
1032         case FB_ACCEL_NEOMAGIC_NM2380:
1033                 temp &= 0x70;   /* Save bits 6:4 */
1034                 temp |= (par->ExtColorModeSelect & ~0x70);
1035                 break;
1036         }
1037
1038         vga_wgfx(NULL, 0x90, temp);
1039
1040         /*
1041          * In some rare cases a lockup might occur if we don't delay
1042          * here. (Reported by Miles Lane)
1043          */
1044         //mdelay(200);
1045
1046         /*
1047          * Disable horizontal and vertical graphics and text expansions so
1048          * that vgaHWRestore works properly.
1049          */
1050         temp = vga_rgfx(NULL, 0x25);
1051         temp &= 0x39;
1052         vga_wgfx(NULL, 0x25, temp);
1053
1054         /*
1055          * Sleep for 200ms to make sure that the two operations above have
1056          * had time to take effect.
1057          */
1058         mdelay(200);
1059
1060         /*
1061          * This function handles restoring the generic VGA registers.  */
1062         vgaHWRestore(info, par);
1063
1064         /* linear colormap for non palettized modes */
1065         switch (info->var.bits_per_pixel) {
1066         case 8:
1067                 /* PseudoColor, 256 */
1068                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1069                 break;
1070         case 16:
1071                 /* TrueColor, 64k */
1072                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1073
1074                 for (i = 0; i < 64; i++) {
1075                         outb(i, 0x3c8);
1076
1077                         outb(i << 1, 0x3c9);
1078                         outb(i, 0x3c9);
1079                         outb(i << 1, 0x3c9);
1080                 }
1081                 break;
1082         case 24:
1083 #ifdef NO_32BIT_SUPPORT_YET
1084         case 32:
1085 #endif
1086                 /* TrueColor, 16m */
1087                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1088
1089                 for (i = 0; i < 256; i++) {
1090                         outb(i, 0x3c8);
1091
1092                         outb(i, 0x3c9);
1093                         outb(i, 0x3c9);
1094                         outb(i, 0x3c9);
1095                 }
1096                 break;
1097         }
1098
1099         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1100         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1101         temp = vga_rgfx(NULL, 0x10);
1102         temp &= 0x0F;           /* Save bits 3:0 */
1103         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1104         vga_wgfx(NULL, 0x10, temp);
1105
1106         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1107         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1108         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1109
1110         temp = vga_rgfx(NULL, 0x20);
1111         switch (info->fix.accel) {
1112         case FB_ACCEL_NEOMAGIC_NM2070:
1113                 temp &= 0xFC;   /* Save bits 7:2 */
1114                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1115                 break;
1116         case FB_ACCEL_NEOMAGIC_NM2090:
1117         case FB_ACCEL_NEOMAGIC_NM2093:
1118         case FB_ACCEL_NEOMAGIC_NM2097:
1119         case FB_ACCEL_NEOMAGIC_NM2160:
1120                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1121                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1122                 break;
1123         case FB_ACCEL_NEOMAGIC_NM2200:
1124         case FB_ACCEL_NEOMAGIC_NM2230:
1125         case FB_ACCEL_NEOMAGIC_NM2360:
1126         case FB_ACCEL_NEOMAGIC_NM2380:
1127                 temp &= 0x98;   /* Save bits 7,4:3 */
1128                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1129                 break;
1130         }
1131         vga_wgfx(NULL, 0x20, temp);
1132
1133         temp = vga_rgfx(NULL, 0x25);
1134         temp &= 0x38;           /* Save bits 5:3 */
1135         temp |= (par->PanelDispCntlReg2 & ~0x38);
1136         vga_wgfx(NULL, 0x25, temp);
1137
1138         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1139                 temp = vga_rgfx(NULL, 0x30);
1140                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1141                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1142                 vga_wgfx(NULL, 0x30, temp);
1143         }
1144
1145         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1146         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1147         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1148
1149         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1150                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1151                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1152                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1153                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1154         }
1155
1156         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1157                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1158
1159         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1160             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1161             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1162             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1163                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1164                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1165                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1166
1167                 clock_hi = 1;
1168         }
1169
1170         /* Program VCLK3 if needed. */
1171         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1172                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1173                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1174                                                   != (par->VCLK3NumeratorHigh &
1175                                                       ~0x0F))))) {
1176                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1177                 if (clock_hi) {
1178                         temp = vga_rgfx(NULL, 0x8F);
1179                         temp &= 0x0F;   /* Save bits 3:0 */
1180                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1181                         vga_wgfx(NULL, 0x8F, temp);
1182                 }
1183                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1184         }
1185
1186         if (par->biosMode)
1187                 vga_wcrt(NULL, 0x23, par->biosMode);
1188
1189         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1190
1191         /* Program vertical extension register */
1192         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1193             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1194             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1195             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1196                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1197         }
1198
1199         vgaHWProtect(0);        /* Turn on screen */
1200
1201         /* Calling this also locks offset registers required in update_start */
1202         neoLock(&par->state);
1203
1204         info->fix.line_length =
1205             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1206
1207         switch (info->fix.accel) {
1208                 case FB_ACCEL_NEOMAGIC_NM2200:
1209                 case FB_ACCEL_NEOMAGIC_NM2230:
1210                 case FB_ACCEL_NEOMAGIC_NM2360:
1211                 case FB_ACCEL_NEOMAGIC_NM2380:
1212                         neo2200_accel_init(info, &info->var);
1213                         break;
1214                 default:
1215                         break;
1216         }
1217         return 0;
1218 }
1219
1220 static void neofb_update_start(struct fb_info *info,
1221                                struct fb_var_screeninfo *var)
1222 {
1223         struct neofb_par *par = info->par;
1224         struct vgastate *state = &par->state;
1225         int oldExtCRTDispAddr;
1226         int Base;
1227
1228         DBG("neofb_update_start");
1229
1230         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1231         Base *= (var->bits_per_pixel + 7) / 8;
1232
1233         neoUnlock();
1234
1235         /*
1236          * These are the generic starting address registers.
1237          */
1238         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1239         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1240
1241         /*
1242          * Make sure we don't clobber some other bits that might already
1243          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1244          * be needed.
1245          */
1246         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1247         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1248
1249         neoLock(state);
1250 }
1251
1252 /*
1253  *    Pan or Wrap the Display
1254  */
1255 static int neofb_pan_display(struct fb_var_screeninfo *var,
1256                              struct fb_info *info)
1257 {
1258         u_int y_bottom;
1259
1260         y_bottom = var->yoffset;
1261
1262         if (!(var->vmode & FB_VMODE_YWRAP))
1263                 y_bottom += var->yres;
1264
1265         if (var->xoffset > (var->xres_virtual - var->xres))
1266                 return -EINVAL;
1267         if (y_bottom > info->var.yres_virtual)
1268                 return -EINVAL;
1269
1270         neofb_update_start(info, var);
1271
1272         info->var.xoffset = var->xoffset;
1273         info->var.yoffset = var->yoffset;
1274
1275         if (var->vmode & FB_VMODE_YWRAP)
1276                 info->var.vmode |= FB_VMODE_YWRAP;
1277         else
1278                 info->var.vmode &= ~FB_VMODE_YWRAP;
1279         return 0;
1280 }
1281
1282 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1283                            u_int transp, struct fb_info *fb)
1284 {
1285         if (regno >= fb->cmap.len || regno > 255)
1286                 return -EINVAL;
1287
1288         if (fb->var.bits_per_pixel <= 8) {
1289                 outb(regno, 0x3c8);
1290
1291                 outb(red >> 10, 0x3c9);
1292                 outb(green >> 10, 0x3c9);
1293                 outb(blue >> 10, 0x3c9);
1294         } else if (regno < 16) {
1295                 switch (fb->var.bits_per_pixel) {
1296                 case 16:
1297                         ((u32 *) fb->pseudo_palette)[regno] =
1298                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1299                                 ((blue & 0xf800) >> 11);
1300                         break;
1301                 case 24:
1302                         ((u32 *) fb->pseudo_palette)[regno] =
1303                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1304                                 ((blue & 0xff00) >> 8);
1305                         break;
1306 #ifdef NO_32BIT_SUPPORT_YET
1307                 case 32:
1308                         ((u32 *) fb->pseudo_palette)[regno] =
1309                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1310                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1311                         break;
1312 #endif
1313                 default:
1314                         return 1;
1315                 }
1316         }
1317
1318         return 0;
1319 }
1320
1321 /*
1322  *    (Un)Blank the display.
1323  */
1324 static int neofb_blank(int blank_mode, struct fb_info *info)
1325 {
1326         /*
1327          *  Blank the screen if blank_mode != 0, else unblank.
1328          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1329          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1330          *  and powerdown modes for monitors, and backlight control on LCDs.
1331          *    blank_mode == 0: unblanked (backlight on)
1332          *    blank_mode == 1: blank (backlight on)
1333          *    blank_mode == 2: suspend vsync (backlight off)
1334          *    blank_mode == 3: suspend hsync (backlight off)
1335          *    blank_mode == 4: powerdown (backlight off)
1336          *
1337          *  wms...Enable VESA DPMS compatible powerdown mode
1338          *  run "setterm -powersave powerdown" to take advantage
1339          */
1340         struct neofb_par *par = info->par;
1341         int seqflags, lcdflags, dpmsflags, reg, tmpdisp;
1342
1343         /*
1344          * Read back the register bits related to display configuration. They might
1345          * have been changed underneath the driver via Fn key stroke.
1346          */
1347         neoUnlock();
1348         tmpdisp = vga_rgfx(NULL, 0x20) & 0x03;
1349         neoLock(&par->state);
1350
1351         /* In case we blank the screen, we want to store the possibly new
1352          * configuration in the driver. During un-blank, we re-apply this setting,
1353          * since the LCD bit will be cleared in order to switch off the backlight.
1354          */
1355         if (par->PanelDispCntlRegRead) {
1356                 par->PanelDispCntlReg1 = tmpdisp;
1357         }
1358         par->PanelDispCntlRegRead = !blank_mode;
1359
1360         switch (blank_mode) {
1361         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1362                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1363                 lcdflags = 0;                   /* LCD off */
1364                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1365                             NEO_GR01_SUPPRESS_VSYNC;
1366 #ifdef CONFIG_TOSHIBA
1367                 /* Do we still need this ? */
1368                 /* attempt to turn off backlight on toshiba; also turns off external */
1369                 {
1370                         SMMRegisters regs;
1371
1372                         regs.eax = 0xff00; /* HCI_SET */
1373                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1374                         regs.ecx = 0x0000; /* HCI_DISABLE */
1375                         tosh_smm(&regs);
1376                 }
1377 #endif
1378                 break;
1379         case FB_BLANK_HSYNC_SUSPEND:            /* hsync off */
1380                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1381                 lcdflags = 0;                   /* LCD off */
1382                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1383                 break;
1384         case FB_BLANK_VSYNC_SUSPEND:            /* vsync off */
1385                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1386                 lcdflags = 0;                   /* LCD off */
1387                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1388                 break;
1389         case FB_BLANK_NORMAL:           /* just blank screen (backlight stays on) */
1390                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1391                 /*
1392                  * During a blank operation with the LID shut, we might store "LCD off"
1393                  * by mistake. Due to timing issues, the BIOS may switch the lights
1394                  * back on, and we turn it back off once we "unblank".
1395                  *
1396                  * So here is an attempt to implement ">=" - if we are in the process
1397                  * of unblanking, and the LCD bit is unset in the driver but set in the
1398                  * register, we must keep it.
1399                  */
1400                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1401                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1402                 break;
1403         case FB_BLANK_UNBLANK:          /* unblank */
1404                 seqflags = 0;                   /* Enable sequencer */
1405                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1406                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1407 #ifdef CONFIG_TOSHIBA
1408                 /* Do we still need this ? */
1409                 /* attempt to re-enable backlight/external on toshiba */
1410                 {
1411                         SMMRegisters regs;
1412
1413                         regs.eax = 0xff00; /* HCI_SET */
1414                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1415                         regs.ecx = 0x0001; /* HCI_ENABLE */
1416                         tosh_smm(&regs);
1417                 }
1418 #endif
1419                 break;
1420         default:        /* Anything else we don't understand; return 1 to tell
1421                          * fb_blank we didn't aactually do anything */
1422                 return 1;
1423         }
1424
1425         neoUnlock();
1426         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1427         vga_wseq(NULL, 0x01, reg);
1428         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1429         vga_wgfx(NULL, 0x20, reg);
1430         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1431         vga_wgfx(NULL, 0x01, reg);
1432         neoLock(&par->state);
1433         return 0;
1434 }
1435
1436 static void
1437 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1438 {
1439         struct neofb_par *par = info->par;
1440         u_long dst, rop;
1441
1442         dst = rect->dx + rect->dy * info->var.xres_virtual;
1443         rop = rect->rop ? 0x060000 : 0x0c0000;
1444
1445         neo2200_wait_fifo(info, 4);
1446
1447         /* set blt control */
1448         writel(NEO_BC3_FIFO_EN |
1449                NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1450                //               NEO_BC3_DST_XY_ADDR  |
1451                //               NEO_BC3_SRC_XY_ADDR  |
1452                rop, &par->neo2200->bltCntl);
1453
1454         switch (info->var.bits_per_pixel) {
1455         case 8:
1456                 writel(rect->color, &par->neo2200->fgColor);
1457                 break;
1458         case 16:
1459         case 24:
1460                 writel(((u32 *) (info->pseudo_palette))[rect->color],
1461                        &par->neo2200->fgColor);
1462                 break;
1463         }
1464
1465         writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1466                &par->neo2200->dstStart);
1467         writel((rect->height << 16) | (rect->width & 0xffff),
1468                &par->neo2200->xyExt);
1469 }
1470
1471 static void
1472 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1473 {
1474         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1475         struct neofb_par *par = info->par;
1476         u_long src, dst, bltCntl;
1477
1478         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1479
1480         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1481                 /* Start with the lower right corner */
1482                 sy += (area->height - 1);
1483                 dy += (area->height - 1);
1484                 sx += (area->width - 1);
1485                 dx += (area->width - 1);
1486
1487                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1488         }
1489
1490         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1491         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1492
1493         neo2200_wait_fifo(info, 4);
1494
1495         /* set blt control */
1496         writel(bltCntl, &par->neo2200->bltCntl);
1497
1498         writel(src, &par->neo2200->srcStart);
1499         writel(dst, &par->neo2200->dstStart);
1500         writel((area->height << 16) | (area->width & 0xffff),
1501                &par->neo2200->xyExt);
1502 }
1503
1504 static void
1505 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1506 {
1507         struct neofb_par *par = info->par;
1508         int s_pitch = (image->width * image->depth + 7) >> 3;
1509         int scan_align = info->pixmap.scan_align - 1;
1510         int buf_align = info->pixmap.buf_align - 1;
1511         int bltCntl_flags, d_pitch, data_len;
1512
1513         // The data is padded for the hardware
1514         d_pitch = (s_pitch + scan_align) & ~scan_align;
1515         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1516
1517         neo2200_sync(info);
1518
1519         if (image->depth == 1) {
1520                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1521                         /* FIXME. There is a bug with accelerated color-expanded
1522                          * transfers in 24 bit mode if the image being transferred
1523                          * is less than 16 bits wide. This is due to insufficient
1524                          * padding when writing the image. We need to adjust
1525                          * struct fb_pixmap. Not yet done. */
1526                         return cfb_imageblit(info, image);
1527                 }
1528                 bltCntl_flags = NEO_BC0_SRC_MONO;
1529         } else if (image->depth == info->var.bits_per_pixel) {
1530                 bltCntl_flags = 0;
1531         } else {
1532                 /* We don't currently support hardware acceleration if image
1533                  * depth is different from display */
1534                 return cfb_imageblit(info, image);
1535         }
1536
1537         switch (info->var.bits_per_pixel) {
1538         case 8:
1539                 writel(image->fg_color, &par->neo2200->fgColor);
1540                 writel(image->bg_color, &par->neo2200->bgColor);
1541                 break;
1542         case 16:
1543         case 24:
1544                 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1545                        &par->neo2200->fgColor);
1546                 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1547                        &par->neo2200->bgColor);
1548                 break;
1549         }
1550
1551         writel(NEO_BC0_SYS_TO_VID |
1552                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1553                 // NEO_BC3_DST_XY_ADDR |
1554                 0x0c0000, &par->neo2200->bltCntl);
1555
1556         writel(0, &par->neo2200->srcStart);
1557 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1558         writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1559                 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1560         writel((image->height << 16) | (image->width & 0xffff),
1561                &par->neo2200->xyExt);
1562
1563         memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1564 }
1565
1566 static void
1567 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1568 {
1569         switch (info->fix.accel) {
1570                 case FB_ACCEL_NEOMAGIC_NM2200:
1571                 case FB_ACCEL_NEOMAGIC_NM2230:
1572                 case FB_ACCEL_NEOMAGIC_NM2360:
1573                 case FB_ACCEL_NEOMAGIC_NM2380:
1574                         neo2200_fillrect(info, rect);
1575                         break;
1576                 default:
1577                         cfb_fillrect(info, rect);
1578                         break;
1579         }
1580 }
1581
1582 static void
1583 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1584 {
1585         switch (info->fix.accel) {
1586                 case FB_ACCEL_NEOMAGIC_NM2200:
1587                 case FB_ACCEL_NEOMAGIC_NM2230:
1588                 case FB_ACCEL_NEOMAGIC_NM2360:
1589                 case FB_ACCEL_NEOMAGIC_NM2380:
1590                         neo2200_copyarea(info, area);
1591                         break;
1592                 default:
1593                         cfb_copyarea(info, area);
1594                         break;
1595         }
1596 }
1597
1598 static void
1599 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1600 {
1601         switch (info->fix.accel) {
1602                 case FB_ACCEL_NEOMAGIC_NM2200:
1603                 case FB_ACCEL_NEOMAGIC_NM2230:
1604                 case FB_ACCEL_NEOMAGIC_NM2360:
1605                 case FB_ACCEL_NEOMAGIC_NM2380:
1606                         neo2200_imageblit(info, image);
1607                         break;
1608                 default:
1609                         cfb_imageblit(info, image);
1610                         break;
1611         }
1612 }
1613
1614 static int
1615 neofb_sync(struct fb_info *info)
1616 {
1617         switch (info->fix.accel) {
1618                 case FB_ACCEL_NEOMAGIC_NM2200:
1619                 case FB_ACCEL_NEOMAGIC_NM2230:
1620                 case FB_ACCEL_NEOMAGIC_NM2360:
1621                 case FB_ACCEL_NEOMAGIC_NM2380:
1622                         neo2200_sync(info);
1623                         break;
1624                 default:
1625                         break;
1626         }
1627         return 0;
1628 }
1629
1630 /*
1631 static void
1632 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1633 {
1634         //memset_io(info->sprite.addr, 0xff, 1);
1635 }
1636
1637 static int
1638 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1639 {
1640         struct neofb_par *par = (struct neofb_par *) info->par;
1641
1642         * Disable cursor *
1643         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1644
1645         if (cursor->set & FB_CUR_SETPOS) {
1646                 u32 x = cursor->image.dx;
1647                 u32 y = cursor->image.dy;
1648
1649                 info->cursor.image.dx = x;
1650                 info->cursor.image.dy = y;
1651                 write_le32(NEOREG_CURSX, x, par);
1652                 write_le32(NEOREG_CURSY, y, par);
1653         }
1654
1655         if (cursor->set & FB_CUR_SETSIZE) {
1656                 info->cursor.image.height = cursor->image.height;
1657                 info->cursor.image.width = cursor->image.width;
1658         }
1659
1660         if (cursor->set & FB_CUR_SETHOT)
1661                 info->cursor.hot = cursor->hot;
1662
1663         if (cursor->set & FB_CUR_SETCMAP) {
1664                 if (cursor->image.depth == 1) {
1665                         u32 fg = cursor->image.fg_color;
1666                         u32 bg = cursor->image.bg_color;
1667
1668                         info->cursor.image.fg_color = fg;
1669                         info->cursor.image.bg_color = bg;
1670
1671                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1672                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1673                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1674                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1675                 }
1676         }
1677
1678         if (cursor->set & FB_CUR_SETSHAPE)
1679                 fb_load_cursor_image(info);
1680
1681         if (info->cursor.enable)
1682                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1683         return 0;
1684 }
1685 */
1686
1687 static struct fb_ops neofb_ops = {
1688         .owner          = THIS_MODULE,
1689         .fb_open        = neofb_open,
1690         .fb_release     = neofb_release,
1691         .fb_check_var   = neofb_check_var,
1692         .fb_set_par     = neofb_set_par,
1693         .fb_setcolreg   = neofb_setcolreg,
1694         .fb_pan_display = neofb_pan_display,
1695         .fb_blank       = neofb_blank,
1696         .fb_sync        = neofb_sync,
1697         .fb_fillrect    = neofb_fillrect,
1698         .fb_copyarea    = neofb_copyarea,
1699         .fb_imageblit   = neofb_imageblit,
1700 };
1701
1702 /* --------------------------------------------------------------------- */
1703
1704 static struct fb_videomode __devinitdata mode800x480 = {
1705         .xres           = 800,
1706         .yres           = 480,
1707         .pixclock       = 25000,
1708         .left_margin    = 88,
1709         .right_margin   = 40,
1710         .upper_margin   = 23,
1711         .lower_margin   = 1,
1712         .hsync_len      = 128,
1713         .vsync_len      = 4,
1714         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1715         .vmode          = FB_VMODE_NONINTERLACED
1716 };
1717
1718 static int __devinit neo_map_mmio(struct fb_info *info,
1719                                   struct pci_dev *dev)
1720 {
1721         struct neofb_par *par = info->par;
1722
1723         DBG("neo_map_mmio");
1724
1725         switch (info->fix.accel) {
1726                 case FB_ACCEL_NEOMAGIC_NM2070:
1727                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1728                                 0x100000;
1729                         break;
1730                 case FB_ACCEL_NEOMAGIC_NM2090:
1731                 case FB_ACCEL_NEOMAGIC_NM2093:
1732                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1733                                 0x200000;
1734                         break;
1735                 case FB_ACCEL_NEOMAGIC_NM2160:
1736                 case FB_ACCEL_NEOMAGIC_NM2097:
1737                 case FB_ACCEL_NEOMAGIC_NM2200:
1738                 case FB_ACCEL_NEOMAGIC_NM2230:
1739                 case FB_ACCEL_NEOMAGIC_NM2360:
1740                 case FB_ACCEL_NEOMAGIC_NM2380:
1741                         info->fix.mmio_start = pci_resource_start(dev, 1);
1742                         break;
1743                 default:
1744                         info->fix.mmio_start = pci_resource_start(dev, 0);
1745         }
1746         info->fix.mmio_len = MMIO_SIZE;
1747
1748         if (!request_mem_region
1749             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1750                 printk("neofb: memory mapped IO in use\n");
1751                 return -EBUSY;
1752         }
1753
1754         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1755         if (!par->mmio_vbase) {
1756                 printk("neofb: unable to map memory mapped IO\n");
1757                 release_mem_region(info->fix.mmio_start,
1758                                    info->fix.mmio_len);
1759                 return -ENOMEM;
1760         } else
1761                 printk(KERN_INFO "neofb: mapped io at %p\n",
1762                        par->mmio_vbase);
1763         return 0;
1764 }
1765
1766 static void neo_unmap_mmio(struct fb_info *info)
1767 {
1768         struct neofb_par *par = info->par;
1769
1770         DBG("neo_unmap_mmio");
1771
1772         iounmap(par->mmio_vbase);
1773         par->mmio_vbase = NULL;
1774
1775         release_mem_region(info->fix.mmio_start,
1776                            info->fix.mmio_len);
1777 }
1778
1779 static int __devinit neo_map_video(struct fb_info *info,
1780                                    struct pci_dev *dev, int video_len)
1781 {
1782         //unsigned long addr;
1783
1784         DBG("neo_map_video");
1785
1786         info->fix.smem_start = pci_resource_start(dev, 0);
1787         info->fix.smem_len = video_len;
1788
1789         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1790                                 "frame buffer")) {
1791                 printk("neofb: frame buffer in use\n");
1792                 return -EBUSY;
1793         }
1794
1795         info->screen_base =
1796             ioremap(info->fix.smem_start, info->fix.smem_len);
1797         if (!info->screen_base) {
1798                 printk("neofb: unable to map screen memory\n");
1799                 release_mem_region(info->fix.smem_start,
1800                                    info->fix.smem_len);
1801                 return -ENOMEM;
1802         } else
1803                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1804                        info->screen_base);
1805
1806 #ifdef CONFIG_MTRR
1807         ((struct neofb_par *)(info->par))->mtrr =
1808                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1809                                 MTRR_TYPE_WRCOMB, 1);
1810 #endif
1811
1812         /* Clear framebuffer, it's all white in memory after boot */
1813         memset_io(info->screen_base, 0, info->fix.smem_len);
1814
1815         /* Allocate Cursor drawing pad.
1816         info->fix.smem_len -= PAGE_SIZE;
1817         addr = info->fix.smem_start + info->fix.smem_len;
1818         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1819                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1820         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1821         info->sprite.addr = (u8 *) addr; */
1822         return 0;
1823 }
1824
1825 static void neo_unmap_video(struct fb_info *info)
1826 {
1827         DBG("neo_unmap_video");
1828
1829 #ifdef CONFIG_MTRR
1830         {
1831                 struct neofb_par *par = info->par;
1832
1833                 mtrr_del(par->mtrr, info->fix.smem_start,
1834                          info->fix.smem_len);
1835         }
1836 #endif
1837         iounmap(info->screen_base);
1838         info->screen_base = NULL;
1839
1840         release_mem_region(info->fix.smem_start,
1841                            info->fix.smem_len);
1842 }
1843
1844 static int __devinit neo_scan_monitor(struct fb_info *info)
1845 {
1846         struct neofb_par *par = info->par;
1847         unsigned char type, display;
1848         int w;
1849
1850         // Eventually we will have i2c support.
1851         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1852         if (!info->monspecs.modedb)
1853                 return -ENOMEM;
1854         info->monspecs.modedb_len = 1;
1855
1856         /* Determine the panel type */
1857         vga_wgfx(NULL, 0x09, 0x26);
1858         type = vga_rgfx(NULL, 0x21);
1859         display = vga_rgfx(NULL, 0x20);
1860         if (!par->internal_display && !par->external_display) {
1861                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1862                 par->external_display = display & 1;
1863                 printk (KERN_INFO "Autodetected %s display\n",
1864                         par->internal_display && par->external_display ? "simultaneous" :
1865                         par->internal_display ? "internal" : "external");
1866         }
1867
1868         /* Determine panel width -- used in NeoValidMode. */
1869         w = vga_rgfx(NULL, 0x20);
1870         vga_wgfx(NULL, 0x09, 0x00);
1871         switch ((w & 0x18) >> 3) {
1872         case 0x00:
1873                 // 640x480@60
1874                 par->NeoPanelWidth = 640;
1875                 par->NeoPanelHeight = 480;
1876                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1877                 break;
1878         case 0x01:
1879                 par->NeoPanelWidth = 800;
1880                 if (par->libretto) {
1881                         par->NeoPanelHeight = 480;
1882                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1883                 } else {
1884                         // 800x600@60
1885                         par->NeoPanelHeight = 600;
1886                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1887                 }
1888                 break;
1889         case 0x02:
1890                 // 1024x768@60
1891                 par->NeoPanelWidth = 1024;
1892                 par->NeoPanelHeight = 768;
1893                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1894                 break;
1895         case 0x03:
1896                 /* 1280x1024@60 panel support needs to be added */
1897 #ifdef NOT_DONE
1898                 par->NeoPanelWidth = 1280;
1899                 par->NeoPanelHeight = 1024;
1900                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1901                 break;
1902 #else
1903                 printk(KERN_ERR
1904                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1905                 return -1;
1906 #endif
1907         default:
1908                 // 640x480@60
1909                 par->NeoPanelWidth = 640;
1910                 par->NeoPanelHeight = 480;
1911                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1912                 break;
1913         }
1914
1915         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1916                par->NeoPanelWidth,
1917                par->NeoPanelHeight,
1918                (type & 0x02) ? "color" : "monochrome",
1919                (type & 0x10) ? "TFT" : "dual scan");
1920         return 0;
1921 }
1922
1923 static int __devinit neo_init_hw(struct fb_info *info)
1924 {
1925         struct neofb_par *par = info->par;
1926         int videoRam = 896;
1927         int maxClock = 65000;
1928         int CursorMem = 1024;
1929         int CursorOff = 0x100;
1930         int linearSize = 1024;
1931         int maxWidth = 1024;
1932         int maxHeight = 1024;
1933
1934         DBG("neo_init_hw");
1935
1936         neoUnlock();
1937
1938 #if 0
1939         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1940         for (int w = 0; w < 0x85; w++)
1941                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1942                        (void *) vga_rcrt(NULL, w));
1943         for (int w = 0; w < 0xC7; w++)
1944                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1945                        (void *) vga_rgfx(NULL, w));
1946 #endif
1947         switch (info->fix.accel) {
1948         case FB_ACCEL_NEOMAGIC_NM2070:
1949                 videoRam = 896;
1950                 maxClock = 65000;
1951                 CursorMem = 2048;
1952                 CursorOff = 0x100;
1953                 linearSize = 1024;
1954                 maxWidth = 1024;
1955                 maxHeight = 1024;
1956                 break;
1957         case FB_ACCEL_NEOMAGIC_NM2090:
1958         case FB_ACCEL_NEOMAGIC_NM2093:
1959                 videoRam = 1152;
1960                 maxClock = 80000;
1961                 CursorMem = 2048;
1962                 CursorOff = 0x100;
1963                 linearSize = 2048;
1964                 maxWidth = 1024;
1965                 maxHeight = 1024;
1966                 break;
1967         case FB_ACCEL_NEOMAGIC_NM2097:
1968                 videoRam = 1152;
1969                 maxClock = 80000;
1970                 CursorMem = 1024;
1971                 CursorOff = 0x100;
1972                 linearSize = 2048;
1973                 maxWidth = 1024;
1974                 maxHeight = 1024;
1975                 break;
1976         case FB_ACCEL_NEOMAGIC_NM2160:
1977                 videoRam = 2048;
1978                 maxClock = 90000;
1979                 CursorMem = 1024;
1980                 CursorOff = 0x100;
1981                 linearSize = 2048;
1982                 maxWidth = 1024;
1983                 maxHeight = 1024;
1984                 break;
1985         case FB_ACCEL_NEOMAGIC_NM2200:
1986                 videoRam = 2560;
1987                 maxClock = 110000;
1988                 CursorMem = 1024;
1989                 CursorOff = 0x1000;
1990                 linearSize = 4096;
1991                 maxWidth = 1280;
1992                 maxHeight = 1024;       /* ???? */
1993
1994                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1995                 break;
1996         case FB_ACCEL_NEOMAGIC_NM2230:
1997                 videoRam = 3008;
1998                 maxClock = 110000;
1999                 CursorMem = 1024;
2000                 CursorOff = 0x1000;
2001                 linearSize = 4096;
2002                 maxWidth = 1280;
2003                 maxHeight = 1024;       /* ???? */
2004
2005                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2006                 break;
2007         case FB_ACCEL_NEOMAGIC_NM2360:
2008                 videoRam = 4096;
2009                 maxClock = 110000;
2010                 CursorMem = 1024;
2011                 CursorOff = 0x1000;
2012                 linearSize = 4096;
2013                 maxWidth = 1280;
2014                 maxHeight = 1024;       /* ???? */
2015
2016                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2017                 break;
2018         case FB_ACCEL_NEOMAGIC_NM2380:
2019                 videoRam = 6144;
2020                 maxClock = 110000;
2021                 CursorMem = 1024;
2022                 CursorOff = 0x1000;
2023                 linearSize = 8192;
2024                 maxWidth = 1280;
2025                 maxHeight = 1024;       /* ???? */
2026
2027                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2028                 break;
2029         }
2030 /*
2031         info->sprite.size = CursorMem;
2032         info->sprite.scan_align = 1;
2033         info->sprite.buf_align = 1;
2034         info->sprite.flags = FB_PIXMAP_IO;
2035         info->sprite.outbuf = neofb_draw_cursor;
2036 */
2037         par->maxClock = maxClock;
2038         par->cursorOff = CursorOff;
2039         return ((videoRam * 1024));
2040 }
2041
2042
2043 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
2044                                                    pci_device_id *id)
2045 {
2046         struct fb_info *info;
2047         struct neofb_par *par;
2048
2049         info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
2050
2051         if (!info)
2052                 return NULL;
2053
2054         par = info->par;
2055
2056         info->fix.accel = id->driver_data;
2057
2058         mutex_init(&par->open_lock);
2059         par->pci_burst = !nopciburst;
2060         par->lcd_stretch = !nostretch;
2061         par->libretto = libretto;
2062
2063         par->internal_display = internal;
2064         par->external_display = external;
2065         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2066
2067         switch (info->fix.accel) {
2068         case FB_ACCEL_NEOMAGIC_NM2070:
2069                 snprintf(info->fix.id, sizeof(info->fix.id),
2070                                 "MagicGraph 128");
2071                 break;
2072         case FB_ACCEL_NEOMAGIC_NM2090:
2073                 snprintf(info->fix.id, sizeof(info->fix.id),
2074                                 "MagicGraph 128V");
2075                 break;
2076         case FB_ACCEL_NEOMAGIC_NM2093:
2077                 snprintf(info->fix.id, sizeof(info->fix.id),
2078                                 "MagicGraph 128ZV");
2079                 break;
2080         case FB_ACCEL_NEOMAGIC_NM2097:
2081                 snprintf(info->fix.id, sizeof(info->fix.id),
2082                                 "MagicGraph 128ZV+");
2083                 break;
2084         case FB_ACCEL_NEOMAGIC_NM2160:
2085                 snprintf(info->fix.id, sizeof(info->fix.id),
2086                                 "MagicGraph 128XD");
2087                 break;
2088         case FB_ACCEL_NEOMAGIC_NM2200:
2089                 snprintf(info->fix.id, sizeof(info->fix.id),
2090                                 "MagicGraph 256AV");
2091                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2092                                FBINFO_HWACCEL_COPYAREA |
2093                                FBINFO_HWACCEL_FILLRECT;
2094                 break;
2095         case FB_ACCEL_NEOMAGIC_NM2230:
2096                 snprintf(info->fix.id, sizeof(info->fix.id),
2097                                 "MagicGraph 256AV+");
2098                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2099                                FBINFO_HWACCEL_COPYAREA |
2100                                FBINFO_HWACCEL_FILLRECT;
2101                 break;
2102         case FB_ACCEL_NEOMAGIC_NM2360:
2103                 snprintf(info->fix.id, sizeof(info->fix.id),
2104                                 "MagicGraph 256ZX");
2105                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2106                                FBINFO_HWACCEL_COPYAREA |
2107                                FBINFO_HWACCEL_FILLRECT;
2108                 break;
2109         case FB_ACCEL_NEOMAGIC_NM2380:
2110                 snprintf(info->fix.id, sizeof(info->fix.id),
2111                                 "MagicGraph 256XL+");
2112                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2113                                FBINFO_HWACCEL_COPYAREA |
2114                                FBINFO_HWACCEL_FILLRECT;
2115                 break;
2116         }
2117
2118         info->fix.type = FB_TYPE_PACKED_PIXELS;
2119         info->fix.type_aux = 0;
2120         info->fix.xpanstep = 0;
2121         info->fix.ypanstep = 4;
2122         info->fix.ywrapstep = 0;
2123         info->fix.accel = id->driver_data;
2124
2125         info->fbops = &neofb_ops;
2126         info->pseudo_palette = par->palette;
2127         return info;
2128 }
2129
2130 static void neo_free_fb_info(struct fb_info *info)
2131 {
2132         if (info) {
2133                 /*
2134                  * Free the colourmap
2135                  */
2136                 fb_dealloc_cmap(&info->cmap);
2137                 framebuffer_release(info);
2138         }
2139 }
2140
2141 /* --------------------------------------------------------------------- */
2142
2143 static int __devinit neofb_probe(struct pci_dev *dev,
2144                                  const struct pci_device_id *id)
2145 {
2146         struct fb_info *info;
2147         u_int h_sync, v_sync;
2148         int video_len, err;
2149
2150         DBG("neofb_probe");
2151
2152         err = pci_enable_device(dev);
2153         if (err)
2154                 return err;
2155
2156         err = -ENOMEM;
2157         info = neo_alloc_fb_info(dev, id);
2158         if (!info)
2159                 return err;
2160
2161         err = neo_map_mmio(info, dev);
2162         if (err)
2163                 goto err_map_mmio;
2164
2165         err = neo_scan_monitor(info);
2166         if (err)
2167                 goto err_scan_monitor;
2168
2169         video_len = neo_init_hw(info);
2170         if (video_len < 0) {
2171                 err = video_len;
2172                 goto err_init_hw;
2173         }
2174
2175         err = neo_map_video(info, dev, video_len);
2176         if (err)
2177                 goto err_init_hw;
2178
2179         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2180                         info->monspecs.modedb, 16)) {
2181                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2182                 goto err_map_video;
2183         }
2184
2185         /*
2186          * Calculate the hsync and vsync frequencies.  Note that
2187          * we split the 1e12 constant up so that we can preserve
2188          * the precision and fit the results into 32-bit registers.
2189          *  (1953125000 * 512 = 1e12)
2190          */
2191         h_sync = 1953125000 / info->var.pixclock;
2192         h_sync =
2193             h_sync * 512 / (info->var.xres + info->var.left_margin +
2194                             info->var.right_margin + info->var.hsync_len);
2195         v_sync =
2196             h_sync / (info->var.yres + info->var.upper_margin +
2197                       info->var.lower_margin + info->var.vsync_len);
2198
2199         printk(KERN_INFO "neofb v" NEOFB_VERSION
2200                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2201                info->fix.smem_len >> 10, info->var.xres,
2202                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2203
2204         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2205                 goto err_map_video;
2206
2207         err = register_framebuffer(info);
2208         if (err < 0)
2209                 goto err_reg_fb;
2210
2211         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2212                info->node, info->fix.id);
2213
2214         /*
2215          * Our driver data
2216          */
2217         pci_set_drvdata(dev, info);
2218         return 0;
2219
2220 err_reg_fb:
2221         fb_dealloc_cmap(&info->cmap);
2222 err_map_video:
2223         neo_unmap_video(info);
2224 err_init_hw:
2225         fb_destroy_modedb(info->monspecs.modedb);
2226 err_scan_monitor:
2227         neo_unmap_mmio(info);
2228 err_map_mmio:
2229         neo_free_fb_info(info);
2230         return err;
2231 }
2232
2233 static void __devexit neofb_remove(struct pci_dev *dev)
2234 {
2235         struct fb_info *info = pci_get_drvdata(dev);
2236
2237         DBG("neofb_remove");
2238
2239         if (info) {
2240                 /*
2241                  * If unregister_framebuffer fails, then
2242                  * we will be leaving hooks that could cause
2243                  * oopsen laying around.
2244                  */
2245                 if (unregister_framebuffer(info))
2246                         printk(KERN_WARNING
2247                                "neofb: danger danger!  Oopsen imminent!\n");
2248
2249                 neo_unmap_video(info);
2250                 fb_destroy_modedb(info->monspecs.modedb);
2251                 neo_unmap_mmio(info);
2252                 neo_free_fb_info(info);
2253
2254                 /*
2255                  * Ensure that the driver data is no longer
2256                  * valid.
2257                  */
2258                 pci_set_drvdata(dev, NULL);
2259         }
2260 }
2261
2262 static struct pci_device_id neofb_devices[] = {
2263         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2264          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2265
2266         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2267          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2268
2269         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2270          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2271
2272         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2273          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2274
2275         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2276          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2277
2278         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2279          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2280
2281         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2282          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2283
2284         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2285          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2286
2287         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2288          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2289
2290         {0, 0, 0, 0, 0, 0, 0}
2291 };
2292
2293 MODULE_DEVICE_TABLE(pci, neofb_devices);
2294
2295 static struct pci_driver neofb_driver = {
2296         .name =         "neofb",
2297         .id_table =     neofb_devices,
2298         .probe =        neofb_probe,
2299         .remove =       __devexit_p(neofb_remove)
2300 };
2301
2302 /* ************************* init in-kernel code ************************** */
2303
2304 #ifndef MODULE
2305 static int __init neofb_setup(char *options)
2306 {
2307         char *this_opt;
2308
2309         DBG("neofb_setup");
2310
2311         if (!options || !*options)
2312                 return 0;
2313
2314         while ((this_opt = strsep(&options, ",")) != NULL) {
2315                 if (!*this_opt)
2316                         continue;
2317
2318                 if (!strncmp(this_opt, "internal", 8))
2319                         internal = 1;
2320                 else if (!strncmp(this_opt, "external", 8))
2321                         external = 1;
2322                 else if (!strncmp(this_opt, "nostretch", 9))
2323                         nostretch = 1;
2324                 else if (!strncmp(this_opt, "nopciburst", 10))
2325                         nopciburst = 1;
2326                 else if (!strncmp(this_opt, "libretto", 8))
2327                         libretto = 1;
2328                 else
2329                         mode_option = this_opt;
2330         }
2331         return 0;
2332 }
2333 #endif  /*  MODULE  */
2334
2335 static int __init neofb_init(void)
2336 {
2337 #ifndef MODULE
2338         char *option = NULL;
2339
2340         if (fb_get_options("neofb", &option))
2341                 return -ENODEV;
2342         neofb_setup(option);
2343 #endif
2344         return pci_register_driver(&neofb_driver);
2345 }
2346
2347 module_init(neofb_init);
2348
2349 #ifdef MODULE
2350 static void __exit neofb_exit(void)
2351 {
2352         pci_unregister_driver(&neofb_driver);
2353 }
2354
2355 module_exit(neofb_exit);
2356 #endif                          /* MODULE */