sdhci: move pci stuff to separate module
[linux-2.6] / drivers / mmc / host / sdhci.c
1 /*
2  *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
3  *
4  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or (at
9  * your option) any later version.
10  *
11  * Thanks to the following companies for their support:
12  *
13  *     - JMicron (hardware and technical support)
14  */
15
16 #include <linux/delay.h>
17 #include <linux/highmem.h>
18 #include <linux/io.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/scatterlist.h>
21
22 #include <linux/leds.h>
23
24 #include <linux/mmc/host.h>
25
26 #include "sdhci.h"
27
28 #define DRIVER_NAME "sdhci"
29
30 #define DBG(f, x...) \
31         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
32
33 static unsigned int debug_quirks = 0;
34
35 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
36 static void sdhci_finish_data(struct sdhci_host *);
37
38 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
39 static void sdhci_finish_command(struct sdhci_host *);
40
41 static void sdhci_dumpregs(struct sdhci_host *host)
42 {
43         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
44
45         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
46                 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
47                 readw(host->ioaddr + SDHCI_HOST_VERSION));
48         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
49                 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
50                 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
51         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
52                 readl(host->ioaddr + SDHCI_ARGUMENT),
53                 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
54         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
55                 readl(host->ioaddr + SDHCI_PRESENT_STATE),
56                 readb(host->ioaddr + SDHCI_HOST_CONTROL));
57         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
58                 readb(host->ioaddr + SDHCI_POWER_CONTROL),
59                 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
60         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
61                 readb(host->ioaddr + SDHCI_WAKE_UP_CONTROL),
62                 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
63         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
64                 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
65                 readl(host->ioaddr + SDHCI_INT_STATUS));
66         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
67                 readl(host->ioaddr + SDHCI_INT_ENABLE),
68                 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
69         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
70                 readw(host->ioaddr + SDHCI_ACMD12_ERR),
71                 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
72         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
73                 readl(host->ioaddr + SDHCI_CAPABILITIES),
74                 readl(host->ioaddr + SDHCI_MAX_CURRENT));
75
76         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
77 }
78
79 /*****************************************************************************\
80  *                                                                           *
81  * Low level functions                                                       *
82  *                                                                           *
83 \*****************************************************************************/
84
85 static void sdhci_reset(struct sdhci_host *host, u8 mask)
86 {
87         unsigned long timeout;
88
89         if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
90                 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
91                         SDHCI_CARD_PRESENT))
92                         return;
93         }
94
95         writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
96
97         if (mask & SDHCI_RESET_ALL)
98                 host->clock = 0;
99
100         /* Wait max 100 ms */
101         timeout = 100;
102
103         /* hw clears the bit when it's done */
104         while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
105                 if (timeout == 0) {
106                         printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
107                                 mmc_hostname(host->mmc), (int)mask);
108                         sdhci_dumpregs(host);
109                         return;
110                 }
111                 timeout--;
112                 mdelay(1);
113         }
114 }
115
116 static void sdhci_init(struct sdhci_host *host)
117 {
118         u32 intmask;
119
120         sdhci_reset(host, SDHCI_RESET_ALL);
121
122         intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
123                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
124                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
125                 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
126                 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
127                 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
128
129         writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
130         writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
131 }
132
133 static void sdhci_activate_led(struct sdhci_host *host)
134 {
135         u8 ctrl;
136
137         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
138         ctrl |= SDHCI_CTRL_LED;
139         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
140 }
141
142 static void sdhci_deactivate_led(struct sdhci_host *host)
143 {
144         u8 ctrl;
145
146         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
147         ctrl &= ~SDHCI_CTRL_LED;
148         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
149 }
150
151 #ifdef CONFIG_LEDS_CLASS
152 static void sdhci_led_control(struct led_classdev *led,
153         enum led_brightness brightness)
154 {
155         struct sdhci_host *host = container_of(led, struct sdhci_host, led);
156         unsigned long flags;
157
158         spin_lock_irqsave(&host->lock, flags);
159
160         if (brightness == LED_OFF)
161                 sdhci_deactivate_led(host);
162         else
163                 sdhci_activate_led(host);
164
165         spin_unlock_irqrestore(&host->lock, flags);
166 }
167 #endif
168
169 /*****************************************************************************\
170  *                                                                           *
171  * Core functions                                                            *
172  *                                                                           *
173 \*****************************************************************************/
174
175 static inline char* sdhci_sg_to_buffer(struct sdhci_host* host)
176 {
177         return sg_virt(host->cur_sg);
178 }
179
180 static inline int sdhci_next_sg(struct sdhci_host* host)
181 {
182         /*
183          * Skip to next SG entry.
184          */
185         host->cur_sg++;
186         host->num_sg--;
187
188         /*
189          * Any entries left?
190          */
191         if (host->num_sg > 0) {
192                 host->offset = 0;
193                 host->remain = host->cur_sg->length;
194         }
195
196         return host->num_sg;
197 }
198
199 static void sdhci_read_block_pio(struct sdhci_host *host)
200 {
201         int blksize, chunk_remain;
202         u32 data;
203         char *buffer;
204         int size;
205
206         DBG("PIO reading\n");
207
208         blksize = host->data->blksz;
209         chunk_remain = 0;
210         data = 0;
211
212         buffer = sdhci_sg_to_buffer(host) + host->offset;
213
214         while (blksize) {
215                 if (chunk_remain == 0) {
216                         data = readl(host->ioaddr + SDHCI_BUFFER);
217                         chunk_remain = min(blksize, 4);
218                 }
219
220                 size = min(host->remain, chunk_remain);
221
222                 chunk_remain -= size;
223                 blksize -= size;
224                 host->offset += size;
225                 host->remain -= size;
226
227                 while (size) {
228                         *buffer = data & 0xFF;
229                         buffer++;
230                         data >>= 8;
231                         size--;
232                 }
233
234                 if (host->remain == 0) {
235                         if (sdhci_next_sg(host) == 0) {
236                                 BUG_ON(blksize != 0);
237                                 return;
238                         }
239                         buffer = sdhci_sg_to_buffer(host);
240                 }
241         }
242 }
243
244 static void sdhci_write_block_pio(struct sdhci_host *host)
245 {
246         int blksize, chunk_remain;
247         u32 data;
248         char *buffer;
249         int bytes, size;
250
251         DBG("PIO writing\n");
252
253         blksize = host->data->blksz;
254         chunk_remain = 4;
255         data = 0;
256
257         bytes = 0;
258         buffer = sdhci_sg_to_buffer(host) + host->offset;
259
260         while (blksize) {
261                 size = min(host->remain, chunk_remain);
262
263                 chunk_remain -= size;
264                 blksize -= size;
265                 host->offset += size;
266                 host->remain -= size;
267
268                 while (size) {
269                         data >>= 8;
270                         data |= (u32)*buffer << 24;
271                         buffer++;
272                         size--;
273                 }
274
275                 if (chunk_remain == 0) {
276                         writel(data, host->ioaddr + SDHCI_BUFFER);
277                         chunk_remain = min(blksize, 4);
278                 }
279
280                 if (host->remain == 0) {
281                         if (sdhci_next_sg(host) == 0) {
282                                 BUG_ON(blksize != 0);
283                                 return;
284                         }
285                         buffer = sdhci_sg_to_buffer(host);
286                 }
287         }
288 }
289
290 static void sdhci_transfer_pio(struct sdhci_host *host)
291 {
292         u32 mask;
293
294         BUG_ON(!host->data);
295
296         if (host->num_sg == 0)
297                 return;
298
299         if (host->data->flags & MMC_DATA_READ)
300                 mask = SDHCI_DATA_AVAILABLE;
301         else
302                 mask = SDHCI_SPACE_AVAILABLE;
303
304         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
305                 if (host->data->flags & MMC_DATA_READ)
306                         sdhci_read_block_pio(host);
307                 else
308                         sdhci_write_block_pio(host);
309
310                 if (host->num_sg == 0)
311                         break;
312         }
313
314         DBG("PIO transfer complete.\n");
315 }
316
317 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
318 {
319         u8 count;
320         unsigned target_timeout, current_timeout;
321
322         WARN_ON(host->data);
323
324         if (data == NULL)
325                 return;
326
327         /* Sanity checks */
328         BUG_ON(data->blksz * data->blocks > 524288);
329         BUG_ON(data->blksz > host->mmc->max_blk_size);
330         BUG_ON(data->blocks > 65535);
331
332         host->data = data;
333         host->data_early = 0;
334
335         /* timeout in us */
336         target_timeout = data->timeout_ns / 1000 +
337                 data->timeout_clks / host->clock;
338
339         /*
340          * Figure out needed cycles.
341          * We do this in steps in order to fit inside a 32 bit int.
342          * The first step is the minimum timeout, which will have a
343          * minimum resolution of 6 bits:
344          * (1) 2^13*1000 > 2^22,
345          * (2) host->timeout_clk < 2^16
346          *     =>
347          *     (1) / (2) > 2^6
348          */
349         count = 0;
350         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
351         while (current_timeout < target_timeout) {
352                 count++;
353                 current_timeout <<= 1;
354                 if (count >= 0xF)
355                         break;
356         }
357
358         /*
359          * Compensate for an off-by-one error in the CaFe hardware; otherwise,
360          * a too-small count gives us interrupt timeouts.
361          */
362         if ((host->quirks & SDHCI_QUIRK_INCR_TIMEOUT_CONTROL))
363                 count++;
364
365         if (count >= 0xF) {
366                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
367                         mmc_hostname(host->mmc));
368                 count = 0xE;
369         }
370
371         writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
372
373         if (host->flags & SDHCI_USE_DMA)
374                 host->flags |= SDHCI_REQ_USE_DMA;
375
376         if (unlikely((host->flags & SDHCI_REQ_USE_DMA) &&
377                 (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) &&
378                 ((data->blksz * data->blocks) & 0x3))) {
379                 DBG("Reverting to PIO because of transfer size (%d)\n",
380                         data->blksz * data->blocks);
381                 host->flags &= ~SDHCI_REQ_USE_DMA;
382         }
383
384         /*
385          * The assumption here being that alignment is the same after
386          * translation to device address space.
387          */
388         if (unlikely((host->flags & SDHCI_REQ_USE_DMA) &&
389                 (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
390                 (data->sg->offset & 0x3))) {
391                 DBG("Reverting to PIO because of bad alignment\n");
392                 host->flags &= ~SDHCI_REQ_USE_DMA;
393         }
394
395         if (host->flags & SDHCI_REQ_USE_DMA) {
396                 int count;
397
398                 count = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
399                                 (data->flags & MMC_DATA_READ) ?
400                                         DMA_FROM_DEVICE : DMA_TO_DEVICE);
401                 WARN_ON(count != 1);
402
403                 writel(sg_dma_address(data->sg),
404                         host->ioaddr + SDHCI_DMA_ADDRESS);
405         } else {
406                 host->cur_sg = data->sg;
407                 host->num_sg = data->sg_len;
408
409                 host->offset = 0;
410                 host->remain = host->cur_sg->length;
411         }
412
413         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
414         writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
415                 host->ioaddr + SDHCI_BLOCK_SIZE);
416         writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
417 }
418
419 static void sdhci_set_transfer_mode(struct sdhci_host *host,
420         struct mmc_data *data)
421 {
422         u16 mode;
423
424         if (data == NULL)
425                 return;
426
427         WARN_ON(!host->data);
428
429         mode = SDHCI_TRNS_BLK_CNT_EN;
430         if (data->blocks > 1)
431                 mode |= SDHCI_TRNS_MULTI;
432         if (data->flags & MMC_DATA_READ)
433                 mode |= SDHCI_TRNS_READ;
434         if (host->flags & SDHCI_REQ_USE_DMA)
435                 mode |= SDHCI_TRNS_DMA;
436
437         writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
438 }
439
440 static void sdhci_finish_data(struct sdhci_host *host)
441 {
442         struct mmc_data *data;
443
444         BUG_ON(!host->data);
445
446         data = host->data;
447         host->data = NULL;
448
449         if (host->flags & SDHCI_REQ_USE_DMA) {
450                 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
451                         (data->flags & MMC_DATA_READ) ?
452                                 DMA_FROM_DEVICE : DMA_TO_DEVICE);
453         }
454
455         /*
456          * The specification states that the block count register must
457          * be updated, but it does not specify at what point in the
458          * data flow. That makes the register entirely useless to read
459          * back so we have to assume that nothing made it to the card
460          * in the event of an error.
461          */
462         if (data->error)
463                 data->bytes_xfered = 0;
464         else
465                 data->bytes_xfered = data->blksz * data->blocks;
466
467         if (data->stop) {
468                 /*
469                  * The controller needs a reset of internal state machines
470                  * upon error conditions.
471                  */
472                 if (data->error) {
473                         sdhci_reset(host, SDHCI_RESET_CMD);
474                         sdhci_reset(host, SDHCI_RESET_DATA);
475                 }
476
477                 sdhci_send_command(host, data->stop);
478         } else
479                 tasklet_schedule(&host->finish_tasklet);
480 }
481
482 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
483 {
484         int flags;
485         u32 mask;
486         unsigned long timeout;
487
488         WARN_ON(host->cmd);
489
490         /* Wait max 10 ms */
491         timeout = 10;
492
493         mask = SDHCI_CMD_INHIBIT;
494         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
495                 mask |= SDHCI_DATA_INHIBIT;
496
497         /* We shouldn't wait for data inihibit for stop commands, even
498            though they might use busy signaling */
499         if (host->mrq->data && (cmd == host->mrq->data->stop))
500                 mask &= ~SDHCI_DATA_INHIBIT;
501
502         while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
503                 if (timeout == 0) {
504                         printk(KERN_ERR "%s: Controller never released "
505                                 "inhibit bit(s).\n", mmc_hostname(host->mmc));
506                         sdhci_dumpregs(host);
507                         cmd->error = -EIO;
508                         tasklet_schedule(&host->finish_tasklet);
509                         return;
510                 }
511                 timeout--;
512                 mdelay(1);
513         }
514
515         mod_timer(&host->timer, jiffies + 10 * HZ);
516
517         host->cmd = cmd;
518
519         sdhci_prepare_data(host, cmd->data);
520
521         writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
522
523         sdhci_set_transfer_mode(host, cmd->data);
524
525         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
526                 printk(KERN_ERR "%s: Unsupported response type!\n",
527                         mmc_hostname(host->mmc));
528                 cmd->error = -EINVAL;
529                 tasklet_schedule(&host->finish_tasklet);
530                 return;
531         }
532
533         if (!(cmd->flags & MMC_RSP_PRESENT))
534                 flags = SDHCI_CMD_RESP_NONE;
535         else if (cmd->flags & MMC_RSP_136)
536                 flags = SDHCI_CMD_RESP_LONG;
537         else if (cmd->flags & MMC_RSP_BUSY)
538                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
539         else
540                 flags = SDHCI_CMD_RESP_SHORT;
541
542         if (cmd->flags & MMC_RSP_CRC)
543                 flags |= SDHCI_CMD_CRC;
544         if (cmd->flags & MMC_RSP_OPCODE)
545                 flags |= SDHCI_CMD_INDEX;
546         if (cmd->data)
547                 flags |= SDHCI_CMD_DATA;
548
549         writew(SDHCI_MAKE_CMD(cmd->opcode, flags),
550                 host->ioaddr + SDHCI_COMMAND);
551 }
552
553 static void sdhci_finish_command(struct sdhci_host *host)
554 {
555         int i;
556
557         BUG_ON(host->cmd == NULL);
558
559         if (host->cmd->flags & MMC_RSP_PRESENT) {
560                 if (host->cmd->flags & MMC_RSP_136) {
561                         /* CRC is stripped so we need to do some shifting. */
562                         for (i = 0;i < 4;i++) {
563                                 host->cmd->resp[i] = readl(host->ioaddr +
564                                         SDHCI_RESPONSE + (3-i)*4) << 8;
565                                 if (i != 3)
566                                         host->cmd->resp[i] |=
567                                                 readb(host->ioaddr +
568                                                 SDHCI_RESPONSE + (3-i)*4-1);
569                         }
570                 } else {
571                         host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
572                 }
573         }
574
575         host->cmd->error = 0;
576
577         if (host->data && host->data_early)
578                 sdhci_finish_data(host);
579
580         if (!host->cmd->data)
581                 tasklet_schedule(&host->finish_tasklet);
582
583         host->cmd = NULL;
584 }
585
586 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
587 {
588         int div;
589         u16 clk;
590         unsigned long timeout;
591
592         if (clock == host->clock)
593                 return;
594
595         writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
596
597         if (clock == 0)
598                 goto out;
599
600         for (div = 1;div < 256;div *= 2) {
601                 if ((host->max_clk / div) <= clock)
602                         break;
603         }
604         div >>= 1;
605
606         clk = div << SDHCI_DIVIDER_SHIFT;
607         clk |= SDHCI_CLOCK_INT_EN;
608         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
609
610         /* Wait max 10 ms */
611         timeout = 10;
612         while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
613                 & SDHCI_CLOCK_INT_STABLE)) {
614                 if (timeout == 0) {
615                         printk(KERN_ERR "%s: Internal clock never "
616                                 "stabilised.\n", mmc_hostname(host->mmc));
617                         sdhci_dumpregs(host);
618                         return;
619                 }
620                 timeout--;
621                 mdelay(1);
622         }
623
624         clk |= SDHCI_CLOCK_CARD_EN;
625         writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
626
627 out:
628         host->clock = clock;
629 }
630
631 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
632 {
633         u8 pwr;
634
635         if (host->power == power)
636                 return;
637
638         if (power == (unsigned short)-1) {
639                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
640                 goto out;
641         }
642
643         /*
644          * Spec says that we should clear the power reg before setting
645          * a new value. Some controllers don't seem to like this though.
646          */
647         if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
648                 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
649
650         pwr = SDHCI_POWER_ON;
651
652         switch (1 << power) {
653         case MMC_VDD_165_195:
654                 pwr |= SDHCI_POWER_180;
655                 break;
656         case MMC_VDD_29_30:
657         case MMC_VDD_30_31:
658                 pwr |= SDHCI_POWER_300;
659                 break;
660         case MMC_VDD_32_33:
661         case MMC_VDD_33_34:
662                 pwr |= SDHCI_POWER_330;
663                 break;
664         default:
665                 BUG();
666         }
667
668         /*
669          * At least the CaFe chip gets confused if we set the voltage
670          * and set turn on power at the same time, so set the voltage first.
671          */
672         if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
673                 writeb(pwr & ~SDHCI_POWER_ON,
674                                 host->ioaddr + SDHCI_POWER_CONTROL);
675
676         writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
677
678 out:
679         host->power = power;
680 }
681
682 /*****************************************************************************\
683  *                                                                           *
684  * MMC callbacks                                                             *
685  *                                                                           *
686 \*****************************************************************************/
687
688 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
689 {
690         struct sdhci_host *host;
691         unsigned long flags;
692
693         host = mmc_priv(mmc);
694
695         spin_lock_irqsave(&host->lock, flags);
696
697         WARN_ON(host->mrq != NULL);
698
699 #ifndef CONFIG_LEDS_CLASS
700         sdhci_activate_led(host);
701 #endif
702
703         host->mrq = mrq;
704
705         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
706                 host->mrq->cmd->error = -ENOMEDIUM;
707                 tasklet_schedule(&host->finish_tasklet);
708         } else
709                 sdhci_send_command(host, mrq->cmd);
710
711         mmiowb();
712         spin_unlock_irqrestore(&host->lock, flags);
713 }
714
715 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
716 {
717         struct sdhci_host *host;
718         unsigned long flags;
719         u8 ctrl;
720
721         host = mmc_priv(mmc);
722
723         spin_lock_irqsave(&host->lock, flags);
724
725         /*
726          * Reset the chip on each power off.
727          * Should clear out any weird states.
728          */
729         if (ios->power_mode == MMC_POWER_OFF) {
730                 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
731                 sdhci_init(host);
732         }
733
734         sdhci_set_clock(host, ios->clock);
735
736         if (ios->power_mode == MMC_POWER_OFF)
737                 sdhci_set_power(host, -1);
738         else
739                 sdhci_set_power(host, ios->vdd);
740
741         ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
742
743         if (ios->bus_width == MMC_BUS_WIDTH_4)
744                 ctrl |= SDHCI_CTRL_4BITBUS;
745         else
746                 ctrl &= ~SDHCI_CTRL_4BITBUS;
747
748         if (ios->timing == MMC_TIMING_SD_HS)
749                 ctrl |= SDHCI_CTRL_HISPD;
750         else
751                 ctrl &= ~SDHCI_CTRL_HISPD;
752
753         writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
754
755         /*
756          * Some (ENE) controllers go apeshit on some ios operation,
757          * signalling timeout and CRC errors even on CMD0. Resetting
758          * it on each ios seems to solve the problem.
759          */
760         if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
761                 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
762
763         mmiowb();
764         spin_unlock_irqrestore(&host->lock, flags);
765 }
766
767 static int sdhci_get_ro(struct mmc_host *mmc)
768 {
769         struct sdhci_host *host;
770         unsigned long flags;
771         int present;
772
773         host = mmc_priv(mmc);
774
775         spin_lock_irqsave(&host->lock, flags);
776
777         present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
778
779         spin_unlock_irqrestore(&host->lock, flags);
780
781         return !(present & SDHCI_WRITE_PROTECT);
782 }
783
784 static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
785 {
786         struct sdhci_host *host;
787         unsigned long flags;
788         u32 ier;
789
790         host = mmc_priv(mmc);
791
792         spin_lock_irqsave(&host->lock, flags);
793
794         ier = readl(host->ioaddr + SDHCI_INT_ENABLE);
795
796         ier &= ~SDHCI_INT_CARD_INT;
797         if (enable)
798                 ier |= SDHCI_INT_CARD_INT;
799
800         writel(ier, host->ioaddr + SDHCI_INT_ENABLE);
801         writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE);
802
803         mmiowb();
804
805         spin_unlock_irqrestore(&host->lock, flags);
806 }
807
808 static const struct mmc_host_ops sdhci_ops = {
809         .request        = sdhci_request,
810         .set_ios        = sdhci_set_ios,
811         .get_ro         = sdhci_get_ro,
812         .enable_sdio_irq = sdhci_enable_sdio_irq,
813 };
814
815 /*****************************************************************************\
816  *                                                                           *
817  * Tasklets                                                                  *
818  *                                                                           *
819 \*****************************************************************************/
820
821 static void sdhci_tasklet_card(unsigned long param)
822 {
823         struct sdhci_host *host;
824         unsigned long flags;
825
826         host = (struct sdhci_host*)param;
827
828         spin_lock_irqsave(&host->lock, flags);
829
830         if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
831                 if (host->mrq) {
832                         printk(KERN_ERR "%s: Card removed during transfer!\n",
833                                 mmc_hostname(host->mmc));
834                         printk(KERN_ERR "%s: Resetting controller.\n",
835                                 mmc_hostname(host->mmc));
836
837                         sdhci_reset(host, SDHCI_RESET_CMD);
838                         sdhci_reset(host, SDHCI_RESET_DATA);
839
840                         host->mrq->cmd->error = -ENOMEDIUM;
841                         tasklet_schedule(&host->finish_tasklet);
842                 }
843         }
844
845         spin_unlock_irqrestore(&host->lock, flags);
846
847         mmc_detect_change(host->mmc, msecs_to_jiffies(500));
848 }
849
850 static void sdhci_tasklet_finish(unsigned long param)
851 {
852         struct sdhci_host *host;
853         unsigned long flags;
854         struct mmc_request *mrq;
855
856         host = (struct sdhci_host*)param;
857
858         spin_lock_irqsave(&host->lock, flags);
859
860         del_timer(&host->timer);
861
862         mrq = host->mrq;
863
864         /*
865          * The controller needs a reset of internal state machines
866          * upon error conditions.
867          */
868         if (mrq->cmd->error ||
869                 (mrq->data && (mrq->data->error ||
870                 (mrq->data->stop && mrq->data->stop->error))) ||
871                 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) {
872
873                 /* Some controllers need this kick or reset won't work here */
874                 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
875                         unsigned int clock;
876
877                         /* This is to force an update */
878                         clock = host->clock;
879                         host->clock = 0;
880                         sdhci_set_clock(host, clock);
881                 }
882
883                 /* Spec says we should do both at the same time, but Ricoh
884                    controllers do not like that. */
885                 sdhci_reset(host, SDHCI_RESET_CMD);
886                 sdhci_reset(host, SDHCI_RESET_DATA);
887         }
888
889         host->mrq = NULL;
890         host->cmd = NULL;
891         host->data = NULL;
892
893 #ifndef CONFIG_LEDS_CLASS
894         sdhci_deactivate_led(host);
895 #endif
896
897         mmiowb();
898         spin_unlock_irqrestore(&host->lock, flags);
899
900         mmc_request_done(host->mmc, mrq);
901 }
902
903 static void sdhci_timeout_timer(unsigned long data)
904 {
905         struct sdhci_host *host;
906         unsigned long flags;
907
908         host = (struct sdhci_host*)data;
909
910         spin_lock_irqsave(&host->lock, flags);
911
912         if (host->mrq) {
913                 printk(KERN_ERR "%s: Timeout waiting for hardware "
914                         "interrupt.\n", mmc_hostname(host->mmc));
915                 sdhci_dumpregs(host);
916
917                 if (host->data) {
918                         host->data->error = -ETIMEDOUT;
919                         sdhci_finish_data(host);
920                 } else {
921                         if (host->cmd)
922                                 host->cmd->error = -ETIMEDOUT;
923                         else
924                                 host->mrq->cmd->error = -ETIMEDOUT;
925
926                         tasklet_schedule(&host->finish_tasklet);
927                 }
928         }
929
930         mmiowb();
931         spin_unlock_irqrestore(&host->lock, flags);
932 }
933
934 /*****************************************************************************\
935  *                                                                           *
936  * Interrupt handling                                                        *
937  *                                                                           *
938 \*****************************************************************************/
939
940 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
941 {
942         BUG_ON(intmask == 0);
943
944         if (!host->cmd) {
945                 printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
946                         "though no command operation was in progress.\n",
947                         mmc_hostname(host->mmc), (unsigned)intmask);
948                 sdhci_dumpregs(host);
949                 return;
950         }
951
952         if (intmask & SDHCI_INT_TIMEOUT)
953                 host->cmd->error = -ETIMEDOUT;
954         else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
955                         SDHCI_INT_INDEX))
956                 host->cmd->error = -EILSEQ;
957
958         if (host->cmd->error)
959                 tasklet_schedule(&host->finish_tasklet);
960         else if (intmask & SDHCI_INT_RESPONSE)
961                 sdhci_finish_command(host);
962 }
963
964 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
965 {
966         BUG_ON(intmask == 0);
967
968         if (!host->data) {
969                 /*
970                  * A data end interrupt is sent together with the response
971                  * for the stop command.
972                  */
973                 if (intmask & SDHCI_INT_DATA_END)
974                         return;
975
976                 printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
977                         "though no data operation was in progress.\n",
978                         mmc_hostname(host->mmc), (unsigned)intmask);
979                 sdhci_dumpregs(host);
980
981                 return;
982         }
983
984         if (intmask & SDHCI_INT_DATA_TIMEOUT)
985                 host->data->error = -ETIMEDOUT;
986         else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
987                 host->data->error = -EILSEQ;
988
989         if (host->data->error)
990                 sdhci_finish_data(host);
991         else {
992                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
993                         sdhci_transfer_pio(host);
994
995                 /*
996                  * We currently don't do anything fancy with DMA
997                  * boundaries, but as we can't disable the feature
998                  * we need to at least restart the transfer.
999                  */
1000                 if (intmask & SDHCI_INT_DMA_END)
1001                         writel(readl(host->ioaddr + SDHCI_DMA_ADDRESS),
1002                                 host->ioaddr + SDHCI_DMA_ADDRESS);
1003
1004                 if (intmask & SDHCI_INT_DATA_END) {
1005                         if (host->cmd) {
1006                                 /*
1007                                  * Data managed to finish before the
1008                                  * command completed. Make sure we do
1009                                  * things in the proper order.
1010                                  */
1011                                 host->data_early = 1;
1012                         } else {
1013                                 sdhci_finish_data(host);
1014                         }
1015                 }
1016         }
1017 }
1018
1019 static irqreturn_t sdhci_irq(int irq, void *dev_id)
1020 {
1021         irqreturn_t result;
1022         struct sdhci_host* host = dev_id;
1023         u32 intmask;
1024         int cardint = 0;
1025
1026         spin_lock(&host->lock);
1027
1028         intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
1029
1030         if (!intmask || intmask == 0xffffffff) {
1031                 result = IRQ_NONE;
1032                 goto out;
1033         }
1034
1035         DBG("*** %s got interrupt: 0x%08x\n",
1036                 mmc_hostname(host->mmc), intmask);
1037
1038         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1039                 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
1040                         host->ioaddr + SDHCI_INT_STATUS);
1041                 tasklet_schedule(&host->card_tasklet);
1042         }
1043
1044         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1045
1046         if (intmask & SDHCI_INT_CMD_MASK) {
1047                 writel(intmask & SDHCI_INT_CMD_MASK,
1048                         host->ioaddr + SDHCI_INT_STATUS);
1049                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1050         }
1051
1052         if (intmask & SDHCI_INT_DATA_MASK) {
1053                 writel(intmask & SDHCI_INT_DATA_MASK,
1054                         host->ioaddr + SDHCI_INT_STATUS);
1055                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1056         }
1057
1058         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1059
1060         intmask &= ~SDHCI_INT_ERROR;
1061
1062         if (intmask & SDHCI_INT_BUS_POWER) {
1063                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1064                         mmc_hostname(host->mmc));
1065                 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1066         }
1067
1068         intmask &= ~SDHCI_INT_BUS_POWER;
1069
1070         if (intmask & SDHCI_INT_CARD_INT)
1071                 cardint = 1;
1072
1073         intmask &= ~SDHCI_INT_CARD_INT;
1074
1075         if (intmask) {
1076                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1077                         mmc_hostname(host->mmc), intmask);
1078                 sdhci_dumpregs(host);
1079
1080                 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1081         }
1082
1083         result = IRQ_HANDLED;
1084
1085         mmiowb();
1086 out:
1087         spin_unlock(&host->lock);
1088
1089         /*
1090          * We have to delay this as it calls back into the driver.
1091          */
1092         if (cardint)
1093                 mmc_signal_sdio_irq(host->mmc);
1094
1095         return result;
1096 }
1097
1098 /*****************************************************************************\
1099  *                                                                           *
1100  * Suspend/resume                                                            *
1101  *                                                                           *
1102 \*****************************************************************************/
1103
1104 #ifdef CONFIG_PM
1105
1106 int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1107 {
1108         int ret;
1109
1110         ret = mmc_suspend_host(host->mmc, state);
1111         if (ret)
1112                 return ret;
1113
1114         free_irq(host->irq, host);
1115
1116         return 0;
1117 }
1118
1119 EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1120
1121 int sdhci_resume_host(struct sdhci_host *host)
1122 {
1123         int ret;
1124
1125         if (host->flags & SDHCI_USE_DMA) {
1126                 if (host->ops->enable_dma)
1127                         host->ops->enable_dma(host);
1128         }
1129
1130         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1131                           mmc_hostname(host->mmc), host);
1132         if (ret)
1133                 return ret;
1134
1135         sdhci_init(host);
1136         mmiowb();
1137
1138         ret = mmc_resume_host(host->mmc);
1139         if (ret)
1140                 return ret;
1141
1142         return 0;
1143 }
1144
1145 EXPORT_SYMBOL_GPL(sdhci_resume_host);
1146
1147 #endif /* CONFIG_PM */
1148
1149 /*****************************************************************************\
1150  *                                                                           *
1151  * Device allocation/registration                                            *
1152  *                                                                           *
1153 \*****************************************************************************/
1154
1155 struct sdhci_host *sdhci_alloc_host(struct device *dev,
1156         size_t priv_size)
1157 {
1158         struct mmc_host *mmc;
1159         struct sdhci_host *host;
1160
1161         WARN_ON(dev == NULL);
1162
1163         mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1164         if (!mmc)
1165                 return ERR_PTR(-ENOMEM);
1166
1167         host = mmc_priv(mmc);
1168         host->mmc = mmc;
1169
1170         return host;
1171 }
1172
1173 EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1174
1175 int sdhci_add_host(struct sdhci_host *host)
1176 {
1177         struct mmc_host *mmc;
1178         unsigned int caps;
1179         unsigned int version;
1180         int ret;
1181
1182         WARN_ON(host == NULL);
1183         if (host == NULL)
1184                 return -EINVAL;
1185
1186         mmc = host->mmc;
1187
1188         if (debug_quirks)
1189                 host->quirks = debug_quirks;
1190
1191         sdhci_reset(host, SDHCI_RESET_ALL);
1192
1193         version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1194         version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1195         if (version > 1) {
1196                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1197                         "You may experience problems.\n", mmc_hostname(mmc),
1198                         version);
1199         }
1200
1201         caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1202
1203         if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1204                 host->flags |= SDHCI_USE_DMA;
1205         else if (!(caps & SDHCI_CAN_DO_DMA))
1206                 DBG("Controller doesn't have DMA capability\n");
1207         else
1208                 host->flags |= SDHCI_USE_DMA;
1209
1210         if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1211                 (host->flags & SDHCI_USE_DMA)) {
1212                 DBG("Disabling DMA as it is marked broken\n");
1213                 host->flags &= ~SDHCI_USE_DMA;
1214         }
1215
1216         if (host->flags & SDHCI_USE_DMA) {
1217                 if (host->ops->enable_dma) {
1218                         if (host->ops->enable_dma(host)) {
1219                                 printk(KERN_WARNING "%s: No suitable DMA "
1220                                         "available. Falling back to PIO.\n",
1221                                         mmc_hostname(mmc));
1222                                 host->flags &= ~SDHCI_USE_DMA;
1223                         }
1224                 }
1225         }
1226
1227         /* XXX: Hack to get MMC layer to avoid highmem */
1228         if (!(host->flags & SDHCI_USE_DMA))
1229                 mmc_dev(host->mmc)->dma_mask = 0;
1230
1231         host->max_clk =
1232                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1233         if (host->max_clk == 0) {
1234                 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1235                         "frequency.\n", mmc_hostname(mmc));
1236                 return -ENODEV;
1237         }
1238         host->max_clk *= 1000000;
1239
1240         host->timeout_clk =
1241                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1242         if (host->timeout_clk == 0) {
1243                 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1244                         "frequency.\n", mmc_hostname(mmc));
1245                 return -ENODEV;
1246         }
1247         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1248                 host->timeout_clk *= 1000;
1249
1250         /*
1251          * Set host parameters.
1252          */
1253         mmc->ops = &sdhci_ops;
1254         mmc->f_min = host->max_clk / 256;
1255         mmc->f_max = host->max_clk;
1256         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1257
1258         if (caps & SDHCI_CAN_DO_HISPD)
1259                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1260
1261         mmc->ocr_avail = 0;
1262         if (caps & SDHCI_CAN_VDD_330)
1263                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1264         if (caps & SDHCI_CAN_VDD_300)
1265                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1266         if (caps & SDHCI_CAN_VDD_180)
1267                 mmc->ocr_avail |= MMC_VDD_165_195;
1268
1269         if (mmc->ocr_avail == 0) {
1270                 printk(KERN_ERR "%s: Hardware doesn't report any "
1271                         "support voltages.\n", mmc_hostname(mmc));
1272                 return -ENODEV;
1273         }
1274
1275         spin_lock_init(&host->lock);
1276
1277         /*
1278          * Maximum number of segments. Hardware cannot do scatter lists.
1279          */
1280         if (host->flags & SDHCI_USE_DMA)
1281                 mmc->max_hw_segs = 1;
1282         else
1283                 mmc->max_hw_segs = 16;
1284         mmc->max_phys_segs = 16;
1285
1286         /*
1287          * Maximum number of sectors in one transfer. Limited by DMA boundary
1288          * size (512KiB).
1289          */
1290         mmc->max_req_size = 524288;
1291
1292         /*
1293          * Maximum segment size. Could be one segment with the maximum number
1294          * of bytes.
1295          */
1296         mmc->max_seg_size = mmc->max_req_size;
1297
1298         /*
1299          * Maximum block size. This varies from controller to controller and
1300          * is specified in the capabilities register.
1301          */
1302         mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1303         if (mmc->max_blk_size >= 3) {
1304                 printk(KERN_WARNING "%s: Invalid maximum block size, "
1305                         "assuming 512 bytes\n", mmc_hostname(mmc));
1306                 mmc->max_blk_size = 512;
1307         } else
1308                 mmc->max_blk_size = 512 << mmc->max_blk_size;
1309
1310         /*
1311          * Maximum block count.
1312          */
1313         mmc->max_blk_count = 65535;
1314
1315         /*
1316          * Init tasklets.
1317          */
1318         tasklet_init(&host->card_tasklet,
1319                 sdhci_tasklet_card, (unsigned long)host);
1320         tasklet_init(&host->finish_tasklet,
1321                 sdhci_tasklet_finish, (unsigned long)host);
1322
1323         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1324
1325         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1326                 mmc_hostname(mmc), host);
1327         if (ret)
1328                 goto untasklet;
1329
1330         sdhci_init(host);
1331
1332 #ifdef CONFIG_MMC_DEBUG
1333         sdhci_dumpregs(host);
1334 #endif
1335
1336 #ifdef CONFIG_LEDS_CLASS
1337         host->led.name = mmc_hostname(mmc);
1338         host->led.brightness = LED_OFF;
1339         host->led.default_trigger = mmc_hostname(mmc);
1340         host->led.brightness_set = sdhci_led_control;
1341
1342         ret = led_classdev_register(mmc_dev(mmc), &host->led);
1343         if (ret)
1344                 goto reset;
1345 #endif
1346
1347         mmiowb();
1348
1349         mmc_add_host(mmc);
1350
1351         printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s\n",
1352                 mmc_hostname(mmc), host->hw_name, mmc_dev(mmc)->bus_id,
1353                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1354
1355         return 0;
1356
1357 #ifdef CONFIG_LEDS_CLASS
1358 reset:
1359         sdhci_reset(host, SDHCI_RESET_ALL);
1360         free_irq(host->irq, host);
1361 #endif
1362 untasklet:
1363         tasklet_kill(&host->card_tasklet);
1364         tasklet_kill(&host->finish_tasklet);
1365
1366         return ret;
1367 }
1368
1369 EXPORT_SYMBOL_GPL(sdhci_add_host);
1370
1371 void sdhci_remove_host(struct sdhci_host *host)
1372 {
1373         mmc_remove_host(host->mmc);
1374
1375 #ifdef CONFIG_LEDS_CLASS
1376         led_classdev_unregister(&host->led);
1377 #endif
1378
1379         sdhci_reset(host, SDHCI_RESET_ALL);
1380
1381         free_irq(host->irq, host);
1382
1383         del_timer_sync(&host->timer);
1384
1385         tasklet_kill(&host->card_tasklet);
1386         tasklet_kill(&host->finish_tasklet);
1387 }
1388
1389 EXPORT_SYMBOL_GPL(sdhci_remove_host);
1390
1391 void sdhci_free_host(struct sdhci_host *host)
1392 {
1393         mmc_free_host(host->mmc);
1394 }
1395
1396 EXPORT_SYMBOL_GPL(sdhci_free_host);
1397
1398 /*****************************************************************************\
1399  *                                                                           *
1400  * Driver init/exit                                                          *
1401  *                                                                           *
1402 \*****************************************************************************/
1403
1404 static int __init sdhci_drv_init(void)
1405 {
1406         printk(KERN_INFO DRIVER_NAME
1407                 ": Secure Digital Host Controller Interface driver\n");
1408         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1409
1410         return 0;
1411 }
1412
1413 static void __exit sdhci_drv_exit(void)
1414 {
1415 }
1416
1417 module_init(sdhci_drv_init);
1418 module_exit(sdhci_drv_exit);
1419
1420 module_param(debug_quirks, uint, 0444);
1421
1422 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1423 MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1424 MODULE_LICENSE("GPL");
1425
1426 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");