git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/p54/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
   7  *
   8  * Based on the islsm (softmac prism54) driver, which is:
   9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/pci.h>
  18 #include <linux/firmware.h>
  19 #include <linux/etherdevice.h>
  20 #include <linux/delay.h>
  21 #include <linux/completion.h>
  22 #include <net/mac80211.h>
  23
  24 #include "p54.h"
  25 #include "p54pci.h"
  26
  27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  29 MODULE_LICENSE("GPL");
  30 MODULE_ALIAS("prism54pci");
  31
  32 static struct pci_device_id p54p_table[] __devinitdata = {
  33         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  34         { PCI_DEVICE(0x1260, 0x3890) },
  35         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  36         { PCI_DEVICE(0x10b7, 0x6001) },
  37         /* Intersil PRISM Indigo Wireless LAN adapter */
  38         { PCI_DEVICE(0x1260, 0x3877) },
  39         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  40         { PCI_DEVICE(0x1260, 0x3886) },
  41         { },
  42 };
  43
  44 MODULE_DEVICE_TABLE(pci, p54p_table);
  45
  46 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  47 {
  48         struct p54p_priv *priv = dev->priv;
  49         const struct firmware *fw_entry = NULL;
  50         __le32 reg;
  51         int err;
  52         __le32 *data;
  53         u32 remains, left, device_addr;
  54
  55         P54P_WRITE(int_enable, cpu_to_le32(0));
  56         P54P_READ(int_enable);
  57         udelay(10);
  58
  59         reg = P54P_READ(ctrl_stat);
  60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  62         P54P_WRITE(ctrl_stat, reg);
  63         P54P_READ(ctrl_stat);
  64         udelay(10);
  65
  66         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  67         P54P_WRITE(ctrl_stat, reg);
  68         wmb();
  69         udelay(10);
  70
  71         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  72         P54P_WRITE(ctrl_stat, reg);
  73         wmb();
  74
  75         err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
  76         if (err) {
  77                 printk(KERN_ERR "%s (p54pci): cannot find firmware "
  78                        "(isl3886)\n", pci_name(priv->pdev));
  79                 return err;
  80         }
  81
  82         err = p54_parse_firmware(dev, fw_entry);
  83         if (err) {
  84                 release_firmware(fw_entry);
  85                 return err;
  86         }
  87
  88         data = (__le32 *) fw_entry->data;
  89         remains = fw_entry->size;
  90         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  91         while (remains) {
  92                 u32 i = 0;
  93                 left = min((u32)0x1000, remains);
  94                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  95                 P54P_READ(int_enable);
  96
  97                 device_addr += 0x1000;
  98                 while (i < left) {
  99                         P54P_WRITE(direct_mem_win[i], *data++);
 100                         i += sizeof(u32);
 101                 }
 102
 103                 remains -= left;
 104                 P54P_READ(int_enable);
 105         }
 106
 107         release_firmware(fw_entry);
 108
 109         reg = P54P_READ(ctrl_stat);
 110         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 111         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 112         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 113         P54P_WRITE(ctrl_stat, reg);
 114         P54P_READ(ctrl_stat);
 115         udelay(10);
 116
 117         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 118         P54P_WRITE(ctrl_stat, reg);
 119         wmb();
 120         udelay(10);
 121
 122         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 123         P54P_WRITE(ctrl_stat, reg);
 124         wmb();
 125         udelay(10);
 126
 127         /* wait for the firmware to boot properly */
 128         mdelay(100);
 129
 130         return 0;
 131 }
 132
 133 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
 134         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 135         struct sk_buff **rx_buf)
 136 {
 137         struct p54p_priv *priv = dev->priv;
 138         struct p54p_ring_control *ring_control = priv->ring_control;
 139         u32 limit, idx, i;
 140
 141         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
 142         limit = idx;
 143         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
 144         limit = ring_limit - limit;
 145
 146         i = idx % ring_limit;
 147         while (limit-- > 1) {
 148                 struct p54p_desc *desc = &ring[i];
 149
 150                 if (!desc->host_addr) {
 151                         struct sk_buff *skb;
 152                         dma_addr_t mapping;
 153                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
 154                         if (!skb)
 155                                 break;
 156
 157                         mapping = pci_map_single(priv->pdev,
 158                                                  skb_tail_pointer(skb),
 159                                                  priv->common.rx_mtu + 32,
 160                                                  PCI_DMA_FROMDEVICE);
 161                         desc->host_addr = cpu_to_le32(mapping);
 162                         desc->device_addr = 0;  // FIXME: necessary?
 163                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 164                         desc->flags = 0;
 165                         rx_buf[i] = skb;
 166                 }
 167
 168                 i++;
 169                 idx++;
 170                 i %= ring_limit;
 171         }
 172
 173         wmb();
 174         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
 175 }
 176
 177 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
 178         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 179         struct sk_buff **rx_buf)
 180 {
 181         struct p54p_priv *priv = dev->priv;
 182         struct p54p_ring_control *ring_control = priv->ring_control;
 183         struct p54p_desc *desc;
 184         u32 idx, i;
 185
 186         i = (*index) % ring_limit;
 187         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 188         idx %= ring_limit;
 189         while (i != idx) {
 190                 u16 len;
 191                 struct sk_buff *skb;
 192                 desc = &ring[i];
 193                 len = le16_to_cpu(desc->len);
 194                 skb = rx_buf[i];
 195
 196                 if (!skb) {
 197                         i++;
 198                         i %= ring_limit;
 199                         continue;
 200                 }
 201                 skb_put(skb, len);
 202
 203                 if (p54_rx(dev, skb)) {
 204                         pci_unmap_single(priv->pdev,
 205                                          le32_to_cpu(desc->host_addr),
 206                                          priv->common.rx_mtu + 32,
 207                                          PCI_DMA_FROMDEVICE);
 208                         rx_buf[i] = NULL;
 209                         desc->host_addr = 0;
 210                 } else {
 211                         skb_trim(skb, 0);
 212                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 213                 }
 214
 215                 i++;
 216                 i %= ring_limit;
 217         }
 218
 219         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
 220 }
 221
 222 /* caller must hold priv->lock */
 223 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
 224         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 225         void **tx_buf)
 226 {
 227         struct p54p_priv *priv = dev->priv;
 228         struct p54p_ring_control *ring_control = priv->ring_control;
 229         struct p54p_desc *desc;
 230         u32 idx, i;
 231
 232         i = (*index) % ring_limit;
 233         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
 234         idx %= ring_limit;
 235
 236         while (i != idx) {
 237                 desc = &ring[i];
 238                 p54_free_skb(dev, tx_buf[i]);
 239                 tx_buf[i] = NULL;
 240
 241                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 242                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 243
 244                 desc->host_addr = 0;
 245                 desc->device_addr = 0;
 246                 desc->len = 0;
 247                 desc->flags = 0;
 248
 249                 i++;
 250                 i %= ring_limit;
 251         }
 252 }
 253
 254 static void p54p_rx_tasklet(unsigned long dev_id)
 255 {
 256         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
 257         struct p54p_priv *priv = dev->priv;
 258         struct p54p_ring_control *ring_control = priv->ring_control;
 259
 260         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
 261                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
 262
 263         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
 264                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
 265
 266         wmb();
 267         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 268 }
 269
 270 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 271 {
 272         struct ieee80211_hw *dev = dev_id;
 273         struct p54p_priv *priv = dev->priv;
 274         struct p54p_ring_control *ring_control = priv->ring_control;
 275         __le32 reg;
 276
 277         spin_lock(&priv->lock);
 278         reg = P54P_READ(int_ident);
 279         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
 280                 spin_unlock(&priv->lock);
 281                 return IRQ_HANDLED;
 282         }
 283
 284         P54P_WRITE(int_ack, reg);
 285
 286         reg &= P54P_READ(int_enable);
 287
 288         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 289                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
 290                                    3, ring_control->tx_mgmt,
 291                                    ARRAY_SIZE(ring_control->tx_mgmt),
 292                                    priv->tx_buf_mgmt);
 293
 294                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
 295                                    1, ring_control->tx_data,
 296                                    ARRAY_SIZE(ring_control->tx_data),
 297                                    priv->tx_buf_data);
 298
 299                 tasklet_schedule(&priv->rx_tasklet);
 300
 301         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 302                 complete(&priv->boot_comp);
 303
 304         spin_unlock(&priv->lock);
 305
 306         return reg ? IRQ_HANDLED : IRQ_NONE;
 307 }
 308
 309 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
 310                     int free_on_tx)
 311 {
 312         struct p54p_priv *priv = dev->priv;
 313         struct p54p_ring_control *ring_control = priv->ring_control;
 314         unsigned long flags;
 315         struct p54p_desc *desc;
 316         dma_addr_t mapping;
 317         u32 device_idx, idx, i;
 318
 319         spin_lock_irqsave(&priv->lock, flags);
 320
 321         device_idx = le32_to_cpu(ring_control->device_idx[1]);
 322         idx = le32_to_cpu(ring_control->host_idx[1]);
 323         i = idx % ARRAY_SIZE(ring_control->tx_data);
 324
 325         mapping = pci_map_single(priv->pdev, skb->data, skb->len,
 326                                  PCI_DMA_TODEVICE);
 327         desc = &ring_control->tx_data[i];
 328         desc->host_addr = cpu_to_le32(mapping);
 329         desc->device_addr = ((struct p54_control_hdr *)skb->data)->req_id;
 330         desc->len = cpu_to_le16(skb->len);
 331         desc->flags = 0;
 332
 333         wmb();
 334         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 335
 336         if (free_on_tx)
 337                 priv->tx_buf_data[i] = skb;
 338
 339         spin_unlock_irqrestore(&priv->lock, flags);
 340
 341         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 342         P54P_READ(dev_int);
 343
 344         /* FIXME: unlikely to happen because the device usually runs out of
 345            memory before we fill the ring up, but we can make it impossible */
 346         if (idx - device_idx > ARRAY_SIZE(ring_control->tx_data) - 2) {
 347                 p54_free_skb(dev, skb);
 348                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
 349         }
 350 }
 351
 352 static void p54p_stop(struct ieee80211_hw *dev)
 353 {
 354         struct p54p_priv *priv = dev->priv;
 355         struct p54p_ring_control *ring_control = priv->ring_control;
 356         unsigned int i;
 357         struct p54p_desc *desc;
 358
 359         tasklet_kill(&priv->rx_tasklet);
 360
 361         P54P_WRITE(int_enable, cpu_to_le32(0));
 362         P54P_READ(int_enable);
 363         udelay(10);
 364
 365         free_irq(priv->pdev->irq, dev);
 366
 367         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 368
 369         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
 370                 desc = &ring_control->rx_data[i];
 371                 if (desc->host_addr)
 372                         pci_unmap_single(priv->pdev,
 373                                          le32_to_cpu(desc->host_addr),
 374                                          priv->common.rx_mtu + 32,
 375                                          PCI_DMA_FROMDEVICE);
 376                 kfree_skb(priv->rx_buf_data[i]);
 377                 priv->rx_buf_data[i] = NULL;
 378         }
 379
 380         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
 381                 desc = &ring_control->rx_mgmt[i];
 382                 if (desc->host_addr)
 383                         pci_unmap_single(priv->pdev,
 384                                          le32_to_cpu(desc->host_addr),
 385                                          priv->common.rx_mtu + 32,
 386                                          PCI_DMA_FROMDEVICE);
 387                 kfree_skb(priv->rx_buf_mgmt[i]);
 388                 priv->rx_buf_mgmt[i] = NULL;
 389         }
 390
 391         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
 392                 desc = &ring_control->tx_data[i];
 393                 if (desc->host_addr)
 394                         pci_unmap_single(priv->pdev,
 395                                          le32_to_cpu(desc->host_addr),
 396                                          le16_to_cpu(desc->len),
 397                                          PCI_DMA_TODEVICE);
 398
 399                 p54_free_skb(dev, priv->tx_buf_data[i]);
 400                 priv->tx_buf_data[i] = NULL;
 401         }
 402
 403         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
 404                 desc = &ring_control->tx_mgmt[i];
 405                 if (desc->host_addr)
 406                         pci_unmap_single(priv->pdev,
 407                                          le32_to_cpu(desc->host_addr),
 408                                          le16_to_cpu(desc->len),
 409                                          PCI_DMA_TODEVICE);
 410
 411                 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
 412                 priv->tx_buf_mgmt[i] = NULL;
 413         }
 414
 415         memset(ring_control, 0, sizeof(*ring_control));
 416 }
 417
 418 static int p54p_open(struct ieee80211_hw *dev)
 419 {
 420         struct p54p_priv *priv = dev->priv;
 421         int err;
 422
 423         init_completion(&priv->boot_comp);
 424         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 425                           IRQF_SHARED, "p54pci", dev);
 426         if (err) {
 427                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 428                        wiphy_name(dev->wiphy));
 429                 return err;
 430         }
 431
 432         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 433         err = p54p_upload_firmware(dev);
 434         if (err) {
 435                 free_irq(priv->pdev->irq, dev);
 436                 return err;
 437         }
 438         priv->rx_idx_data = priv->tx_idx_data = 0;
 439         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
 440
 441         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
 442                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
 443
 444         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
 445                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
 446
 447         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 448         P54P_READ(ring_control_base);
 449         wmb();
 450         udelay(10);
 451
 452         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 453         P54P_READ(int_enable);
 454         wmb();
 455         udelay(10);
 456
 457         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 458         P54P_READ(dev_int);
 459
 460         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 461                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 462                        wiphy_name(dev->wiphy));
 463                 p54p_stop(dev);
 464                 return -ETIMEDOUT;
 465         }
 466
 467         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 468         P54P_READ(int_enable);
 469         wmb();
 470         udelay(10);
 471
 472         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 473         P54P_READ(dev_int);
 474         wmb();
 475         udelay(10);
 476
 477         return 0;
 478 }
 479
 480 static int __devinit p54p_probe(struct pci_dev *pdev,
 481                                 const struct pci_device_id *id)
 482 {
 483         struct p54p_priv *priv;
 484         struct ieee80211_hw *dev;
 485         unsigned long mem_addr, mem_len;
 486         int err;
 487
 488         err = pci_enable_device(pdev);
 489         if (err) {
 490                 printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
 491                        pci_name(pdev));
 492                 return err;
 493         }
 494
 495         mem_addr = pci_resource_start(pdev, 0);
 496         mem_len = pci_resource_len(pdev, 0);
 497         if (mem_len < sizeof(struct p54p_csr)) {
 498                 printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
 499                        pci_name(pdev));
 500                 pci_disable_device(pdev);
 501                 return err;
 502         }
 503
 504         err = pci_request_regions(pdev, "p54pci");
 505         if (err) {
 506                 printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
 507                        pci_name(pdev));
 508                 return err;
 509         }
 510
 511         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
 512             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
 513                 printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
 514                        pci_name(pdev));
 515                 goto err_free_reg;
 516         }
 517
 518         pci_set_master(pdev);
 519         pci_try_set_mwi(pdev);
 520
 521         pci_write_config_byte(pdev, 0x40, 0);
 522         pci_write_config_byte(pdev, 0x41, 0);
 523
 524         dev = p54_init_common(sizeof(*priv));
 525         if (!dev) {
 526                 printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
 527                        pci_name(pdev));
 528                 err = -ENOMEM;
 529                 goto err_free_reg;
 530         }
 531
 532         priv = dev->priv;
 533         priv->pdev = pdev;
 534
 535         SET_IEEE80211_DEV(dev, &pdev->dev);
 536         pci_set_drvdata(pdev, dev);
 537
 538         priv->map = ioremap(mem_addr, mem_len);
 539         if (!priv->map) {
 540                 printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
 541                        pci_name(pdev));
 542                 err = -EINVAL;  // TODO: use a better error code?
 543                 goto err_free_dev;
 544         }
 545
 546         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 547                                                   &priv->ring_control_dma);
 548         if (!priv->ring_control) {
 549                 printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
 550                        pci_name(pdev));
 551                 err = -ENOMEM;
 552                 goto err_iounmap;
 553         }
 554         priv->common.open = p54p_open;
 555         priv->common.stop = p54p_stop;
 556         priv->common.tx = p54p_tx;
 557
 558         spin_lock_init(&priv->lock);
 559         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
 560
 561         err = p54p_open(dev);
 562         if (err)
 563                 goto err_free_common;
 564         err = p54_read_eeprom(dev);
 565         p54p_stop(dev);
 566         if (err)
 567                 goto err_free_common;
 568
 569         err = ieee80211_register_hw(dev);
 570         if (err) {
 571                 printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
 572                        pci_name(pdev));
 573                 goto err_free_common;
 574         }
 575
 576         return 0;
 577
 578  err_free_common:
 579         p54_free_common(dev);
 580         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 581                             priv->ring_control, priv->ring_control_dma);
 582
 583  err_iounmap:
 584         iounmap(priv->map);
 585
 586  err_free_dev:
 587         pci_set_drvdata(pdev, NULL);
 588         ieee80211_free_hw(dev);
 589
 590  err_free_reg:
 591         pci_release_regions(pdev);
 592         pci_disable_device(pdev);
 593         return err;
 594 }
 595
 596 static void __devexit p54p_remove(struct pci_dev *pdev)
 597 {
 598         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 599         struct p54p_priv *priv;
 600
 601         if (!dev)
 602                 return;
 603
 604         ieee80211_unregister_hw(dev);
 605         priv = dev->priv;
 606         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 607                             priv->ring_control, priv->ring_control_dma);
 608         p54_free_common(dev);
 609         iounmap(priv->map);
 610         pci_release_regions(pdev);
 611         pci_disable_device(pdev);
 612         ieee80211_free_hw(dev);
 613 }
 614
 615 #ifdef CONFIG_PM
 616 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 617 {
 618         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 619         struct p54p_priv *priv = dev->priv;
 620
 621         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 622                 ieee80211_stop_queues(dev);
 623                 p54p_stop(dev);
 624         }
 625
 626         pci_save_state(pdev);
 627         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 628         return 0;
 629 }
 630
 631 static int p54p_resume(struct pci_dev *pdev)
 632 {
 633         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 634         struct p54p_priv *priv = dev->priv;
 635
 636         pci_set_power_state(pdev, PCI_D0);
 637         pci_restore_state(pdev);
 638
 639         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 640                 p54p_open(dev);
 641                 ieee80211_wake_queues(dev);
 642         }
 643
 644         return 0;
 645 }
 646 #endif /* CONFIG_PM */
 647
 648 static struct pci_driver p54p_driver = {
 649         .name           = "p54pci",
 650         .id_table       = p54p_table,
 651         .probe          = p54p_probe,
 652         .remove         = __devexit_p(p54p_remove),
 653 #ifdef CONFIG_PM
 654         .suspend        = p54p_suspend,
 655         .resume         = p54p_resume,
 656 #endif /* CONFIG_PM */
 657 };
 658
 659 static int __init p54p_init(void)
 660 {
 661         return pci_register_driver(&p54p_driver);
 662 }
 663
 664 static void __exit p54p_exit(void)
 665 {
 666         pci_unregister_driver(&p54p_driver);
 667 }
 668
 669 module_init(p54p_init);
 670 module_exit(p54p_exit);