Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6] / drivers / staging / winbond / linux / wb35reg.c
1 #include "sysdef.h"
2
3 extern void phy_calibration_winbond(hw_data_t *phw_data, u32 frequency);
4
5 // TRUE  : read command process successfully
6 // FALSE : register not support
7 // RegisterNo : start base
8 // pRegisterData : data point
9 // NumberOfData : number of register data
10 // Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
11 //                NO_INCREMENT - Function will write data into the same register
12 unsigned char
13 Wb35Reg_BurstWrite(phw_data_t pHwData, u16 RegisterNo, PULONG pRegisterData, u8 NumberOfData, u8 Flag)
14 {
15         PWB35REG pWb35Reg = &pHwData->Wb35Reg;
16         PURB            pUrb = NULL;
17         PREG_QUEUE      pRegQueue = NULL;
18         u16             UrbSize;
19         struct      usb_ctrlrequest *dr;
20         u16             i, DataSize = NumberOfData*4;
21
22         // Module shutdown
23         if (pHwData->SurpriseRemove)
24                 return FALSE;
25
26         // Trying to use burst write function if use new hardware
27         UrbSize = sizeof(REG_QUEUE) + DataSize + sizeof(struct usb_ctrlrequest);
28         OS_MEMORY_ALLOC( (void* *)&pRegQueue, UrbSize );
29         pUrb = wb_usb_alloc_urb(0);
30         if( pUrb && pRegQueue ) {
31                 pRegQueue->DIRECT = 2;// burst write register
32                 pRegQueue->INDEX = RegisterNo;
33                 pRegQueue->pBuffer = (PULONG)((PUCHAR)pRegQueue + sizeof(REG_QUEUE));
34                 memcpy( pRegQueue->pBuffer, pRegisterData, DataSize );
35                 //the function for reversing register data from little endian to big endian
36                 for( i=0; i<NumberOfData ; i++ )
37                         pRegQueue->pBuffer[i] = cpu_to_le32( pRegQueue->pBuffer[i] );
38
39                 dr = (struct usb_ctrlrequest *)((PUCHAR)pRegQueue + sizeof(REG_QUEUE) + DataSize);
40                 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
41                 dr->bRequest = 0x04; // USB or vendor-defined request code, burst mode
42                 dr->wValue = cpu_to_le16( Flag ); // 0: Register number auto-increment, 1: No auto increment
43                 dr->wIndex = cpu_to_le16( RegisterNo );
44                 dr->wLength = cpu_to_le16( DataSize );
45                 pRegQueue->Next = NULL;
46                 pRegQueue->pUsbReq = dr;
47                 pRegQueue->pUrb = pUrb;
48
49                 OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
50                 if (pWb35Reg->pRegFirst == NULL)
51                         pWb35Reg->pRegFirst = pRegQueue;
52                 else
53                         pWb35Reg->pRegLast->Next = pRegQueue;
54                 pWb35Reg->pRegLast = pRegQueue;
55
56                 OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
57
58                 // Start EP0VM
59                 Wb35Reg_EP0VM_start(pHwData);
60
61                 return TRUE;
62         } else {
63                 if (pUrb)
64                         usb_free_urb(pUrb);
65                 if (pRegQueue)
66                         kfree(pRegQueue);
67                 return FALSE;
68         }
69    return FALSE;
70 }
71
72 void
73 Wb35Reg_Update(phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue)
74 {
75         PWB35REG        pWb35Reg = &pHwData->Wb35Reg;
76         switch (RegisterNo) {
77         case 0x3b0: pWb35Reg->U1B0 = RegisterValue; break;
78         case 0x3bc: pWb35Reg->U1BC_LEDConfigure = RegisterValue; break;
79         case 0x400: pWb35Reg->D00_DmaControl = RegisterValue; break;
80         case 0x800: pWb35Reg->M00_MacControl = RegisterValue; break;
81         case 0x804: pWb35Reg->M04_MulticastAddress1 = RegisterValue; break;
82         case 0x808: pWb35Reg->M08_MulticastAddress2 = RegisterValue; break;
83         case 0x824: pWb35Reg->M24_MacControl = RegisterValue; break;
84         case 0x828: pWb35Reg->M28_MacControl = RegisterValue; break;
85         case 0x82c: pWb35Reg->M2C_MacControl = RegisterValue; break;
86         case 0x838: pWb35Reg->M38_MacControl = RegisterValue; break;
87         case 0x840: pWb35Reg->M40_MacControl = RegisterValue; break;
88         case 0x844: pWb35Reg->M44_MacControl = RegisterValue; break;
89         case 0x848: pWb35Reg->M48_MacControl = RegisterValue; break;
90         case 0x84c: pWb35Reg->M4C_MacStatus = RegisterValue; break;
91         case 0x860: pWb35Reg->M60_MacControl = RegisterValue; break;
92         case 0x868: pWb35Reg->M68_MacControl = RegisterValue; break;
93         case 0x870: pWb35Reg->M70_MacControl = RegisterValue; break;
94         case 0x874: pWb35Reg->M74_MacControl = RegisterValue; break;
95         case 0x878: pWb35Reg->M78_ERPInformation = RegisterValue; break;
96         case 0x87C: pWb35Reg->M7C_MacControl = RegisterValue; break;
97         case 0x880: pWb35Reg->M80_MacControl = RegisterValue; break;
98         case 0x884: pWb35Reg->M84_MacControl = RegisterValue; break;
99         case 0x888: pWb35Reg->M88_MacControl = RegisterValue; break;
100         case 0x898: pWb35Reg->M98_MacControl = RegisterValue; break;
101         case 0x100c: pWb35Reg->BB0C = RegisterValue; break;
102         case 0x102c: pWb35Reg->BB2C = RegisterValue; break;
103         case 0x1030: pWb35Reg->BB30 = RegisterValue; break;
104         case 0x103c: pWb35Reg->BB3C = RegisterValue; break;
105         case 0x1048: pWb35Reg->BB48 = RegisterValue; break;
106         case 0x104c: pWb35Reg->BB4C = RegisterValue; break;
107         case 0x1050: pWb35Reg->BB50 = RegisterValue; break;
108         case 0x1054: pWb35Reg->BB54 = RegisterValue; break;
109         case 0x1058: pWb35Reg->BB58 = RegisterValue; break;
110         case 0x105c: pWb35Reg->BB5C = RegisterValue; break;
111         case 0x1060: pWb35Reg->BB60 = RegisterValue; break;
112         }
113 }
114
115 // TRUE  : read command process successfully
116 // FALSE : register not support
117 unsigned char
118 Wb35Reg_WriteSync(  phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue )
119 {
120         PWB35REG pWb35Reg = &pHwData->Wb35Reg;
121         int ret = -1;
122
123         // Module shutdown
124         if (pHwData->SurpriseRemove)
125                 return FALSE;
126
127         RegisterValue = cpu_to_le32(RegisterValue);
128
129         // update the register by send usb message------------------------------------
130         pWb35Reg->SyncIoPause = 1;
131
132         // 20060717.5 Wait until EP0VM stop
133         while (pWb35Reg->EP0vm_state != VM_STOP)
134                 OS_SLEEP(10000);
135
136         // Sync IoCallDriver
137         pWb35Reg->EP0vm_state = VM_RUNNING;
138         ret = usb_control_msg( pHwData->WbUsb.udev,
139                                usb_sndctrlpipe( pHwData->WbUsb.udev, 0 ),
140                                0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
141                                0x0,RegisterNo, &RegisterValue, 4, HZ*100 );
142         pWb35Reg->EP0vm_state = VM_STOP;
143         pWb35Reg->SyncIoPause = 0;
144
145         Wb35Reg_EP0VM_start(pHwData);
146
147         if (ret < 0) {
148                 #ifdef _PE_REG_DUMP_
149                 WBDEBUG(("EP0 Write register usb message sending error\n"));
150                 #endif
151
152                 pHwData->SurpriseRemove = 1; // 20060704.2
153                 return FALSE;
154         }
155
156         return TRUE;
157 }
158
159 // TRUE  : read command process successfully
160 // FALSE : register not support
161 unsigned char
162 Wb35Reg_Write(  phw_data_t pHwData,  u16 RegisterNo,  u32 RegisterValue )
163 {
164         PWB35REG        pWb35Reg = &pHwData->Wb35Reg;
165         struct usb_ctrlrequest *dr;
166         PURB            pUrb = NULL;
167         PREG_QUEUE      pRegQueue = NULL;
168         u16             UrbSize;
169
170
171         // Module shutdown
172         if (pHwData->SurpriseRemove)
173                 return FALSE;
174
175         // update the register by send urb request------------------------------------
176         UrbSize = sizeof(REG_QUEUE) + sizeof(struct usb_ctrlrequest);
177         OS_MEMORY_ALLOC( (void* *)&pRegQueue, UrbSize );
178         pUrb = wb_usb_alloc_urb(0);
179         if (pUrb && pRegQueue) {
180                 pRegQueue->DIRECT = 1;// burst write register
181                 pRegQueue->INDEX = RegisterNo;
182                 pRegQueue->VALUE = cpu_to_le32(RegisterValue);
183                 pRegQueue->RESERVED_VALID = FALSE;
184                 dr = (struct usb_ctrlrequest *)((PUCHAR)pRegQueue + sizeof(REG_QUEUE));
185                 dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE;
186                 dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode
187                 dr->wValue = cpu_to_le16(0x0);
188                 dr->wIndex = cpu_to_le16(RegisterNo);
189                 dr->wLength = cpu_to_le16(4);
190
191                 // Enter the sending queue
192                 pRegQueue->Next = NULL;
193                 pRegQueue->pUsbReq = dr;
194                 pRegQueue->pUrb = pUrb;
195
196                 OS_SPIN_LOCK_ACQUIRED(&pWb35Reg->EP0VM_spin_lock );
197                 if (pWb35Reg->pRegFirst == NULL)
198                         pWb35Reg->pRegFirst = pRegQueue;
199                 else
200                         pWb35Reg->pRegLast->Next = pRegQueue;
201                 pWb35Reg->pRegLast = pRegQueue;
202
203                 OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
204
205                 // Start EP0VM
206                 Wb35Reg_EP0VM_start(pHwData);
207
208                 return TRUE;
209         } else {
210                 if (pUrb)
211                         usb_free_urb(pUrb);
212                 kfree(pRegQueue);
213                 return FALSE;
214         }
215 }
216
217 //This command will be executed with a user defined value. When it completes,
218 //this value is useful. For example, hal_set_current_channel will use it.
219 // TRUE  : read command process successfully
220 // FALSE : register not support
221 unsigned char
222 Wb35Reg_WriteWithCallbackValue( phw_data_t pHwData, u16 RegisterNo, u32 RegisterValue,
223                                 PCHAR pValue, s8 Len)
224 {
225         PWB35REG        pWb35Reg = &pHwData->Wb35Reg;
226         struct usb_ctrlrequest *dr;
227         PURB            pUrb = NULL;
228         PREG_QUEUE      pRegQueue = NULL;
229         u16             UrbSize;
230
231         // Module shutdown
232         if (pHwData->SurpriseRemove)
233                 return FALSE;
234
235         // update the register by send urb request------------------------------------
236         UrbSize = sizeof(REG_QUEUE) + sizeof(struct usb_ctrlrequest);
237         OS_MEMORY_ALLOC((void* *) &pRegQueue, UrbSize );
238         pUrb = wb_usb_alloc_urb(0);
239         if (pUrb && pRegQueue) {
240                 pRegQueue->DIRECT = 1;// burst write register
241                 pRegQueue->INDEX = RegisterNo;
242                 pRegQueue->VALUE = cpu_to_le32(RegisterValue);
243                 //NOTE : Users must guarantee the size of value will not exceed the buffer size.
244                 memcpy(pRegQueue->RESERVED, pValue, Len);
245                 pRegQueue->RESERVED_VALID = TRUE;
246                 dr = (struct usb_ctrlrequest *)((PUCHAR)pRegQueue + sizeof(REG_QUEUE));
247                 dr->bRequestType = USB_TYPE_VENDOR|USB_DIR_OUT |USB_RECIP_DEVICE;
248                 dr->bRequest = 0x03; // USB or vendor-defined request code, burst mode
249                 dr->wValue = cpu_to_le16(0x0);
250                 dr->wIndex = cpu_to_le16(RegisterNo);
251                 dr->wLength = cpu_to_le16(4);
252
253                 // Enter the sending queue
254                 pRegQueue->Next = NULL;
255                 pRegQueue->pUsbReq = dr;
256                 pRegQueue->pUrb = pUrb;
257                 OS_SPIN_LOCK_ACQUIRED (&pWb35Reg->EP0VM_spin_lock );
258                 if( pWb35Reg->pRegFirst == NULL )
259                         pWb35Reg->pRegFirst = pRegQueue;
260                 else
261                         pWb35Reg->pRegLast->Next = pRegQueue;
262                 pWb35Reg->pRegLast = pRegQueue;
263
264                 OS_SPIN_LOCK_RELEASED ( &pWb35Reg->EP0VM_spin_lock );
265
266                 // Start EP0VM
267                 Wb35Reg_EP0VM_start(pHwData);
268                 return TRUE;
269         } else {
270                 if (pUrb)
271                         usb_free_urb(pUrb);
272                 kfree(pRegQueue);
273                 return FALSE;
274         }
275 }
276
277 // TRUE  : read command process successfully
278 // FALSE : register not support
279 // pRegisterValue : It must be a resident buffer due to asynchronous read register.
280 unsigned char
281 Wb35Reg_ReadSync(  phw_data_t pHwData,  u16 RegisterNo,   PULONG pRegisterValue )
282 {
283         PWB35REG pWb35Reg = &pHwData->Wb35Reg;
284         PULONG  pltmp = pRegisterValue;
285         int ret = -1;
286
287         // Module shutdown
288         if (pHwData->SurpriseRemove)
289                 return FALSE;
290
291         // Read the register by send usb message------------------------------------
292
293         pWb35Reg->SyncIoPause = 1;
294
295         // 20060717.5 Wait until EP0VM stop
296         while (pWb35Reg->EP0vm_state != VM_STOP)
297                 OS_SLEEP(10000);
298
299         pWb35Reg->EP0vm_state = VM_RUNNING;
300         ret = usb_control_msg( pHwData->WbUsb.udev,
301                                usb_rcvctrlpipe(pHwData->WbUsb.udev, 0),
302                                0x01, USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN,
303                                0x0, RegisterNo, pltmp, 4, HZ*100 );
304
305         *pRegisterValue = cpu_to_le32(*pltmp);
306
307         pWb35Reg->EP0vm_state = VM_STOP;
308
309         Wb35Reg_Update( pHwData, RegisterNo, *pRegisterValue );
310         pWb35Reg->SyncIoPause = 0;
311
312         Wb35Reg_EP0VM_start( pHwData );
313
314         if (ret < 0) {
315                 #ifdef _PE_REG_DUMP_
316                 WBDEBUG(("EP0 Read register usb message sending error\n"));
317                 #endif
318
319                 pHwData->SurpriseRemove = 1; // 20060704.2
320                 return FALSE;
321         }
322
323         return TRUE;
324 }
325
326 // TRUE  : read command process successfully
327 // FALSE : register not support
328 // pRegisterValue : It must be a resident buffer due to asynchronous read register.
329 unsigned char
330 Wb35Reg_Read(phw_data_t pHwData, u16 RegisterNo,  PULONG pRegisterValue )
331 {
332         PWB35REG        pWb35Reg = &pHwData->Wb35Reg;
333         struct usb_ctrlrequest * dr;
334         PURB            pUrb;
335         PREG_QUEUE      pRegQueue;
336         u16             UrbSize;
337
338         // Module shutdown
339         if (pHwData->SurpriseRemove)
340                 return FALSE;
341
342         // update the variable by send Urb to read register ------------------------------------
343         UrbSize = sizeof(REG_QUEUE) + sizeof(struct usb_ctrlrequest);
344         OS_MEMORY_ALLOC( (void* *)&pRegQueue, UrbSize );
345         pUrb = wb_usb_alloc_urb(0);
346         if( pUrb && pRegQueue )
347         {
348                 pRegQueue->DIRECT = 0;// read register
349                 pRegQueue->INDEX = RegisterNo;
350                 pRegQueue->pBuffer = pRegisterValue;
351                 dr = (struct usb_ctrlrequest *)((PUCHAR)pRegQueue + sizeof(REG_QUEUE));
352                 dr->bRequestType = USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN;
353                 dr->bRequest = 0x01; // USB or vendor-defined request code, burst mode
354                 dr->wValue = cpu_to_le16(0x0);
355                 dr->wIndex = cpu_to_le16 (RegisterNo);
356                 dr->wLength = cpu_to_le16 (4);
357
358                 // Enter the sending queue
359                 pRegQueue->Next = NULL;
360                 pRegQueue->pUsbReq = dr;
361                 pRegQueue->pUrb = pUrb;
362                 OS_SPIN_LOCK_ACQUIRED ( &pWb35Reg->EP0VM_spin_lock );
363                 if( pWb35Reg->pRegFirst == NULL )
364                         pWb35Reg->pRegFirst = pRegQueue;
365                 else
366                         pWb35Reg->pRegLast->Next = pRegQueue;
367                 pWb35Reg->pRegLast = pRegQueue;
368
369                 OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
370
371                 // Start EP0VM
372                 Wb35Reg_EP0VM_start( pHwData );
373
374                 return TRUE;
375         } else {
376                 if (pUrb)
377                         usb_free_urb( pUrb );
378                 kfree(pRegQueue);
379                 return FALSE;
380         }
381 }
382
383
384 void
385 Wb35Reg_EP0VM_start(  phw_data_t pHwData )
386 {
387         PWB35REG pWb35Reg = &pHwData->Wb35Reg;
388
389         if (OS_ATOMIC_INC( pHwData->Adapter, &pWb35Reg->RegFireCount) == 1) {
390                 pWb35Reg->EP0vm_state = VM_RUNNING;
391                 Wb35Reg_EP0VM(pHwData);
392         } else
393                 OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Reg->RegFireCount );
394 }
395
396 void
397 Wb35Reg_EP0VM(phw_data_t pHwData )
398 {
399         PWB35REG        pWb35Reg = &pHwData->Wb35Reg;
400         PURB            pUrb;
401         struct usb_ctrlrequest *dr;
402         PULONG          pBuffer;
403         int                     ret = -1;
404         PREG_QUEUE      pRegQueue;
405
406
407         if (pWb35Reg->SyncIoPause)
408                 goto cleanup;
409
410         if (pHwData->SurpriseRemove)
411                 goto cleanup;
412
413         // Get the register data and send to USB through Irp
414         OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
415         pRegQueue = pWb35Reg->pRegFirst;
416         OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
417
418         if (!pRegQueue)
419                 goto cleanup;
420
421         // Get an Urb, send it
422         pUrb = (PURB)pRegQueue->pUrb;
423
424         dr = pRegQueue->pUsbReq;
425         pUrb = pRegQueue->pUrb;
426         pBuffer = pRegQueue->pBuffer;
427         if (pRegQueue->DIRECT == 1) // output
428                 pBuffer = &pRegQueue->VALUE;
429
430         usb_fill_control_urb( pUrb, pHwData->WbUsb.udev,
431                               REG_DIRECTION(pHwData->WbUsb.udev,pRegQueue),
432                               (PUCHAR)dr,pBuffer,cpu_to_le16(dr->wLength),
433                               Wb35Reg_EP0VM_complete, (void*)pHwData);
434
435         pWb35Reg->EP0vm_state = VM_RUNNING;
436
437         ret = wb_usb_submit_urb( pUrb );
438
439         if (ret < 0) {
440 #ifdef _PE_REG_DUMP_
441                 WBDEBUG(("EP0 Irp sending error\n"));
442 #endif
443                 goto cleanup;
444         }
445
446         return;
447
448  cleanup:
449         pWb35Reg->EP0vm_state = VM_STOP;
450         OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Reg->RegFireCount );
451 }
452
453
454 void
455 Wb35Reg_EP0VM_complete(PURB pUrb)
456 {
457         phw_data_t  pHwData = (phw_data_t)pUrb->context;
458         PWB35REG        pWb35Reg = &pHwData->Wb35Reg;
459         PREG_QUEUE      pRegQueue;
460
461
462         // Variable setting
463         pWb35Reg->EP0vm_state = VM_COMPLETED;
464         pWb35Reg->EP0VM_status = pUrb->status;
465
466         if (pHwData->SurpriseRemove) { // Let WbWlanHalt to handle surprise remove
467                 pWb35Reg->EP0vm_state = VM_STOP;
468                 OS_ATOMIC_DEC( pHwData->Adapter, &pWb35Reg->RegFireCount );
469         } else {
470                 // Complete to send, remove the URB from the first
471                 OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
472                 pRegQueue = pWb35Reg->pRegFirst;
473                 if (pRegQueue == pWb35Reg->pRegLast)
474                         pWb35Reg->pRegLast = NULL;
475                 pWb35Reg->pRegFirst = pWb35Reg->pRegFirst->Next;
476                 OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
477
478                 if (pWb35Reg->EP0VM_status) {
479 #ifdef _PE_REG_DUMP_
480                         WBDEBUG(("EP0 IoCompleteRoutine return error\n"));
481                         DebugUsbdStatusInformation( pWb35Reg->EP0VM_status );
482 #endif
483                         pWb35Reg->EP0vm_state = VM_STOP;
484                         pHwData->SurpriseRemove = 1;
485                 } else {
486                         // Success. Update the result
487
488                         // Start the next send
489                         Wb35Reg_EP0VM(pHwData);
490                 }
491
492                 kfree(pRegQueue);
493         }
494
495         usb_free_urb(pUrb);
496 }
497
498
499 void
500 Wb35Reg_destroy(phw_data_t pHwData)
501 {
502         PWB35REG        pWb35Reg = &pHwData->Wb35Reg;
503         PURB            pUrb;
504         PREG_QUEUE      pRegQueue;
505
506
507         Uxx_power_off_procedure(pHwData);
508
509         // Wait for Reg operation completed
510         do {
511                 OS_SLEEP(10000); // Delay for waiting function enter 940623.1.a
512         } while (pWb35Reg->EP0vm_state != VM_STOP);
513         OS_SLEEP(10000);  // Delay for waiting function enter 940623.1.b
514
515         // Release all the data in RegQueue
516         OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
517         pRegQueue = pWb35Reg->pRegFirst;
518         while (pRegQueue) {
519                 if (pRegQueue == pWb35Reg->pRegLast)
520                         pWb35Reg->pRegLast = NULL;
521                 pWb35Reg->pRegFirst = pWb35Reg->pRegFirst->Next;
522
523                 pUrb = pRegQueue->pUrb;
524                 OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
525                 if (pUrb) {
526                         usb_free_urb(pUrb);
527                         kfree(pRegQueue);
528                 } else {
529                         #ifdef _PE_REG_DUMP_
530                         WBDEBUG(("EP0 queue release error\n"));
531                         #endif
532                 }
533                 OS_SPIN_LOCK_ACQUIRED( &pWb35Reg->EP0VM_spin_lock );
534
535                 pRegQueue = pWb35Reg->pRegFirst;
536         }
537         OS_SPIN_LOCK_RELEASED( &pWb35Reg->EP0VM_spin_lock );
538
539         // Free resource
540         OS_SPIN_LOCK_FREE(  &pWb35Reg->EP0VM_spin_lock );
541 }
542
543 //====================================================================================
544 // The function can be run in passive-level only.
545 //====================================================================================
546 unsigned char Wb35Reg_initial(phw_data_t pHwData)
547 {
548         PWB35REG pWb35Reg=&pHwData->Wb35Reg;
549         u32 ltmp;
550         u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
551
552         // Spin lock is acquired for read and write IRP command
553         OS_SPIN_LOCK_ALLOCATE( &pWb35Reg->EP0VM_spin_lock );
554
555         // Getting RF module type from EEPROM ------------------------------------
556         Wb35Reg_WriteSync( pHwData, 0x03b4, 0x080d0000 ); // Start EEPROM access + Read + address(0x0d)
557         Wb35Reg_ReadSync( pHwData, 0x03b4, &ltmp );
558
559         //Update RF module type and determine the PHY type by inf or EEPROM
560         pWb35Reg->EEPROMPhyType = (u8)( ltmp & 0xff );
561         // 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
562         // 16V AL2230, 17 - AL7230, 18 - AL2230S
563         // 32 Reserved
564         // 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
565         if (pWb35Reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
566                 if( (pWb35Reg->EEPROMPhyType == RF_MAXIM_2825)  ||
567                         (pWb35Reg->EEPROMPhyType == RF_MAXIM_2827)      ||
568                         (pWb35Reg->EEPROMPhyType == RF_MAXIM_2828)      ||
569                         (pWb35Reg->EEPROMPhyType == RF_MAXIM_2829)      ||
570                         (pWb35Reg->EEPROMPhyType == RF_MAXIM_V1)        ||
571                         (pWb35Reg->EEPROMPhyType == RF_AIROHA_2230)     ||
572                         (pWb35Reg->EEPROMPhyType == RF_AIROHA_2230S)    ||
573                         (pWb35Reg->EEPROMPhyType == RF_AIROHA_7230)     ||
574                         (pWb35Reg->EEPROMPhyType == RF_WB_242)          ||
575                         (pWb35Reg->EEPROMPhyType == RF_WB_242_1))
576                         pHwData->phy_type = pWb35Reg->EEPROMPhyType;
577         }
578
579         // Power On procedure running. The relative parameter will be set according to phy_type
580         Uxx_power_on_procedure( pHwData );
581
582         // Reading MAC address
583         Uxx_ReadEthernetAddress( pHwData );
584
585         // Read VCO trim for RF parameter
586         Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08200000 );
587         Wb35Reg_ReadSync( pHwData, 0x03b4, &VCO_trim );
588
589         // Read Antenna On/Off of software flag
590         Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08210000 );
591         Wb35Reg_ReadSync( pHwData, 0x03b4, &SoftwareSet );
592
593         // Read TXVGA
594         Wb35Reg_WriteSync( pHwData, 0x03b4, 0x08100000 );
595         Wb35Reg_ReadSync( pHwData, 0x03b4, &TxVga );
596
597         // Get Scan interval setting from EEPROM offset 0x1c
598         Wb35Reg_WriteSync( pHwData, 0x03b4, 0x081d0000 );
599         Wb35Reg_ReadSync( pHwData, 0x03b4, &Region_ScanInterval );
600
601         // Update Ethernet address
602         memcpy( pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_LENGTH_OF_ADDRESS );
603
604         // Update software variable
605         pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
606         TxVga &= 0x000000ff;
607         pHwData->PowerIndexFromEEPROM = (u8)TxVga;
608         pHwData->VCO_trim = (u8)VCO_trim & 0xff;
609         if (pHwData->VCO_trim == 0xff)
610                 pHwData->VCO_trim = 0x28;
611
612         pWb35Reg->EEPROMRegion = (u8)(Region_ScanInterval>>8); // 20060720
613         if( pWb35Reg->EEPROMRegion<1 || pWb35Reg->EEPROMRegion>6 )
614                 pWb35Reg->EEPROMRegion = REGION_AUTO;
615
616         //For Get Tx VGA from EEPROM 20060315.5 move here
617         GetTxVgaFromEEPROM( pHwData );
618
619         // Set Scan Interval
620         pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
621         if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) // Is default setting 0xff * 10
622                 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
623
624         // Initial register
625         RFSynthesizer_initial(pHwData);
626
627         BBProcessor_initial(pHwData); // Async write, must wait until complete
628
629         Wb35Reg_phy_calibration(pHwData);
630
631         Mxx_initial(pHwData);
632         Dxx_initial(pHwData);
633
634         if (pHwData->SurpriseRemove)
635                 return FALSE;
636         else
637                 return TRUE; // Initial fail
638 }
639
640 //===================================================================================
641 //  CardComputeCrc --
642 //
643 //  Description:
644 //    Runs the AUTODIN II CRC algorithm on buffer Buffer of length, Length.
645 //
646 //  Arguments:
647 //    Buffer - the input buffer
648 //    Length - the length of Buffer
649 //
650 //  Return Value:
651 //    The 32-bit CRC value.
652 //
653 //  Note:
654 //    This is adapted from the comments in the assembly language
655 //    version in _GENREQ.ASM of the DWB NE1000/2000 driver.
656 //==================================================================================
657 u32
658 CardComputeCrc(PUCHAR Buffer, u32 Length)
659 {
660     u32 Crc, Carry;
661     u32  i, j;
662     u8 CurByte;
663
664     Crc = 0xffffffff;
665
666     for (i = 0; i < Length; i++) {
667
668         CurByte = Buffer[i];
669
670         for (j = 0; j < 8; j++) {
671
672             Carry     = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
673             Crc     <<= 1;
674             CurByte >>= 1;
675
676             if (Carry) {
677                 Crc =(Crc ^ 0x04c11db6) | Carry;
678             }
679         }
680     }
681
682     return Crc;
683 }
684
685
686 //==================================================================
687 // BitReverse --
688 //   Reverse the bits in the input argument, dwData, which is
689 //   regarded as a string of bits with the length, DataLength.
690 //
691 // Arguments:
692 //   dwData     :
693 //   DataLength :
694 //
695 // Return:
696 //   The converted value.
697 //==================================================================
698 u32 BitReverse( u32 dwData, u32 DataLength)
699 {
700         u32   HalfLength, i, j;
701         u32   BitA, BitB;
702
703         if ( DataLength <= 0)       return 0;   // No conversion is done.
704         dwData = dwData & (0xffffffff >> (32 - DataLength));
705
706         HalfLength = DataLength / 2;
707         for ( i = 0, j = DataLength-1 ; i < HalfLength; i++, j--)
708         {
709                 BitA = GetBit( dwData, i);
710                 BitB = GetBit( dwData, j);
711                 if (BitA && !BitB) {
712                         dwData = ClearBit( dwData, i);
713                         dwData = SetBit( dwData, j);
714                 } else if (!BitA && BitB) {
715                         dwData = SetBit( dwData, i);
716                         dwData = ClearBit( dwData, j);
717                 } else
718                 {
719                         // Do nothing since these two bits are of the save values.
720                 }
721         }
722
723         return dwData;
724 }
725
726 void Wb35Reg_phy_calibration(  phw_data_t pHwData )
727 {
728         u32 BB3c, BB54;
729
730         if ((pHwData->phy_type == RF_WB_242) ||
731                 (pHwData->phy_type == RF_WB_242_1)) {
732                 phy_calibration_winbond ( pHwData, 2412 ); // Sync operation
733                 Wb35Reg_ReadSync( pHwData, 0x103c, &BB3c );
734                 Wb35Reg_ReadSync( pHwData, 0x1054, &BB54 );
735
736                 pHwData->BB3c_cal = BB3c;
737                 pHwData->BB54_cal = BB54;
738
739                 RFSynthesizer_initial(pHwData);
740                 BBProcessor_initial(pHwData); // Async operation
741
742                 Wb35Reg_WriteSync( pHwData, 0x103c, BB3c );
743                 Wb35Reg_WriteSync( pHwData, 0x1054, BB54 );
744         }
745 }
746
747