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   1 /*
   2  * arch/s390/kernel/head31.S
   3  *
   4  * Copyright (C) IBM Corp. 2005,2006
   5  *
   6  *   Author(s): Hartmut Penner <hp@de.ibm.com>
   7  *              Martin Schwidefsky <schwidefsky@de.ibm.com>
   8  *              Rob van der Heij <rvdhei@iae.nl>
   9  *              Heiko Carstens <heiko.carstens@de.ibm.com>
  10  *
  11  */
  12
  13         .org    0x11000
  14
  15 startup_continue:
  16         basr    %r13,0                  # get base
  17 .LPG1:
  18
  19         mvi     __LC_AR_MODE_ID,0       # set ESA flag (mode 0)
  20         lctl    %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
  21         l       %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
  22                                         # move IPL device to lowcore
  23 #
  24 # Setup stack
  25 #
  26         l       %r15,.Linittu-.LPG1(%r13)
  27         mvc     __LC_CURRENT(4),__TI_task(%r15)
  28         ahi     %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
  29         st      %r15,__LC_KERNEL_STACK  # set end of kernel stack
  30         ahi     %r15,-96
  31 #
  32 # Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
  33 # and create a kernel NSS if the SAVESYS= parm is defined
  34 #
  35         l       %r14,.Lstartup_init-.LPG1(%r13)
  36         basr    %r14,%r14
  37         lpsw  .Lentry-.LPG1(13)         # jump to _stext in primary-space,
  38                                         # virtual and never return ...
  39         .align  8
  40 .Lentry:.long   0x00080000,0x80000000 + _stext
  41 .Lctl:  .long   0x04b50002              # cr0: various things
  42         .long   0                       # cr1: primary space segment table
  43         .long   .Lduct                  # cr2: dispatchable unit control table
  44         .long   0                       # cr3: instruction authorization
  45         .long   0                       # cr4: instruction authorization
  46         .long   .Lduct                  # cr5: primary-aste origin
  47         .long   0                       # cr6:  I/O interrupts
  48         .long   0                       # cr7:  secondary space segment table
  49         .long   0                       # cr8:  access registers translation
  50         .long   0                       # cr9:  tracing off
  51         .long   0                       # cr10: tracing off
  52         .long   0                       # cr11: tracing off
  53         .long   0                       # cr12: tracing off
  54         .long   0                       # cr13: home space segment table
  55         .long   0xc0000000              # cr14: machine check handling off
  56         .long   0                       # cr15: linkage stack operations
  57 .Lmchunk:.long  memory_chunk
  58 .Lbss_bgn:  .long __bss_start
  59 .Lbss_end:  .long _end
  60 .Lparmaddr: .long PARMAREA
  61 .Linittu:   .long init_thread_union
  62 .Lstartup_init:
  63             .long startup_init
  64         .align  64
  65 .Lduct: .long   0,0,0,0,.Lduald,0,0,0
  66         .long   0,0,0,0,0,0,0,0
  67         .align  128
  68 .Lduald:.rept   8
  69         .long   0x80000000,0,0,0        # invalid access-list entries
  70         .endr
  71
  72         .org    0x12000
  73         .globl  _ehead
  74 _ehead:
  75 #ifdef CONFIG_SHARED_KERNEL
  76         .org    0x100000
  77 #endif
  78
  79 #
  80 # startup-code, running in absolute addressing mode
  81 #
  82         .globl  _stext
  83 _stext: basr    %r13,0                  # get base
  84 .LPG3:
  85 # check control registers
  86         stctl   %c0,%c15,0(%r15)
  87         oi      2(%r15),0x40            # enable sigp emergency signal
  88         oi      0(%r15),0x10            # switch on low address protection
  89         lctl    %c0,%c15,0(%r15)
  90
  91 #
  92         lam     0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
  93         l       %r14,.Lstart-.LPG3(%r13)
  94         basr    %r14,%r14               # call start_kernel
  95 #
  96 # We returned from start_kernel ?!? PANIK
  97 #
  98         basr    %r13,0
  99         lpsw    .Ldw-.(%r13)            # load disabled wait psw
 100 #
 101         .align  8
 102 .Ldw:   .long   0x000a0000,0x00000000
 103 .Lstart:.long   start_kernel
 104 .Laregs:.long   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0