Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
[linux-2.6] / arch / arm / mach-at91 / at91sam9261_devices.c
1 /*
2  * arch/arm/mach-at91/at91sam9261_devices.c
3  *
4  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5  *  Copyright (C) 2005 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <linux/fb.h>
21 #include <video/atmel_lcdc.h>
22
23 #include <asm/arch/board.h>
24 #include <asm/arch/gpio.h>
25 #include <asm/arch/at91sam9261.h>
26 #include <asm/arch/at91sam9261_matrix.h>
27 #include <asm/arch/at91sam926x_mc.h>
28
29 #include "generic.h"
30
31
32 /* --------------------------------------------------------------------
33  *  USB Host
34  * -------------------------------------------------------------------- */
35
36 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
37 static u64 ohci_dmamask = DMA_BIT_MASK(32);
38 static struct at91_usbh_data usbh_data;
39
40 static struct resource usbh_resources[] = {
41         [0] = {
42                 .start  = AT91SAM9261_UHP_BASE,
43                 .end    = AT91SAM9261_UHP_BASE + SZ_1M - 1,
44                 .flags  = IORESOURCE_MEM,
45         },
46         [1] = {
47                 .start  = AT91SAM9261_ID_UHP,
48                 .end    = AT91SAM9261_ID_UHP,
49                 .flags  = IORESOURCE_IRQ,
50         },
51 };
52
53 static struct platform_device at91sam9261_usbh_device = {
54         .name           = "at91_ohci",
55         .id             = -1,
56         .dev            = {
57                                 .dma_mask               = &ohci_dmamask,
58                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
59                                 .platform_data          = &usbh_data,
60         },
61         .resource       = usbh_resources,
62         .num_resources  = ARRAY_SIZE(usbh_resources),
63 };
64
65 void __init at91_add_device_usbh(struct at91_usbh_data *data)
66 {
67         if (!data)
68                 return;
69
70         usbh_data = *data;
71         platform_device_register(&at91sam9261_usbh_device);
72 }
73 #else
74 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
75 #endif
76
77
78 /* --------------------------------------------------------------------
79  *  USB Device (Gadget)
80  * -------------------------------------------------------------------- */
81
82 #ifdef CONFIG_USB_GADGET_AT91
83 static struct at91_udc_data udc_data;
84
85 static struct resource udc_resources[] = {
86         [0] = {
87                 .start  = AT91SAM9261_BASE_UDP,
88                 .end    = AT91SAM9261_BASE_UDP + SZ_16K - 1,
89                 .flags  = IORESOURCE_MEM,
90         },
91         [1] = {
92                 .start  = AT91SAM9261_ID_UDP,
93                 .end    = AT91SAM9261_ID_UDP,
94                 .flags  = IORESOURCE_IRQ,
95         },
96 };
97
98 static struct platform_device at91sam9261_udc_device = {
99         .name           = "at91_udc",
100         .id             = -1,
101         .dev            = {
102                                 .platform_data          = &udc_data,
103         },
104         .resource       = udc_resources,
105         .num_resources  = ARRAY_SIZE(udc_resources),
106 };
107
108 void __init at91_add_device_udc(struct at91_udc_data *data)
109 {
110         if (!data)
111                 return;
112
113         if (data->vbus_pin) {
114                 at91_set_gpio_input(data->vbus_pin, 0);
115                 at91_set_deglitch(data->vbus_pin, 1);
116         }
117
118         /* Pullup pin is handled internally by USB device peripheral */
119
120         udc_data = *data;
121         platform_device_register(&at91sam9261_udc_device);
122 }
123 #else
124 void __init at91_add_device_udc(struct at91_udc_data *data) {}
125 #endif
126
127 /* --------------------------------------------------------------------
128  *  MMC / SD
129  * -------------------------------------------------------------------- */
130
131 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
132 static u64 mmc_dmamask = DMA_BIT_MASK(32);
133 static struct at91_mmc_data mmc_data;
134
135 static struct resource mmc_resources[] = {
136         [0] = {
137                 .start  = AT91SAM9261_BASE_MCI,
138                 .end    = AT91SAM9261_BASE_MCI + SZ_16K - 1,
139                 .flags  = IORESOURCE_MEM,
140         },
141         [1] = {
142                 .start  = AT91SAM9261_ID_MCI,
143                 .end    = AT91SAM9261_ID_MCI,
144                 .flags  = IORESOURCE_IRQ,
145         },
146 };
147
148 static struct platform_device at91sam9261_mmc_device = {
149         .name           = "at91_mci",
150         .id             = -1,
151         .dev            = {
152                                 .dma_mask               = &mmc_dmamask,
153                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
154                                 .platform_data          = &mmc_data,
155         },
156         .resource       = mmc_resources,
157         .num_resources  = ARRAY_SIZE(mmc_resources),
158 };
159
160 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
161 {
162         if (!data)
163                 return;
164
165         /* input/irq */
166         if (data->det_pin) {
167                 at91_set_gpio_input(data->det_pin, 1);
168                 at91_set_deglitch(data->det_pin, 1);
169         }
170         if (data->wp_pin)
171                 at91_set_gpio_input(data->wp_pin, 1);
172         if (data->vcc_pin)
173                 at91_set_gpio_output(data->vcc_pin, 0);
174
175         /* CLK */
176         at91_set_B_periph(AT91_PIN_PA2, 0);
177
178         /* CMD */
179         at91_set_B_periph(AT91_PIN_PA1, 1);
180
181         /* DAT0, maybe DAT1..DAT3 */
182         at91_set_B_periph(AT91_PIN_PA0, 1);
183         if (data->wire4) {
184                 at91_set_B_periph(AT91_PIN_PA4, 1);
185                 at91_set_B_periph(AT91_PIN_PA5, 1);
186                 at91_set_B_periph(AT91_PIN_PA6, 1);
187         }
188
189         mmc_data = *data;
190         platform_device_register(&at91sam9261_mmc_device);
191 }
192 #else
193 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
194 #endif
195
196
197 /* --------------------------------------------------------------------
198  *  NAND / SmartMedia
199  * -------------------------------------------------------------------- */
200
201 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
202 static struct at91_nand_data nand_data;
203
204 #define NAND_BASE       AT91_CHIPSELECT_3
205
206 static struct resource nand_resources[] = {
207         {
208                 .start  = NAND_BASE,
209                 .end    = NAND_BASE + SZ_256M - 1,
210                 .flags  = IORESOURCE_MEM,
211         }
212 };
213
214 static struct platform_device at91_nand_device = {
215         .name           = "at91_nand",
216         .id             = -1,
217         .dev            = {
218                                 .platform_data  = &nand_data,
219         },
220         .resource       = nand_resources,
221         .num_resources  = ARRAY_SIZE(nand_resources),
222 };
223
224 void __init at91_add_device_nand(struct at91_nand_data *data)
225 {
226         unsigned long csa, mode;
227
228         if (!data)
229                 return;
230
231         csa = at91_sys_read(AT91_MATRIX_EBICSA);
232         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
233
234         /* set the bus interface characteristics */
235         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
236                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
237
238         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
239                         | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
240
241         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
242
243         if (data->bus_width_16)
244                 mode = AT91_SMC_DBW_16;
245         else
246                 mode = AT91_SMC_DBW_8;
247         at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
248
249         /* enable pin */
250         if (data->enable_pin)
251                 at91_set_gpio_output(data->enable_pin, 1);
252
253         /* ready/busy pin */
254         if (data->rdy_pin)
255                 at91_set_gpio_input(data->rdy_pin, 1);
256
257         /* card detect pin */
258         if (data->det_pin)
259                 at91_set_gpio_input(data->det_pin, 1);
260
261         at91_set_A_periph(AT91_PIN_PC0, 0);             /* NANDOE */
262         at91_set_A_periph(AT91_PIN_PC1, 0);             /* NANDWE */
263
264         nand_data = *data;
265         platform_device_register(&at91_nand_device);
266 }
267
268 #else
269 void __init at91_add_device_nand(struct at91_nand_data *data) {}
270 #endif
271
272
273 /* --------------------------------------------------------------------
274  *  TWI (i2c)
275  * -------------------------------------------------------------------- */
276
277 /*
278  * Prefer the GPIO code since the TWI controller isn't robust
279  * (gets overruns and underruns under load) and can only issue
280  * repeated STARTs in one scenario (the driver doesn't yet handle them).
281  */
282 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
283
284 static struct i2c_gpio_platform_data pdata = {
285         .sda_pin                = AT91_PIN_PA7,
286         .sda_is_open_drain      = 1,
287         .scl_pin                = AT91_PIN_PA8,
288         .scl_is_open_drain      = 1,
289         .udelay                 = 2,            /* ~100 kHz */
290 };
291
292 static struct platform_device at91sam9261_twi_device = {
293         .name                   = "i2c-gpio",
294         .id                     = -1,
295         .dev.platform_data      = &pdata,
296 };
297
298 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
299 {
300         at91_set_GPIO_periph(AT91_PIN_PA7, 1);          /* TWD (SDA) */
301         at91_set_multi_drive(AT91_PIN_PA7, 1);
302
303         at91_set_GPIO_periph(AT91_PIN_PA8, 1);          /* TWCK (SCL) */
304         at91_set_multi_drive(AT91_PIN_PA8, 1);
305
306         i2c_register_board_info(0, devices, nr_devices);
307         platform_device_register(&at91sam9261_twi_device);
308 }
309
310 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
311
312 static struct resource twi_resources[] = {
313         [0] = {
314                 .start  = AT91SAM9261_BASE_TWI,
315                 .end    = AT91SAM9261_BASE_TWI + SZ_16K - 1,
316                 .flags  = IORESOURCE_MEM,
317         },
318         [1] = {
319                 .start  = AT91SAM9261_ID_TWI,
320                 .end    = AT91SAM9261_ID_TWI,
321                 .flags  = IORESOURCE_IRQ,
322         },
323 };
324
325 static struct platform_device at91sam9261_twi_device = {
326         .name           = "at91_i2c",
327         .id             = -1,
328         .resource       = twi_resources,
329         .num_resources  = ARRAY_SIZE(twi_resources),
330 };
331
332 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
333 {
334         /* pins used for TWI interface */
335         at91_set_A_periph(AT91_PIN_PA7, 0);             /* TWD */
336         at91_set_multi_drive(AT91_PIN_PA7, 1);
337
338         at91_set_A_periph(AT91_PIN_PA8, 0);             /* TWCK */
339         at91_set_multi_drive(AT91_PIN_PA8, 1);
340
341         i2c_register_board_info(0, devices, nr_devices);
342         platform_device_register(&at91sam9261_twi_device);
343 }
344 #else
345 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
346 #endif
347
348
349 /* --------------------------------------------------------------------
350  *  SPI
351  * -------------------------------------------------------------------- */
352
353 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
354 static u64 spi_dmamask = DMA_BIT_MASK(32);
355
356 static struct resource spi0_resources[] = {
357         [0] = {
358                 .start  = AT91SAM9261_BASE_SPI0,
359                 .end    = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
360                 .flags  = IORESOURCE_MEM,
361         },
362         [1] = {
363                 .start  = AT91SAM9261_ID_SPI0,
364                 .end    = AT91SAM9261_ID_SPI0,
365                 .flags  = IORESOURCE_IRQ,
366         },
367 };
368
369 static struct platform_device at91sam9261_spi0_device = {
370         .name           = "atmel_spi",
371         .id             = 0,
372         .dev            = {
373                                 .dma_mask               = &spi_dmamask,
374                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
375         },
376         .resource       = spi0_resources,
377         .num_resources  = ARRAY_SIZE(spi0_resources),
378 };
379
380 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
381
382 static struct resource spi1_resources[] = {
383         [0] = {
384                 .start  = AT91SAM9261_BASE_SPI1,
385                 .end    = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
386                 .flags  = IORESOURCE_MEM,
387         },
388         [1] = {
389                 .start  = AT91SAM9261_ID_SPI1,
390                 .end    = AT91SAM9261_ID_SPI1,
391                 .flags  = IORESOURCE_IRQ,
392         },
393 };
394
395 static struct platform_device at91sam9261_spi1_device = {
396         .name           = "atmel_spi",
397         .id             = 1,
398         .dev            = {
399                                 .dma_mask               = &spi_dmamask,
400                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
401         },
402         .resource       = spi1_resources,
403         .num_resources  = ARRAY_SIZE(spi1_resources),
404 };
405
406 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
407
408 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
409 {
410         int i;
411         unsigned long cs_pin;
412         short enable_spi0 = 0;
413         short enable_spi1 = 0;
414
415         /* Choose SPI chip-selects */
416         for (i = 0; i < nr_devices; i++) {
417                 if (devices[i].controller_data)
418                         cs_pin = (unsigned long) devices[i].controller_data;
419                 else if (devices[i].bus_num == 0)
420                         cs_pin = spi0_standard_cs[devices[i].chip_select];
421                 else
422                         cs_pin = spi1_standard_cs[devices[i].chip_select];
423
424                 if (devices[i].bus_num == 0)
425                         enable_spi0 = 1;
426                 else
427                         enable_spi1 = 1;
428
429                 /* enable chip-select pin */
430                 at91_set_gpio_output(cs_pin, 1);
431
432                 /* pass chip-select pin to driver */
433                 devices[i].controller_data = (void *) cs_pin;
434         }
435
436         spi_register_board_info(devices, nr_devices);
437
438         /* Configure SPI bus(es) */
439         if (enable_spi0) {
440                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
441                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
442                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
443
444                 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
445                 platform_device_register(&at91sam9261_spi0_device);
446         }
447         if (enable_spi1) {
448                 at91_set_A_periph(AT91_PIN_PB30, 0);    /* SPI1_MISO */
449                 at91_set_A_periph(AT91_PIN_PB31, 0);    /* SPI1_MOSI */
450                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* SPI1_SPCK */
451
452                 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
453                 platform_device_register(&at91sam9261_spi1_device);
454         }
455 }
456 #else
457 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
458 #endif
459
460
461 /* --------------------------------------------------------------------
462  *  LCD Controller
463  * -------------------------------------------------------------------- */
464
465 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
466 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
467 static struct atmel_lcdfb_info lcdc_data;
468
469 static struct resource lcdc_resources[] = {
470         [0] = {
471                 .start  = AT91SAM9261_LCDC_BASE,
472                 .end    = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
473                 .flags  = IORESOURCE_MEM,
474         },
475         [1] = {
476                 .start  = AT91SAM9261_ID_LCDC,
477                 .end    = AT91SAM9261_ID_LCDC,
478                 .flags  = IORESOURCE_IRQ,
479         },
480 #if defined(CONFIG_FB_INTSRAM)
481         [2] = {
482                 .start  = AT91SAM9261_SRAM_BASE,
483                 .end    = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
484                 .flags  = IORESOURCE_MEM,
485         },
486 #endif
487 };
488
489 static struct platform_device at91_lcdc_device = {
490         .name           = "atmel_lcdfb",
491         .id             = 0,
492         .dev            = {
493                                 .dma_mask               = &lcdc_dmamask,
494                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
495                                 .platform_data          = &lcdc_data,
496         },
497         .resource       = lcdc_resources,
498         .num_resources  = ARRAY_SIZE(lcdc_resources),
499 };
500
501 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
502 {
503         if (!data) {
504                 return;
505         }
506
507 #if defined(CONFIG_FB_ATMEL_STN)
508         at91_set_A_periph(AT91_PIN_PB0, 0);     /* LCDVSYNC */
509         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
510         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
511         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
512         at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
513         at91_set_A_periph(AT91_PIN_PB5, 0);     /* LCDD0 */
514         at91_set_A_periph(AT91_PIN_PB6, 0);     /* LCDD1 */
515         at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
516         at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
517 #else
518         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
519         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
520         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
521         at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
522         at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
523         at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
524         at91_set_A_periph(AT91_PIN_PB9, 0);     /* LCDD4 */
525         at91_set_A_periph(AT91_PIN_PB10, 0);    /* LCDD5 */
526         at91_set_A_periph(AT91_PIN_PB11, 0);    /* LCDD6 */
527         at91_set_A_periph(AT91_PIN_PB12, 0);    /* LCDD7 */
528         at91_set_A_periph(AT91_PIN_PB15, 0);    /* LCDD10 */
529         at91_set_A_periph(AT91_PIN_PB16, 0);    /* LCDD11 */
530         at91_set_A_periph(AT91_PIN_PB17, 0);    /* LCDD12 */
531         at91_set_A_periph(AT91_PIN_PB18, 0);    /* LCDD13 */
532         at91_set_A_periph(AT91_PIN_PB19, 0);    /* LCDD14 */
533         at91_set_A_periph(AT91_PIN_PB20, 0);    /* LCDD15 */
534         at91_set_B_periph(AT91_PIN_PB23, 0);    /* LCDD18 */
535         at91_set_B_periph(AT91_PIN_PB24, 0);    /* LCDD19 */
536         at91_set_B_periph(AT91_PIN_PB25, 0);    /* LCDD20 */
537         at91_set_B_periph(AT91_PIN_PB26, 0);    /* LCDD21 */
538         at91_set_B_periph(AT91_PIN_PB27, 0);    /* LCDD22 */
539         at91_set_B_periph(AT91_PIN_PB28, 0);    /* LCDD23 */
540 #endif
541
542         lcdc_data = *data;
543         platform_device_register(&at91_lcdc_device);
544 }
545 #else
546 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
547 #endif
548
549
550 /* --------------------------------------------------------------------
551  *  RTT
552  * -------------------------------------------------------------------- */
553
554 static struct resource rtt_resources[] = {
555         {
556                 .start  = AT91_BASE_SYS + AT91_RTT,
557                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
558                 .flags  = IORESOURCE_MEM,
559         }
560 };
561
562 static struct platform_device at91sam9261_rtt_device = {
563         .name           = "at91_rtt",
564         .id             = -1,
565         .resource       = rtt_resources,
566         .num_resources  = ARRAY_SIZE(rtt_resources),
567 };
568
569 static void __init at91_add_device_rtt(void)
570 {
571         platform_device_register(&at91sam9261_rtt_device);
572 }
573
574
575 /* --------------------------------------------------------------------
576  *  Watchdog
577  * -------------------------------------------------------------------- */
578
579 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
580 static struct platform_device at91sam9261_wdt_device = {
581         .name           = "at91_wdt",
582         .id             = -1,
583         .num_resources  = 0,
584 };
585
586 static void __init at91_add_device_watchdog(void)
587 {
588         platform_device_register(&at91sam9261_wdt_device);
589 }
590 #else
591 static void __init at91_add_device_watchdog(void) {}
592 #endif
593
594
595 /* --------------------------------------------------------------------
596  *  SSC -- Synchronous Serial Controller
597  * -------------------------------------------------------------------- */
598
599 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
600 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
601
602 static struct resource ssc0_resources[] = {
603         [0] = {
604                 .start  = AT91SAM9261_BASE_SSC0,
605                 .end    = AT91SAM9261_BASE_SSC0 + SZ_16K - 1,
606                 .flags  = IORESOURCE_MEM,
607         },
608         [1] = {
609                 .start  = AT91SAM9261_ID_SSC0,
610                 .end    = AT91SAM9261_ID_SSC0,
611                 .flags  = IORESOURCE_IRQ,
612         },
613 };
614
615 static struct platform_device at91sam9261_ssc0_device = {
616         .name   = "ssc",
617         .id     = 0,
618         .dev    = {
619                 .dma_mask               = &ssc0_dmamask,
620                 .coherent_dma_mask      = DMA_BIT_MASK(32),
621         },
622         .resource       = ssc0_resources,
623         .num_resources  = ARRAY_SIZE(ssc0_resources),
624 };
625
626 static inline void configure_ssc0_pins(unsigned pins)
627 {
628         if (pins & ATMEL_SSC_TF)
629                 at91_set_A_periph(AT91_PIN_PB21, 1);
630         if (pins & ATMEL_SSC_TK)
631                 at91_set_A_periph(AT91_PIN_PB22, 1);
632         if (pins & ATMEL_SSC_TD)
633                 at91_set_A_periph(AT91_PIN_PB23, 1);
634         if (pins & ATMEL_SSC_RD)
635                 at91_set_A_periph(AT91_PIN_PB24, 1);
636         if (pins & ATMEL_SSC_RK)
637                 at91_set_A_periph(AT91_PIN_PB25, 1);
638         if (pins & ATMEL_SSC_RF)
639                 at91_set_A_periph(AT91_PIN_PB26, 1);
640 }
641
642 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
643
644 static struct resource ssc1_resources[] = {
645         [0] = {
646                 .start  = AT91SAM9261_BASE_SSC1,
647                 .end    = AT91SAM9261_BASE_SSC1 + SZ_16K - 1,
648                 .flags  = IORESOURCE_MEM,
649         },
650         [1] = {
651                 .start  = AT91SAM9261_ID_SSC1,
652                 .end    = AT91SAM9261_ID_SSC1,
653                 .flags  = IORESOURCE_IRQ,
654         },
655 };
656
657 static struct platform_device at91sam9261_ssc1_device = {
658         .name   = "ssc",
659         .id     = 1,
660         .dev    = {
661                 .dma_mask               = &ssc1_dmamask,
662                 .coherent_dma_mask      = DMA_BIT_MASK(32),
663         },
664         .resource       = ssc1_resources,
665         .num_resources  = ARRAY_SIZE(ssc1_resources),
666 };
667
668 static inline void configure_ssc1_pins(unsigned pins)
669 {
670         if (pins & ATMEL_SSC_TF)
671                 at91_set_B_periph(AT91_PIN_PA17, 1);
672         if (pins & ATMEL_SSC_TK)
673                 at91_set_B_periph(AT91_PIN_PA18, 1);
674         if (pins & ATMEL_SSC_TD)
675                 at91_set_B_periph(AT91_PIN_PA19, 1);
676         if (pins & ATMEL_SSC_RD)
677                 at91_set_B_periph(AT91_PIN_PA20, 1);
678         if (pins & ATMEL_SSC_RK)
679                 at91_set_B_periph(AT91_PIN_PA21, 1);
680         if (pins & ATMEL_SSC_RF)
681                 at91_set_B_periph(AT91_PIN_PA22, 1);
682 }
683
684 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
685
686 static struct resource ssc2_resources[] = {
687         [0] = {
688                 .start  = AT91SAM9261_BASE_SSC2,
689                 .end    = AT91SAM9261_BASE_SSC2 + SZ_16K - 1,
690                 .flags  = IORESOURCE_MEM,
691         },
692         [1] = {
693                 .start  = AT91SAM9261_ID_SSC2,
694                 .end    = AT91SAM9261_ID_SSC2,
695                 .flags  = IORESOURCE_IRQ,
696         },
697 };
698
699 static struct platform_device at91sam9261_ssc2_device = {
700         .name   = "ssc",
701         .id     = 2,
702         .dev    = {
703                 .dma_mask               = &ssc2_dmamask,
704                 .coherent_dma_mask      = DMA_BIT_MASK(32),
705         },
706         .resource       = ssc2_resources,
707         .num_resources  = ARRAY_SIZE(ssc2_resources),
708 };
709
710 static inline void configure_ssc2_pins(unsigned pins)
711 {
712         if (pins & ATMEL_SSC_TF)
713                 at91_set_B_periph(AT91_PIN_PC25, 1);
714         if (pins & ATMEL_SSC_TK)
715                 at91_set_B_periph(AT91_PIN_PC26, 1);
716         if (pins & ATMEL_SSC_TD)
717                 at91_set_B_periph(AT91_PIN_PC27, 1);
718         if (pins & ATMEL_SSC_RD)
719                 at91_set_B_periph(AT91_PIN_PC28, 1);
720         if (pins & ATMEL_SSC_RK)
721                 at91_set_B_periph(AT91_PIN_PC29, 1);
722         if (pins & ATMEL_SSC_RF)
723                 at91_set_B_periph(AT91_PIN_PC30, 1);
724 }
725
726 /*
727  * SSC controllers are accessed through library code, instead of any
728  * kind of all-singing/all-dancing driver.  For example one could be
729  * used by a particular I2S audio codec's driver, while another one
730  * on the same system might be used by a custom data capture driver.
731  */
732 void __init at91_add_device_ssc(unsigned id, unsigned pins)
733 {
734         struct platform_device *pdev;
735
736         /*
737          * NOTE: caller is responsible for passing information matching
738          * "pins" to whatever will be using each particular controller.
739          */
740         switch (id) {
741         case AT91SAM9261_ID_SSC0:
742                 pdev = &at91sam9261_ssc0_device;
743                 configure_ssc0_pins(pins);
744                 at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
745                 break;
746         case AT91SAM9261_ID_SSC1:
747                 pdev = &at91sam9261_ssc1_device;
748                 configure_ssc1_pins(pins);
749                 at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
750                 break;
751         case AT91SAM9261_ID_SSC2:
752                 pdev = &at91sam9261_ssc2_device;
753                 configure_ssc2_pins(pins);
754                 at91_clock_associate("ssc2_clk", &pdev->dev, "pclk");
755                 break;
756         default:
757                 return;
758         }
759
760         platform_device_register(pdev);
761 }
762
763 #else
764 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
765 #endif
766
767
768 /* --------------------------------------------------------------------
769  *  UART
770  * -------------------------------------------------------------------- */
771
772 #if defined(CONFIG_SERIAL_ATMEL)
773 static struct resource dbgu_resources[] = {
774         [0] = {
775                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
776                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
777                 .flags  = IORESOURCE_MEM,
778         },
779         [1] = {
780                 .start  = AT91_ID_SYS,
781                 .end    = AT91_ID_SYS,
782                 .flags  = IORESOURCE_IRQ,
783         },
784 };
785
786 static struct atmel_uart_data dbgu_data = {
787         .use_dma_tx     = 0,
788         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
789         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
790 };
791
792 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
793
794 static struct platform_device at91sam9261_dbgu_device = {
795         .name           = "atmel_usart",
796         .id             = 0,
797         .dev            = {
798                                 .dma_mask               = &dbgu_dmamask,
799                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
800                                 .platform_data          = &dbgu_data,
801         },
802         .resource       = dbgu_resources,
803         .num_resources  = ARRAY_SIZE(dbgu_resources),
804 };
805
806 static inline void configure_dbgu_pins(void)
807 {
808         at91_set_A_periph(AT91_PIN_PA9, 0);             /* DRXD */
809         at91_set_A_periph(AT91_PIN_PA10, 1);            /* DTXD */
810 }
811
812 static struct resource uart0_resources[] = {
813         [0] = {
814                 .start  = AT91SAM9261_BASE_US0,
815                 .end    = AT91SAM9261_BASE_US0 + SZ_16K - 1,
816                 .flags  = IORESOURCE_MEM,
817         },
818         [1] = {
819                 .start  = AT91SAM9261_ID_US0,
820                 .end    = AT91SAM9261_ID_US0,
821                 .flags  = IORESOURCE_IRQ,
822         },
823 };
824
825 static struct atmel_uart_data uart0_data = {
826         .use_dma_tx     = 1,
827         .use_dma_rx     = 1,
828 };
829
830 static u64 uart0_dmamask = DMA_BIT_MASK(32);
831
832 static struct platform_device at91sam9261_uart0_device = {
833         .name           = "atmel_usart",
834         .id             = 1,
835         .dev            = {
836                                 .dma_mask               = &uart0_dmamask,
837                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
838                                 .platform_data          = &uart0_data,
839         },
840         .resource       = uart0_resources,
841         .num_resources  = ARRAY_SIZE(uart0_resources),
842 };
843
844 static inline void configure_usart0_pins(unsigned pins)
845 {
846         at91_set_A_periph(AT91_PIN_PC8, 1);             /* TXD0 */
847         at91_set_A_periph(AT91_PIN_PC9, 0);             /* RXD0 */
848
849         if (pins & ATMEL_UART_RTS)
850                 at91_set_A_periph(AT91_PIN_PC10, 0);    /* RTS0 */
851         if (pins & ATMEL_UART_CTS)
852                 at91_set_A_periph(AT91_PIN_PC11, 0);    /* CTS0 */
853 }
854
855 static struct resource uart1_resources[] = {
856         [0] = {
857                 .start  = AT91SAM9261_BASE_US1,
858                 .end    = AT91SAM9261_BASE_US1 + SZ_16K - 1,
859                 .flags  = IORESOURCE_MEM,
860         },
861         [1] = {
862                 .start  = AT91SAM9261_ID_US1,
863                 .end    = AT91SAM9261_ID_US1,
864                 .flags  = IORESOURCE_IRQ,
865         },
866 };
867
868 static struct atmel_uart_data uart1_data = {
869         .use_dma_tx     = 1,
870         .use_dma_rx     = 1,
871 };
872
873 static u64 uart1_dmamask = DMA_BIT_MASK(32);
874
875 static struct platform_device at91sam9261_uart1_device = {
876         .name           = "atmel_usart",
877         .id             = 2,
878         .dev            = {
879                                 .dma_mask               = &uart1_dmamask,
880                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
881                                 .platform_data          = &uart1_data,
882         },
883         .resource       = uart1_resources,
884         .num_resources  = ARRAY_SIZE(uart1_resources),
885 };
886
887 static inline void configure_usart1_pins(unsigned pins)
888 {
889         at91_set_A_periph(AT91_PIN_PC12, 1);            /* TXD1 */
890         at91_set_A_periph(AT91_PIN_PC13, 0);            /* RXD1 */
891
892         if (pins & ATMEL_UART_RTS)
893                 at91_set_B_periph(AT91_PIN_PA12, 0);    /* RTS1 */
894         if (pins & ATMEL_UART_CTS)
895                 at91_set_B_periph(AT91_PIN_PA13, 0);    /* CTS1 */
896 }
897
898 static struct resource uart2_resources[] = {
899         [0] = {
900                 .start  = AT91SAM9261_BASE_US2,
901                 .end    = AT91SAM9261_BASE_US2 + SZ_16K - 1,
902                 .flags  = IORESOURCE_MEM,
903         },
904         [1] = {
905                 .start  = AT91SAM9261_ID_US2,
906                 .end    = AT91SAM9261_ID_US2,
907                 .flags  = IORESOURCE_IRQ,
908         },
909 };
910
911 static struct atmel_uart_data uart2_data = {
912         .use_dma_tx     = 1,
913         .use_dma_rx     = 1,
914 };
915
916 static u64 uart2_dmamask = DMA_BIT_MASK(32);
917
918 static struct platform_device at91sam9261_uart2_device = {
919         .name           = "atmel_usart",
920         .id             = 3,
921         .dev            = {
922                                 .dma_mask               = &uart2_dmamask,
923                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
924                                 .platform_data          = &uart2_data,
925         },
926         .resource       = uart2_resources,
927         .num_resources  = ARRAY_SIZE(uart2_resources),
928 };
929
930 static inline void configure_usart2_pins(unsigned pins)
931 {
932         at91_set_A_periph(AT91_PIN_PC15, 0);            /* RXD2 */
933         at91_set_A_periph(AT91_PIN_PC14, 1);            /* TXD2 */
934
935         if (pins & ATMEL_UART_RTS)
936                 at91_set_B_periph(AT91_PIN_PA15, 0);    /* RTS2*/
937         if (pins & ATMEL_UART_CTS)
938                 at91_set_B_periph(AT91_PIN_PA16, 0);    /* CTS2 */
939 }
940
941 static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
942 struct platform_device *atmel_default_console_device;   /* the serial console device */
943
944 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
945 {
946         int i;
947
948         /* Fill in list of supported UARTs */
949         for (i = 0; i < config->nr_tty; i++) {
950                 switch (config->tty_map[i]) {
951                         case 0:
952                                 configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
953                                 at91_uarts[i] = &at91sam9261_uart0_device;
954                                 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
955                                 break;
956                         case 1:
957                                 configure_usart1_pins(0);
958                                 at91_uarts[i] = &at91sam9261_uart1_device;
959                                 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
960                                 break;
961                         case 2:
962                                 configure_usart2_pins(0);
963                                 at91_uarts[i] = &at91sam9261_uart2_device;
964                                 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
965                                 break;
966                         case 3:
967                                 configure_dbgu_pins();
968                                 at91_uarts[i] = &at91sam9261_dbgu_device;
969                                 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
970                                 break;
971                         default:
972                                 continue;
973                 }
974                 at91_uarts[i]->id = i;          /* update ID number to mapped ID */
975         }
976
977         /* Set serial console device */
978         if (config->console_tty < ATMEL_MAX_UART)
979                 atmel_default_console_device = at91_uarts[config->console_tty];
980         if (!atmel_default_console_device)
981                 printk(KERN_INFO "AT91: No default serial console defined.\n");
982 }
983
984 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
985 {
986         struct platform_device *pdev;
987
988         switch (id) {
989                 case 0:         /* DBGU */
990                         pdev = &at91sam9261_dbgu_device;
991                         configure_dbgu_pins();
992                         at91_clock_associate("mck", &pdev->dev, "usart");
993                         break;
994                 case AT91SAM9261_ID_US0:
995                         pdev = &at91sam9261_uart0_device;
996                         configure_usart0_pins(pins);
997                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
998                         break;
999                 case AT91SAM9261_ID_US1:
1000                         pdev = &at91sam9261_uart1_device;
1001                         configure_usart1_pins(pins);
1002                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1003                         break;
1004                 case AT91SAM9261_ID_US2:
1005                         pdev = &at91sam9261_uart2_device;
1006                         configure_usart2_pins(pins);
1007                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1008                         break;
1009                 default:
1010                         return;
1011         }
1012         pdev->id = portnr;              /* update to mapped ID */
1013
1014         if (portnr < ATMEL_MAX_UART)
1015                 at91_uarts[portnr] = pdev;
1016 }
1017
1018 void __init at91_set_serial_console(unsigned portnr)
1019 {
1020         if (portnr < ATMEL_MAX_UART)
1021                 atmel_default_console_device = at91_uarts[portnr];
1022         if (!atmel_default_console_device)
1023                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1024 }
1025
1026 void __init at91_add_device_serial(void)
1027 {
1028         int i;
1029
1030         for (i = 0; i < ATMEL_MAX_UART; i++) {
1031                 if (at91_uarts[i])
1032                         platform_device_register(at91_uarts[i]);
1033         }
1034 }
1035 #else
1036 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1037 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1038 void __init at91_set_serial_console(unsigned portnr) {}
1039 void __init at91_add_device_serial(void) {}
1040 #endif
1041
1042
1043 /* -------------------------------------------------------------------- */
1044
1045 /*
1046  * These devices are always present and don't need any board-specific
1047  * setup.
1048  */
1049 static int __init at91_add_standard_devices(void)
1050 {
1051         at91_add_device_rtt();
1052         at91_add_device_watchdog();
1053         return 0;
1054 }
1055
1056 arch_initcall(at91_add_standard_devices);