[ARM] 5473/1: U300 core machine support
[linux-2.6] / arch / arm / mach-u300 / core.c
1 /*
2  *
3  * arch/arm/mach-u300/core.c
4  *
5  *
6  * Copyright (C) 2007-2009 ST-Ericsson AB
7  * License terms: GNU General Public License (GPL) version 2
8  * Core platform support, IRQ handling and device definitions.
9  * Author: Linus Walleij <linus.walleij@stericsson.com>
10  */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/device.h>
17 #include <linux/mm.h>
18 #include <linux/termios.h>
19 #include <linux/amba/bus.h>
20 #include <linux/platform_device.h>
21 #include <linux/gpio.h>
22
23 #include <asm/types.h>
24 #include <asm/setup.h>
25 #include <asm/memory.h>
26 #include <asm/hardware/vic.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/irq.h>
29
30 #include <mach/hardware.h>
31 #include <mach/syscon.h>
32
33 #include "clock.h"
34 #include "mmc.h"
35
36 /*
37  * Static I/O mappings that are needed for booting the U300 platforms. The
38  * only things we need are the areas where we find the timer, syscon and
39  * intcon, since the remaining device drivers will map their own memory
40  * physical to virtual as the need arise.
41  */
42 static struct map_desc u300_io_desc[] __initdata = {
43         {
44                 .virtual        = U300_SLOW_PER_VIRT_BASE,
45                 .pfn            = __phys_to_pfn(U300_SLOW_PER_PHYS_BASE),
46                 .length         = SZ_64K,
47                 .type           = MT_DEVICE,
48         },
49         {
50                 .virtual        = U300_AHB_PER_VIRT_BASE,
51                 .pfn            = __phys_to_pfn(U300_AHB_PER_PHYS_BASE),
52                 .length         = SZ_32K,
53                 .type           = MT_DEVICE,
54         },
55         {
56                 .virtual        = U300_FAST_PER_VIRT_BASE,
57                 .pfn            = __phys_to_pfn(U300_FAST_PER_PHYS_BASE),
58                 .length         = SZ_32K,
59                 .type           = MT_DEVICE,
60         },
61         {
62                 .virtual        = 0xffff2000, /* TCM memory */
63                 .pfn            = __phys_to_pfn(0xffff2000),
64                 .length         = SZ_16K,
65                 .type           = MT_DEVICE,
66         },
67
68         /*
69          * This overlaps with the IRQ vectors etc at 0xffff0000, so these
70          * may have to be moved to 0x00000000 in order to use the ROM.
71          */
72         /*
73         {
74                 .virtual        = U300_BOOTROM_VIRT_BASE,
75                 .pfn            = __phys_to_pfn(U300_BOOTROM_PHYS_BASE),
76                 .length         = SZ_64K,
77                 .type           = MT_ROM,
78         },
79         */
80 };
81
82 void __init u300_map_io(void)
83 {
84         iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
85 }
86
87 /*
88  * Declaration of devices found on the U300 board and
89  * their respective memory locations.
90  */
91 static struct amba_device uart0_device = {
92         .dev = {
93                 .init_name = "uart0", /* Slow device at 0x3000 offset */
94                 .platform_data = NULL,
95         },
96         .res = {
97                 .start = U300_UART0_BASE,
98                 .end   = U300_UART0_BASE + SZ_4K - 1,
99                 .flags = IORESOURCE_MEM,
100         },
101         .irq = { IRQ_U300_UART0, NO_IRQ },
102 };
103
104 /* The U335 have an additional UART1 on the APP CPU */
105 #ifdef CONFIG_MACH_U300_BS335
106 static struct amba_device uart1_device = {
107         .dev = {
108                 .init_name = "uart1", /* Fast device at 0x7000 offset */
109                 .platform_data = NULL,
110         },
111         .res = {
112                 .start = U300_UART1_BASE,
113                 .end   = U300_UART1_BASE + SZ_4K - 1,
114                 .flags = IORESOURCE_MEM,
115         },
116         .irq = { IRQ_U300_UART1, NO_IRQ },
117 };
118 #endif
119
120 static struct amba_device pl172_device = {
121         .dev = {
122                 .init_name = "pl172", /* AHB device at 0x4000 offset */
123                 .platform_data = NULL,
124         },
125         .res = {
126                 .start = U300_EMIF_CFG_BASE,
127                 .end   = U300_EMIF_CFG_BASE + SZ_4K - 1,
128                 .flags = IORESOURCE_MEM,
129         },
130 };
131
132
133 /*
134  * Everything within this next ifdef deals with external devices connected to
135  * the APP SPI bus.
136  */
137 static struct amba_device pl022_device = {
138         .dev = {
139                 .coherent_dma_mask = ~0,
140                 .init_name = "pl022", /* Fast device at 0x6000 offset */
141         },
142         .res = {
143                 .start = U300_SPI_BASE,
144                 .end   = U300_SPI_BASE + SZ_4K - 1,
145                 .flags = IORESOURCE_MEM,
146         },
147         .irq = {IRQ_U300_SPI, NO_IRQ },
148         /*
149          * This device has a DMA channel but the Linux driver does not use
150          * it currently.
151          */
152 };
153
154 static struct amba_device mmcsd_device = {
155         .dev = {
156                 .init_name = "mmci", /* Fast device at 0x1000 offset */
157                 .platform_data = NULL, /* Added later */
158         },
159         .res = {
160                 .start = U300_MMCSD_BASE,
161                 .end   = U300_MMCSD_BASE + SZ_4K - 1,
162                 .flags = IORESOURCE_MEM,
163         },
164         .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 },
165         /*
166          * This device has a DMA channel but the Linux driver does not use
167          * it currently.
168          */
169 };
170
171 /*
172  * The order of device declaration may be important, since some devices
173  * have dependencies on other devices being initialized first.
174  */
175 static struct amba_device *amba_devs[] __initdata = {
176         &uart0_device,
177 #ifdef CONFIG_MACH_U300_BS335
178         &uart1_device,
179 #endif
180         &pl022_device,
181         &pl172_device,
182         &mmcsd_device,
183 };
184
185 /* Here follows a list of all hw resources that the platform devices
186  * allocate. Note, clock dependencies are not included
187  */
188
189 static struct resource gpio_resources[] = {
190         {
191                 .start = U300_GPIO_BASE,
192                 .end   = (U300_GPIO_BASE + SZ_4K - 1),
193                 .flags = IORESOURCE_MEM,
194         },
195         {
196                 .name  = "gpio0",
197                 .start = IRQ_U300_GPIO_PORT0,
198                 .end   = IRQ_U300_GPIO_PORT0,
199                 .flags = IORESOURCE_IRQ,
200         },
201         {
202                 .name  = "gpio1",
203                 .start = IRQ_U300_GPIO_PORT1,
204                 .end   = IRQ_U300_GPIO_PORT1,
205                 .flags = IORESOURCE_IRQ,
206         },
207         {
208                 .name  = "gpio2",
209                 .start = IRQ_U300_GPIO_PORT2,
210                 .end   = IRQ_U300_GPIO_PORT2,
211                 .flags = IORESOURCE_IRQ,
212         },
213 #ifdef U300_COH901571_3
214         {
215                 .name  = "gpio3",
216                 .start = IRQ_U300_GPIO_PORT3,
217                 .end   = IRQ_U300_GPIO_PORT3,
218                 .flags = IORESOURCE_IRQ,
219         },
220         {
221                 .name  = "gpio4",
222                 .start = IRQ_U300_GPIO_PORT4,
223                 .end   = IRQ_U300_GPIO_PORT4,
224                 .flags = IORESOURCE_IRQ,
225         },
226 #ifdef CONFIG_MACH_U300_BS335
227         {
228                 .name  = "gpio5",
229                 .start = IRQ_U300_GPIO_PORT5,
230                 .end   = IRQ_U300_GPIO_PORT5,
231                 .flags = IORESOURCE_IRQ,
232         },
233         {
234                 .name  = "gpio6",
235                 .start = IRQ_U300_GPIO_PORT6,
236                 .end   = IRQ_U300_GPIO_PORT6,
237                 .flags = IORESOURCE_IRQ,
238         },
239 #endif /* CONFIG_MACH_U300_BS335 */
240 #endif /* U300_COH901571_3 */
241 };
242
243 static struct resource keypad_resources[] = {
244         {
245                 .start = U300_KEYPAD_BASE,
246                 .end   = U300_KEYPAD_BASE + SZ_4K - 1,
247                 .flags = IORESOURCE_MEM,
248         },
249         {
250                 .name  = "coh901461-press",
251                 .start = IRQ_U300_KEYPAD_KEYBF,
252                 .end   = IRQ_U300_KEYPAD_KEYBF,
253                 .flags = IORESOURCE_IRQ,
254         },
255         {
256                 .name  = "coh901461-release",
257                 .start = IRQ_U300_KEYPAD_KEYBR,
258                 .end   = IRQ_U300_KEYPAD_KEYBR,
259                 .flags = IORESOURCE_IRQ,
260         },
261 };
262
263 static struct resource rtc_resources[] = {
264         {
265                 .start = U300_RTC_BASE,
266                 .end   = U300_RTC_BASE + SZ_4K - 1,
267                 .flags = IORESOURCE_MEM,
268         },
269         {
270                 .start = IRQ_U300_RTC,
271                 .end   = IRQ_U300_RTC,
272                 .flags = IORESOURCE_IRQ,
273         },
274 };
275
276 /*
277  * Fsmc does have IRQs: #43 and #44 (NFIF and NFIF2)
278  * but these are not yet used by the driver.
279  */
280 static struct resource fsmc_resources[] = {
281         {
282                 .start = U300_NAND_IF_PHYS_BASE,
283                 .end   = U300_NAND_IF_PHYS_BASE + SZ_4K - 1,
284                 .flags = IORESOURCE_MEM,
285         },
286 };
287
288 static struct resource i2c0_resources[] = {
289         {
290                 .start = U300_I2C0_BASE,
291                 .end   = U300_I2C0_BASE + SZ_4K - 1,
292                 .flags = IORESOURCE_MEM,
293         },
294         {
295                 .start = IRQ_U300_I2C0,
296                 .end   = IRQ_U300_I2C0,
297                 .flags = IORESOURCE_IRQ,
298         },
299 };
300
301 static struct resource i2c1_resources[] = {
302         {
303                 .start = U300_I2C1_BASE,
304                 .end   = U300_I2C1_BASE + SZ_4K - 1,
305                 .flags = IORESOURCE_MEM,
306         },
307         {
308                 .start = IRQ_U300_I2C1,
309                 .end   = IRQ_U300_I2C1,
310                 .flags = IORESOURCE_IRQ,
311         },
312
313 };
314
315 static struct resource wdog_resources[] = {
316         {
317                 .start = U300_WDOG_BASE,
318                 .end   = U300_WDOG_BASE + SZ_4K - 1,
319                 .flags = IORESOURCE_MEM,
320         },
321         {
322                 .start = IRQ_U300_WDOG,
323                 .end   = IRQ_U300_WDOG,
324                 .flags = IORESOURCE_IRQ,
325         }
326 };
327
328 /* TODO: These should be protected by suitable #ifdef's */
329 static struct resource ave_resources[] = {
330         {
331                 .name  = "AVE3e I/O Area",
332                 .start = U300_VIDEOENC_BASE,
333                 .end   = U300_VIDEOENC_BASE + SZ_512K - 1,
334                 .flags = IORESOURCE_MEM,
335         },
336         {
337                 .name  = "AVE3e IRQ0",
338                 .start = IRQ_U300_VIDEO_ENC_0,
339                 .end   = IRQ_U300_VIDEO_ENC_0,
340                 .flags = IORESOURCE_IRQ,
341         },
342         {
343                 .name  = "AVE3e IRQ1",
344                 .start = IRQ_U300_VIDEO_ENC_1,
345                 .end   = IRQ_U300_VIDEO_ENC_1,
346                 .flags = IORESOURCE_IRQ,
347         },
348         {
349                 .name  = "AVE3e Physmem Area",
350                 .start = 0, /* 0 will be remapped to reserved memory */
351                 .end   = SZ_1M - 1,
352                 .flags = IORESOURCE_MEM,
353         },
354         /*
355          * The AVE3e requires two regions of 256MB that it considers
356          * "invisible". The hardware will not be able to access these
357          * adresses, so they should never point to system RAM.
358          */
359         {
360                 .name  = "AVE3e Reserved 0",
361                 .start = 0xd0000000,
362                 .end   = 0xd0000000 + SZ_256M - 1,
363                 .flags = IORESOURCE_MEM,
364         },
365         {
366                 .name  = "AVE3e Reserved 1",
367                 .start = 0xe0000000,
368                 .end   = 0xe0000000 + SZ_256M - 1,
369                 .flags = IORESOURCE_MEM,
370         },
371 };
372
373 static struct platform_device wdog_device = {
374         .name = "wdog",
375         .id = -1,
376         .num_resources = ARRAY_SIZE(wdog_resources),
377         .resource = wdog_resources,
378 };
379
380 static struct platform_device i2c0_device = {
381         .name = "stddci2c",
382         .id = 0,
383         .num_resources = ARRAY_SIZE(i2c0_resources),
384         .resource = i2c0_resources,
385 };
386
387 static struct platform_device i2c1_device = {
388         .name = "stddci2c",
389         .id = 1,
390         .num_resources = ARRAY_SIZE(i2c1_resources),
391         .resource = i2c1_resources,
392 };
393
394 static struct platform_device gpio_device = {
395         .name = "u300-gpio",
396         .id = -1,
397         .num_resources = ARRAY_SIZE(gpio_resources),
398         .resource = gpio_resources,
399 };
400
401 static struct platform_device keypad_device = {
402         .name = "keypad",
403         .id = -1,
404         .num_resources = ARRAY_SIZE(keypad_resources),
405         .resource = keypad_resources,
406 };
407
408 static struct platform_device rtc_device = {
409         .name = "rtc0",
410         .id = -1,
411         .num_resources = ARRAY_SIZE(rtc_resources),
412         .resource = rtc_resources,
413 };
414
415 static struct platform_device fsmc_device = {
416         .name = "nandif",
417         .id = -1,
418         .num_resources = ARRAY_SIZE(fsmc_resources),
419         .resource = fsmc_resources,
420 };
421
422 static struct platform_device ave_device = {
423         .name = "video_enc",
424         .id = -1,
425         .num_resources = ARRAY_SIZE(ave_resources),
426         .resource = ave_resources,
427 };
428
429 /*
430  * Notice that AMBA devices are initialized before platform devices.
431  *
432  */
433 static struct platform_device *platform_devs[] __initdata = {
434         &i2c0_device,
435         &i2c1_device,
436         &keypad_device,
437         &rtc_device,
438         &gpio_device,
439         &fsmc_device,
440         &wdog_device,
441         &ave_device
442 };
443
444
445 /*
446  * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected
447  * together so some interrupts are connected to the first one and some
448  * to the second one.
449  */
450 void __init u300_init_irq(void)
451 {
452         u32 mask[2] = {0, 0};
453         int i;
454
455         for (i = 0; i < NR_IRQS; i++)
456                 set_bit(i, (unsigned long *) &mask[0]);
457         u300_enable_intcon_clock();
458         vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0]);
459         vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1]);
460 }
461
462
463 /*
464  * U300 platforms peripheral handling
465  */
466 struct db_chip {
467         u16 chipid;
468         const char *name;
469 };
470
471 /*
472  * This is a list of the Digital Baseband chips used in the U300 platform.
473  */
474 static struct db_chip db_chips[] __initdata = {
475         {
476                 .chipid = 0xb800,
477                 .name = "DB3000",
478         },
479         {
480                 .chipid = 0xc000,
481                 .name = "DB3100",
482         },
483         {
484                 .chipid = 0xc800,
485                 .name = "DB3150",
486         },
487         {
488                 .chipid = 0xd800,
489                 .name = "DB3200",
490         },
491         {
492                 .chipid = 0xe000,
493                 .name = "DB3250",
494         },
495         {
496                 .chipid = 0xe800,
497                 .name = "DB3210",
498         },
499         {
500                 .chipid = 0xf000,
501                 .name = "DB3350 P1x",
502         },
503         {
504                 .chipid = 0xf100,
505                 .name = "DB3350 P2x",
506         },
507         {
508                 .chipid = 0x0000, /* List terminator */
509                 .name = NULL,
510         }
511 };
512
513 static void u300_init_check_chip(void)
514 {
515
516         u16 val;
517         struct db_chip *chip;
518         const char *chipname;
519         const char unknown[] = "UNKNOWN";
520
521         /* Read out and print chip ID */
522         val = readw(U300_SYSCON_VBASE + U300_SYSCON_CIDR);
523         /* This is in funky bigendian order... */
524         val = (val & 0xFFU) << 8 | (val >> 8);
525         chip = db_chips;
526         chipname = unknown;
527
528         for ( ; chip->chipid; chip++) {
529                 if (chip->chipid == (val & 0xFF00U)) {
530                         chipname = chip->name;
531                         break;
532                 }
533         }
534         printk(KERN_INFO "Initializing U300 system on %s baseband chip " \
535                "(chip ID 0x%04x)\n", chipname, val);
536
537 #ifdef CONFIG_MACH_U300_BS26
538         if ((val & 0xFF00U) != 0xc800) {
539                 printk(KERN_ERR "Platform configured for BS25/BS26 " \
540                        "with DB3150 but %s detected, expect problems!",
541                        chipname);
542         }
543 #endif
544 #ifdef CONFIG_MACH_U300_BS330
545         if ((val & 0xFF00U) != 0xd800) {
546                 printk(KERN_ERR "Platform configured for BS330 " \
547                        "with DB3200 but %s detected, expect problems!",
548                        chipname);
549         }
550 #endif
551 #ifdef CONFIG_MACH_U300_BS335
552         if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) {
553                 printk(KERN_ERR "Platform configured for BS365 " \
554                        " with DB3350 but %s detected, expect problems!",
555                        chipname);
556         }
557 #endif
558 #ifdef CONFIG_MACH_U300_BS365
559         if ((val & 0xFF00U) != 0xe800) {
560                 printk(KERN_ERR "Platform configured for BS365 " \
561                        "with DB3210 but %s detected, expect problems!",
562                        chipname);
563         }
564 #endif
565
566
567 }
568
569 /*
570  * Some devices and their resources require reserved physical memory from
571  * the end of the available RAM. This function traverses the list of devices
572  * and assigns actual adresses to these.
573  */
574 static void __init u300_assign_physmem(void)
575 {
576         unsigned long curr_start = __pa(high_memory);
577         int i, j;
578
579         for (i = 0; i < ARRAY_SIZE(platform_devs); i++) {
580                 for (j = 0; j < platform_devs[i]->num_resources; j++) {
581                         struct resource *const res =
582                           &platform_devs[i]->resource[j];
583
584                         if (IORESOURCE_MEM == res->flags &&
585                                      0 == res->start) {
586                                 res->start  = curr_start;
587                                 res->end   += curr_start;
588                                 curr_start += (res->end - res->start + 1);
589
590                                 printk(KERN_INFO "core.c: Mapping RAM " \
591                                        "%#x-%#x to device %s:%s\n",
592                                         res->start, res->end,
593                                        platform_devs[i]->name, res->name);
594                         }
595                 }
596         }
597 }
598
599 void __init u300_init_devices(void)
600 {
601         int i;
602         u16 val;
603
604         /* Check what platform we run and print some status information */
605         u300_init_check_chip();
606
607         /* Set system to run at PLL208, max performance, a known state. */
608         val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
609         val &= ~U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK;
610         writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
611         /* Wait for the PLL208 to lock if not locked in yet */
612         while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
613                  U300_SYSCON_CSR_PLL208_LOCK_IND));
614
615         /* Register the AMBA devices in the AMBA bus abstraction layer */
616         u300_clock_primecells();
617         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
618                 struct amba_device *d = amba_devs[i];
619                 amba_device_register(d, &iomem_resource);
620         }
621         u300_unclock_primecells();
622
623         u300_assign_physmem();
624
625         /* Register the platform devices */
626         platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
627
628 #ifndef CONFIG_MACH_U300_SEMI_IS_SHARED
629         /*
630          * Enable SEMI self refresh. Self-refresh of the SDRAM is entered when
631          * both subsystems are requesting this mode.
632          * If we not share the Acc SDRAM, this is never the case. Therefore
633          * enable it here from the App side.
634          */
635         val = readw(U300_SYSCON_VBASE + U300_SYSCON_SMCR) |
636                 U300_SYSCON_SMCR_SEMI_SREFREQ_ENABLE;
637         writew(val, U300_SYSCON_VBASE + U300_SYSCON_SMCR);
638 #endif /* CONFIG_MACH_U300_SEMI_IS_SHARED */
639 }
640
641 static int core_module_init(void)
642 {
643         /*
644          * This needs to be initialized later: it needs the input framework
645          * to be initialized first.
646          */
647         return mmc_init(&mmcsd_device);
648 }
649 module_init(core_module_init);