2 * Copyright (C) 2003 - 2006 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
30 * Source file for NIC routines to initialize the Phantom Hardware
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_phan_reg.h"
40 struct crb_addr_pair {
45 #define NETXEN_MAX_CRB_XFORM 60
46 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
47 #define NETXEN_ADDR_ERROR (0xffffffff)
49 #define crb_addr_transform(name) \
50 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
51 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
53 #define NETXEN_NIC_XDMA_RESET 0x8000ff
56 netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
57 unsigned long off, int *data)
59 void __iomem *addr = pci_base_offset(adapter, off);
63 static void crb_addr_transform_setup(void)
65 crb_addr_transform(XDMA);
66 crb_addr_transform(TIMR);
67 crb_addr_transform(SRE);
68 crb_addr_transform(SQN3);
69 crb_addr_transform(SQN2);
70 crb_addr_transform(SQN1);
71 crb_addr_transform(SQN0);
72 crb_addr_transform(SQS3);
73 crb_addr_transform(SQS2);
74 crb_addr_transform(SQS1);
75 crb_addr_transform(SQS0);
76 crb_addr_transform(RPMX7);
77 crb_addr_transform(RPMX6);
78 crb_addr_transform(RPMX5);
79 crb_addr_transform(RPMX4);
80 crb_addr_transform(RPMX3);
81 crb_addr_transform(RPMX2);
82 crb_addr_transform(RPMX1);
83 crb_addr_transform(RPMX0);
84 crb_addr_transform(ROMUSB);
85 crb_addr_transform(SN);
86 crb_addr_transform(QMN);
87 crb_addr_transform(QMS);
88 crb_addr_transform(PGNI);
89 crb_addr_transform(PGND);
90 crb_addr_transform(PGN3);
91 crb_addr_transform(PGN2);
92 crb_addr_transform(PGN1);
93 crb_addr_transform(PGN0);
94 crb_addr_transform(PGSI);
95 crb_addr_transform(PGSD);
96 crb_addr_transform(PGS3);
97 crb_addr_transform(PGS2);
98 crb_addr_transform(PGS1);
99 crb_addr_transform(PGS0);
100 crb_addr_transform(PS);
101 crb_addr_transform(PH);
102 crb_addr_transform(NIU);
103 crb_addr_transform(I2Q);
104 crb_addr_transform(EG);
105 crb_addr_transform(MN);
106 crb_addr_transform(MS);
107 crb_addr_transform(CAS2);
108 crb_addr_transform(CAS1);
109 crb_addr_transform(CAS0);
110 crb_addr_transform(CAM);
111 crb_addr_transform(C2C1);
112 crb_addr_transform(C2C0);
113 crb_addr_transform(SMB);
116 int netxen_init_firmware(struct netxen_adapter *adapter)
118 u32 state = 0, loops = 0, err = 0;
121 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
123 if (state == PHAN_INITIALIZE_ACK)
126 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
129 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
134 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
140 writel(MPORT_SINGLE_FUNCTION_MODE,
141 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
142 writel(PHAN_INITIALIZE_ACK,
143 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
148 #define NETXEN_ADDR_LIMIT 0xffffffffULL
150 void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
151 struct pci_dev **used_dev)
155 addr = pci_alloc_consistent(pdev, sz, ptr);
156 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
160 pci_free_consistent(pdev, sz, addr, *ptr);
161 addr = pci_alloc_consistent(NULL, sz, ptr);
166 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
171 struct netxen_rcv_desc_ctx *rcv_desc;
173 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
174 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
175 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
176 struct netxen_rx_buffer *rx_buf;
177 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
178 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
179 rcv_desc->begin_alloc = 0;
180 rx_buf = rcv_desc->rx_buf_arr;
181 num_rx_bufs = rcv_desc->max_rx_desc_count;
183 * Now go through all of them, set reference handles
184 * and put them in the queues.
186 for (i = 0; i < num_rx_bufs; i++) {
187 rx_buf->ref_handle = i;
188 rx_buf->state = NETXEN_BUFFER_FREE;
189 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
190 "%p\n", ctxid, i, rx_buf);
197 void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
200 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
202 if (netxen_nic_get_board_info(adapter) != 0)
203 printk("%s: Error getting board config info.\n",
204 netxen_nic_driver_name);
205 get_brd_port_by_type(board_info->board_type, &ports);
207 printk(KERN_ERR "%s: Unknown board type\n",
208 netxen_nic_driver_name);
209 adapter->ahw.max_ports = ports;
212 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
214 switch (adapter->ahw.board_type) {
216 adapter->enable_phy_interrupts =
217 netxen_niu_gbe_enable_phy_interrupts;
218 adapter->disable_phy_interrupts =
219 netxen_niu_gbe_disable_phy_interrupts;
220 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
221 adapter->macaddr_set = netxen_niu_macaddr_set;
222 adapter->set_mtu = netxen_nic_set_mtu_gb;
223 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
224 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
225 adapter->phy_read = netxen_niu_gbe_phy_read;
226 adapter->phy_write = netxen_niu_gbe_phy_write;
227 adapter->init_port = netxen_niu_gbe_init_port;
228 adapter->init_niu = netxen_nic_init_niu_gb;
229 adapter->stop_port = netxen_niu_disable_gbe_port;
232 case NETXEN_NIC_XGBE:
233 adapter->enable_phy_interrupts =
234 netxen_niu_xgbe_enable_phy_interrupts;
235 adapter->disable_phy_interrupts =
236 netxen_niu_xgbe_disable_phy_interrupts;
237 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
238 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
239 adapter->set_mtu = netxen_nic_set_mtu_xgb;
240 adapter->init_port = netxen_niu_xg_init_port;
241 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
242 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
243 adapter->stop_port = netxen_niu_disable_xg_port;
252 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
253 * address to external PCI CRB address.
255 u32 netxen_decode_crb_addr(u32 addr)
258 u32 base_addr, offset, pci_base;
260 crb_addr_transform_setup();
262 pci_base = NETXEN_ADDR_ERROR;
263 base_addr = addr & 0xfff00000;
264 offset = addr & 0x000fffff;
266 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
267 if (crb_addr_xform[i] == base_addr) {
272 if (pci_base == NETXEN_ADDR_ERROR)
275 return (pci_base + offset);
278 static long rom_max_timeout = 10000;
279 static long rom_lock_timeout = 1000000;
280 static long rom_write_timeout = 700;
282 static inline int rom_lock(struct netxen_adapter *adapter)
289 /* acquire semaphore2 from PCI HW block */
290 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
294 if (timeout >= rom_lock_timeout)
304 for (iter = 0; iter < 20; iter++)
305 cpu_relax(); /*This a nop instr on i386 */
308 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
312 int netxen_wait_rom_done(struct netxen_adapter *adapter)
318 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
321 if (timeout >= rom_max_timeout) {
322 printk("Timeout reached waiting for rom done");
329 static inline int netxen_rom_wren(struct netxen_adapter *adapter)
331 /* Set write enable latch in ROM status register */
332 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
333 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
335 if (netxen_wait_rom_done(adapter)) {
341 static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
344 unsigned int data = 0xdeaddead;
345 data = netxen_nic_reg_read(adapter, addr);
349 static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
351 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
353 if (netxen_wait_rom_done(adapter)) {
356 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
359 static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
363 /* release semaphore2 */
364 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
368 int netxen_rom_wip_poll(struct netxen_adapter *adapter)
373 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
375 val = netxen_do_rom_rdsr(adapter);
378 if (timeout > rom_max_timeout) {
385 static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
388 if (netxen_rom_wren(adapter)) {
391 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
392 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
393 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
394 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
396 if (netxen_wait_rom_done(adapter)) {
397 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
401 return netxen_rom_wip_poll(adapter);
405 do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
407 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
408 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
409 udelay(70); /* prevent bursting on CRB */
410 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
411 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
412 if (netxen_wait_rom_done(adapter)) {
413 printk("Error waiting for rom done\n");
416 /* reset abyte_cnt and dummy_byte_cnt */
417 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
418 udelay(70); /* prevent bursting on CRB */
419 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
421 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
426 do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
427 u8 *bytes, size_t size)
432 for (addridx = addr; addridx < (addr + size); addridx += 4) {
433 ret = do_rom_fast_read(adapter, addridx, (int *)bytes);
443 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
444 u8 *bytes, size_t size)
448 ret = rom_lock(adapter);
452 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
454 netxen_rom_unlock(adapter);
458 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
462 if (rom_lock(adapter) != 0)
465 ret = do_rom_fast_read(adapter, addr, valp);
466 netxen_rom_unlock(adapter);
470 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
474 if (rom_lock(adapter) != 0) {
477 ret = do_rom_fast_write(adapter, addr, data);
478 netxen_rom_unlock(adapter);
482 static inline int do_rom_fast_write_words(struct netxen_adapter *adapter,
483 int addr, u8 *bytes, size_t size)
488 while (addridx < (addr + size)) {
489 int last_attempt = 0;
495 ret = do_rom_fast_write(adapter, addridx, data);
502 ret = do_rom_fast_read(adapter, addridx, &data1);
509 if (timeout++ >= rom_write_timeout) {
510 if (last_attempt++ < 4) {
511 ret = do_rom_fast_write(adapter,
517 printk(KERN_INFO "Data write did not "
518 "succeed at address 0x%x\n", addridx);
531 int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
532 u8 *bytes, size_t size)
536 ret = rom_lock(adapter);
540 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
541 netxen_rom_unlock(adapter);
546 int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
550 ret = netxen_rom_wren(adapter);
554 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
555 netxen_crb_writelit_adapter(adapter,
556 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
558 ret = netxen_wait_rom_done(adapter);
562 return netxen_rom_wip_poll(adapter);
565 int netxen_rom_rdsr(struct netxen_adapter *adapter)
569 ret = rom_lock(adapter);
573 ret = netxen_do_rom_rdsr(adapter);
574 netxen_rom_unlock(adapter);
578 int netxen_backup_crbinit(struct netxen_adapter *adapter)
580 int ret = FLASH_SUCCESS;
582 char *buffer = kmalloc(FLASH_SECTOR_SIZE, GFP_KERNEL);
586 /* unlock sector 63 */
587 val = netxen_rom_rdsr(adapter);
589 ret = netxen_rom_wrsr(adapter, val);
590 if (ret != FLASH_SUCCESS)
593 ret = netxen_rom_wip_poll(adapter);
594 if (ret != FLASH_SUCCESS)
597 /* copy sector 0 to sector 63 */
598 ret = netxen_rom_fast_read_words(adapter, CRBINIT_START,
599 buffer, FLASH_SECTOR_SIZE);
600 if (ret != FLASH_SUCCESS)
603 ret = netxen_rom_fast_write_words(adapter, FIXED_START,
604 buffer, FLASH_SECTOR_SIZE);
605 if (ret != FLASH_SUCCESS)
609 val = netxen_rom_rdsr(adapter);
613 if (netxen_rom_wrsr(adapter, val) == 0) {
614 ret = netxen_rom_wip_poll(adapter);
615 if (ret != FLASH_SUCCESS)
619 ret = netxen_rom_wip_poll(adapter);
620 if (ret != FLASH_SUCCESS)
630 int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
632 netxen_rom_wren(adapter);
633 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
634 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
635 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
637 if (netxen_wait_rom_done(adapter)) {
638 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
641 return netxen_rom_wip_poll(adapter);
644 void check_erased_flash(struct netxen_adapter *adapter, int addr)
648 int count = 0, erased_errors = 0;
651 range = (addr == USER_START) ? FIXED_START : addr + FLASH_SECTOR_SIZE;
653 for (i = addr; i < range; i += 4) {
654 netxen_rom_fast_read(adapter, i, &val);
655 if (val != 0xffffffff)
661 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
662 "for sector address: %x\n", erased_errors, count, addr);
665 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
668 if (rom_lock(adapter) != 0) {
671 ret = netxen_do_rom_se(adapter, addr);
672 netxen_rom_unlock(adapter);
674 check_erased_flash(adapter, addr);
680 netxen_flash_erase_sections(struct netxen_adapter *adapter, int start, int end)
682 int ret = FLASH_SUCCESS;
685 for (i = start; i < end; i++) {
686 ret = netxen_rom_se(adapter, i * FLASH_SECTOR_SIZE);
689 ret = netxen_rom_wip_poll(adapter);
698 netxen_flash_erase_secondary(struct netxen_adapter *adapter)
700 int ret = FLASH_SUCCESS;
703 start = SECONDARY_START / FLASH_SECTOR_SIZE;
704 end = USER_START / FLASH_SECTOR_SIZE;
705 ret = netxen_flash_erase_sections(adapter, start, end);
711 netxen_flash_erase_primary(struct netxen_adapter *adapter)
713 int ret = FLASH_SUCCESS;
716 start = PRIMARY_START / FLASH_SECTOR_SIZE;
717 end = SECONDARY_START / FLASH_SECTOR_SIZE;
718 ret = netxen_flash_erase_sections(adapter, start, end);
723 void netxen_halt_pegs(struct netxen_adapter *adapter)
725 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
726 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
727 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
728 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
731 int netxen_flash_unlock(struct netxen_adapter *adapter)
735 ret = netxen_rom_wrsr(adapter, 0);
739 ret = netxen_rom_wren(adapter);
746 #define NETXEN_BOARDTYPE 0x4008
747 #define NETXEN_BOARDNUM 0x400c
748 #define NETXEN_CHIPNUM 0x4010
749 #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
750 #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
751 #define NETXEN_ROM_FOUND_INIT 0x400
753 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
755 int addr, val, status;
758 struct crb_addr_pair *buf;
762 status = netxen_nic_get_board_info(adapter);
764 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
765 netxen_nic_driver_name);
767 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
768 NETXEN_ROMBUS_RESET);
772 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
773 printk("P2 ROM board type: 0x%08x\n", val);
775 printk("Could not read board type\n");
776 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
777 printk("P2 ROM board num: 0x%08x\n", val);
779 printk("Could not read board number\n");
780 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
781 printk("P2 ROM chip num: 0x%08x\n", val);
783 printk("Could not read chip number\n");
786 if (netxen_rom_fast_read(adapter, 0, &n) == 0
787 && (n & NETXEN_ROM_FIRST_BARRIER)) {
788 n &= ~NETXEN_ROM_ROUNDUP;
789 if (n < NETXEN_ROM_FOUND_INIT) {
791 printk("%s: %d CRB init values found"
792 " in ROM.\n", netxen_nic_driver_name, n);
794 printk("%s:n=0x%x Error! NetXen card flash not"
795 " initialized.\n", __FUNCTION__, n);
798 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
800 printk("%s: netxen_pinit_from_rom: Unable to calloc "
801 "memory.\n", netxen_nic_driver_name);
804 for (i = 0; i < n; i++) {
805 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
806 || netxen_rom_fast_read(adapter, 8 * i + 8,
814 printk("%s: PCI: 0x%08x == 0x%08x\n",
815 netxen_nic_driver_name, (unsigned int)
816 netxen_decode_crb_addr(addr), val);
818 for (i = 0; i < n; i++) {
820 off = netxen_decode_crb_addr(buf[i].addr);
821 if (off == NETXEN_ADDR_ERROR) {
822 printk(KERN_ERR"CRB init value out of range %x\n",
826 off += NETXEN_PCI_CRBSPACE;
827 /* skipping cold reboot MAGIC */
828 if (off == NETXEN_CAM_RAM(0x1fc))
831 /* After writing this register, HW needs time for CRB */
832 /* to quiet down (else crb_window returns 0xffffffff) */
833 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
835 /* hold xdma in reset also */
836 buf[i].data = NETXEN_NIC_XDMA_RESET;
839 if (ADDR_IN_WINDOW1(off)) {
841 NETXEN_CRB_NORMALIZE(adapter, off));
843 netxen_nic_pci_change_crbwindow(adapter, 0);
845 pci_base_offset(adapter, off));
847 netxen_nic_pci_change_crbwindow(adapter, 1);
849 if (init_delay == 1) {
857 /* disable_peg_cache_all */
859 /* unreset_net_cache */
860 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
862 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
864 /* p2dn replyCount */
865 netxen_crb_writelit_adapter(adapter,
866 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
867 /* disable_peg_cache 0 */
868 netxen_crb_writelit_adapter(adapter,
869 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
870 /* disable_peg_cache 1 */
871 netxen_crb_writelit_adapter(adapter,
872 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
877 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
879 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
882 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
884 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
887 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
889 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
892 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
894 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
900 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
906 adapter->dummy_dma.addr =
907 pci_alloc_consistent(adapter->ahw.pdev,
908 NETXEN_HOST_DUMMY_DMA_SIZE,
909 &adapter->dummy_dma.phys_addr);
910 if (adapter->dummy_dma.addr == NULL) {
911 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
916 addr = (uint64_t) adapter->dummy_dma.phys_addr;
917 hi = (addr >> 32) & 0xffffffff;
918 lo = addr & 0xffffffff;
920 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
921 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
926 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
928 if (adapter->dummy_dma.addr) {
929 writel(0, NETXEN_CRB_NORMALIZE(adapter,
930 CRB_HOST_DUMMY_BUF_ADDR_HI));
931 writel(0, NETXEN_CRB_NORMALIZE(adapter,
932 CRB_HOST_DUMMY_BUF_ADDR_LO));
933 pci_free_consistent(adapter->ahw.pdev,
934 NETXEN_HOST_DUMMY_DMA_SIZE,
935 adapter->dummy_dma.addr,
936 adapter->dummy_dma.phys_addr);
937 adapter->dummy_dma.addr = NULL;
941 void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
947 val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
948 while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) {
952 readl(NETXEN_CRB_NORMALIZE
953 (adapter, CRB_CMDPEG_STATE));
956 if (val != PHAN_INITIALIZE_COMPLETE)
957 printk("WARNING: Initial boot wait loop failed...\n");
961 int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
965 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
966 struct netxen_recv_context *recv_ctx =
967 &(adapter->recv_ctx[ctx]);
969 struct status_desc *desc_head;
970 struct status_desc *desc;
972 consumer = recv_ctx->status_rx_consumer;
973 desc_head = recv_ctx->rcv_status_desc_head;
974 desc = &desc_head[consumer];
976 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
983 static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
986 struct netxen_port *port;
987 struct net_device *netdev;
988 uint32_t temp, temp_state, temp_val;
991 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
993 temp_state = nx_get_temp_state(temp);
994 temp_val = nx_get_temp_val(temp);
996 if (temp_state == NX_TEMP_PANIC) {
998 "%s: Device temperature %d degrees C exceeds"
999 " maximum allowed. Hardware has been shut down.\n",
1000 netxen_nic_driver_name, temp_val);
1001 for (port_num = 0; port_num < adapter->ahw.max_ports;
1003 port = adapter->port[port_num];
1004 netdev = port->netdev;
1006 netif_carrier_off(netdev);
1007 netif_stop_queue(netdev);
1010 } else if (temp_state == NX_TEMP_WARN) {
1011 if (adapter->temp == NX_TEMP_NORMAL) {
1013 "%s: Device temperature %d degrees C "
1014 "exceeds operating range."
1015 " Immediate action needed.\n",
1016 netxen_nic_driver_name, temp_val);
1019 if (adapter->temp == NX_TEMP_WARN) {
1021 "%s: Device temperature is now %d degrees C"
1022 " in normal range.\n", netxen_nic_driver_name,
1026 adapter->temp = temp_state;
1030 void netxen_watchdog_task(struct work_struct *work)
1033 struct netxen_port *port;
1034 struct net_device *netdev;
1035 struct netxen_adapter *adapter =
1036 container_of(work, struct netxen_adapter, watchdog_task);
1038 if (netxen_nic_check_temp(adapter))
1041 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
1042 port = adapter->port[port_num];
1043 netdev = port->netdev;
1045 if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
1046 printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
1047 netxen_nic_driver_name, port_num, netdev->name);
1048 netif_carrier_on(netdev);
1051 if (netif_queue_stopped(netdev))
1052 netif_wake_queue(netdev);
1055 if (adapter->handle_phy_intr)
1056 adapter->handle_phy_intr(adapter);
1057 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1061 * netxen_process_rcv() send the received packet to the protocol stack.
1062 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1063 * invoke the routine to send more rx buffers to the Phantom...
1066 netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1067 struct status_desc *desc)
1069 struct netxen_port *port = adapter->port[netxen_get_sts_port(desc)];
1070 struct pci_dev *pdev = port->pdev;
1071 struct net_device *netdev = port->netdev;
1072 int index = netxen_get_sts_refhandle(desc);
1073 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1074 struct netxen_rx_buffer *buffer;
1075 struct sk_buff *skb;
1076 u32 length = netxen_get_sts_totallength(desc);
1078 struct netxen_rcv_desc_ctx *rcv_desc;
1081 desc_ctx = netxen_get_sts_type(desc);
1082 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1083 printk("%s: %s Bad Rcv descriptor ring\n",
1084 netxen_nic_driver_name, netdev->name);
1088 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
1089 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1090 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1091 index, rcv_desc->max_rx_desc_count);
1094 buffer = &rcv_desc->rx_buf_arr[index];
1095 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1096 buffer->lro_current_frags++;
1097 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1098 buffer->lro_expected_frags =
1099 netxen_get_sts_desc_lro_cnt(desc);
1100 buffer->lro_length = length;
1102 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1103 if (buffer->lro_expected_frags != 0) {
1104 printk("LRO: (refhandle:%x) recv frag."
1105 "wait for last. flags: %x expected:%d"
1107 netxen_get_sts_desc_lro_last_frag(desc),
1108 buffer->lro_expected_frags,
1109 buffer->lro_current_frags);
1115 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1116 PCI_DMA_FROMDEVICE);
1118 skb = (struct sk_buff *)buffer->skb;
1120 if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
1121 port->stats.csummed++;
1122 skb->ip_summed = CHECKSUM_UNNECESSARY;
1125 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1126 /* True length was only available on the last pkt */
1127 skb_put(skb, buffer->lro_length);
1129 skb_put(skb, length);
1132 skb->protocol = eth_type_trans(skb, netdev);
1134 ret = netif_receive_skb(skb);
1137 * RH: Do we need these stats on a regular basis. Can we get it from
1141 case NET_RX_SUCCESS:
1142 port->stats.uphappy++;
1146 port->stats.uplcong++;
1150 port->stats.upmcong++;
1153 case NET_RX_CN_HIGH:
1154 port->stats.uphcong++;
1158 port->stats.updropped++;
1162 port->stats.updunno++;
1166 netdev->last_rx = jiffies;
1168 rcv_desc->rcv_free++;
1169 rcv_desc->rcv_pending--;
1172 * We just consumed one buffer so post a buffer.
1174 adapter->stats.post_called++;
1176 buffer->state = NETXEN_BUFFER_FREE;
1177 buffer->lro_current_frags = 0;
1178 buffer->lro_expected_frags = 0;
1180 port->stats.no_rcv++;
1181 port->stats.rxbytes += length;
1184 /* Process Receive status ring */
1185 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1187 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1188 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1189 struct status_desc *desc; /* used to read status desc here */
1190 u32 consumer = recv_ctx->status_rx_consumer;
1192 int count = 0, ring;
1194 DPRINTK(INFO, "procesing receive\n");
1196 * we assume in this case that there is only one port and that is
1197 * port #1...changes need to be done in firmware to indicate port
1198 * number as part of the descriptor. This way we will be able to get
1199 * the netdev which is associated with that device.
1201 while (count < max) {
1202 desc = &desc_head[consumer];
1203 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
1204 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1205 netxen_get_sts_owner(desc));
1208 netxen_process_rcv(adapter, ctxid, desc);
1209 netxen_clear_sts_owner(desc);
1210 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
1211 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1215 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
1216 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
1220 /* update the consumer index in phantom */
1222 adapter->stats.process_rcv++;
1223 recv_ctx->status_rx_consumer = consumer;
1224 recv_ctx->status_rx_producer = producer;
1228 NETXEN_CRB_NORMALIZE(adapter,
1229 recv_crb_registers[ctxid].
1230 crb_rcv_status_consumer));
1236 /* Process Command status ring */
1237 int netxen_process_cmd_ring(unsigned long data)
1241 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
1244 struct netxen_cmd_buffer *buffer;
1245 struct netxen_port *port; /* port #1 */
1246 struct netxen_port *nport;
1247 struct pci_dev *pdev;
1248 struct netxen_skb_frag *frag;
1250 struct sk_buff *skb = NULL;
1254 spin_lock(&adapter->tx_lock);
1255 last_consumer = adapter->last_cmd_consumer;
1256 DPRINTK(INFO, "procesing xmit complete\n");
1257 /* we assume in this case that there is only one port and that is
1258 * port #1...changes need to be done in firmware to indicate port
1259 * number as part of the descriptor. This way we will be able to get
1260 * the netdev which is associated with that device.
1263 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1264 if (last_consumer == consumer) { /* Ring is empty */
1265 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
1266 last_consumer, consumer);
1267 spin_unlock(&adapter->tx_lock);
1271 adapter->proc_cmd_buf_counter++;
1272 adapter->stats.process_xmit++;
1274 * Not needed - does not seem to be used anywhere.
1275 * adapter->cmd_consumer = consumer;
1277 spin_unlock(&adapter->tx_lock);
1279 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
1280 buffer = &adapter->cmd_buf_arr[last_consumer];
1281 port = adapter->port[buffer->port];
1283 frag = &buffer->frag_array[0];
1285 if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
1286 pci_unmap_single(pdev, frag->dma, frag->length,
1288 for (i = 1; i < buffer->frag_count; i++) {
1289 DPRINTK(INFO, "getting fragment no %d\n", i);
1290 frag++; /* Get the next frag */
1291 pci_unmap_page(pdev, frag->dma, frag->length,
1295 port->stats.skbfreed++;
1296 dev_kfree_skb_any(skb);
1298 } else if (adapter->proc_cmd_buf_counter == 1) {
1299 port->stats.txnullskb++;
1301 if (unlikely(netif_queue_stopped(port->netdev)
1302 && netif_carrier_ok(port->netdev))
1303 && ((jiffies - port->netdev->trans_start) >
1304 port->netdev->watchdog_timeo)) {
1305 SCHEDULE_WORK(&port->tx_timeout_task);
1308 last_consumer = get_next_index(last_consumer,
1309 adapter->max_tx_desc_count);
1312 adapter->stats.noxmitdone += count1;
1315 spin_lock(&adapter->tx_lock);
1316 if ((--adapter->proc_cmd_buf_counter) == 0) {
1317 adapter->last_cmd_consumer = last_consumer;
1318 while ((adapter->last_cmd_consumer != consumer)
1319 && (count2 < MAX_STATUS_HANDLE)) {
1321 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
1326 adapter->last_cmd_consumer =
1327 get_next_index(adapter->last_cmd_consumer,
1328 adapter->max_tx_desc_count);
1331 if (count1 || count2) {
1332 for (p = 0; p < adapter->ahw.max_ports; p++) {
1333 nport = adapter->port[p];
1334 if (netif_queue_stopped(nport->netdev)
1335 && (nport->flags & NETXEN_NETDEV_STATUS)) {
1336 netif_wake_queue(nport->netdev);
1337 nport->flags &= ~NETXEN_NETDEV_STATUS;
1342 * If everything is freed up to consumer then check if the ring is full
1343 * If the ring is full then check if more needs to be freed and
1344 * schedule the call back again.
1346 * This happens when there are 2 CPUs. One could be freeing and the
1347 * other filling it. If the ring is full when we get out of here and
1348 * the card has already interrupted the host then the host can miss the
1351 * There is still a possible race condition and the host could miss an
1352 * interrupt. The card has to take care of this.
1354 if (adapter->last_cmd_consumer == consumer &&
1355 (((adapter->cmd_producer + 1) %
1356 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
1357 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1359 done = (adapter->last_cmd_consumer == consumer);
1361 spin_unlock(&adapter->tx_lock);
1362 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1368 * netxen_post_rx_buffers puts buffer in the Phantom memory
1370 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1372 struct pci_dev *pdev = adapter->ahw.pdev;
1373 struct sk_buff *skb;
1374 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1375 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1377 struct rcv_desc *pdesc;
1378 struct netxen_rx_buffer *buffer;
1381 netxen_ctx_msg msg = 0;
1384 adapter->stats.post_called++;
1385 rcv_desc = &recv_ctx->rcv_desc[ringid];
1387 producer = rcv_desc->producer;
1388 index = rcv_desc->begin_alloc;
1389 buffer = &rcv_desc->rx_buf_arr[index];
1390 /* We can start writing rx descriptors into the phantom memory. */
1391 while (buffer->state == NETXEN_BUFFER_FREE) {
1392 skb = dev_alloc_skb(rcv_desc->skb_size);
1393 if (unlikely(!skb)) {
1396 * We need to schedule the posting of buffers to the pegs.
1398 rcv_desc->begin_alloc = index;
1399 DPRINTK(ERR, "netxen_post_rx_buffers: "
1400 " allocated only %d buffers\n", count);
1404 count++; /* now there should be no failure */
1405 pdesc = &rcv_desc->desc_head[producer];
1407 #if defined(XGB_DEBUG)
1408 *(unsigned long *)(skb->head) = 0xc0debabe;
1409 if (skb_is_nonlinear(skb)) {
1410 printk("Allocated SKB @%p is nonlinear\n");
1413 skb_reserve(skb, 2);
1414 /* This will be setup when we receive the
1415 * buffer after it has been filled FSL TBD TBD
1416 * skb->dev = netdev;
1418 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1419 PCI_DMA_FROMDEVICE);
1420 pdesc->addr_buffer = cpu_to_le64(dma);
1422 buffer->state = NETXEN_BUFFER_BUSY;
1424 /* make a rcv descriptor */
1425 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1426 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1427 DPRINTK(INFO, "done writing descripter\n");
1429 get_next_index(producer, rcv_desc->max_rx_desc_count);
1430 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1431 buffer = &rcv_desc->rx_buf_arr[index];
1433 /* if we did allocate buffers, then write the count to Phantom */
1435 rcv_desc->begin_alloc = index;
1436 rcv_desc->rcv_pending += count;
1437 adapter->stats.lastposted = count;
1438 adapter->stats.posted += count;
1439 rcv_desc->producer = producer;
1440 if (rcv_desc->rcv_free >= 32) {
1441 rcv_desc->rcv_free = 0;
1443 writel((producer - 1) &
1444 (rcv_desc->max_rx_desc_count - 1),
1445 NETXEN_CRB_NORMALIZE(adapter,
1446 recv_crb_registers[0].
1447 rcv_desc_crb[ringid].
1448 crb_rcv_producer_offset));
1450 * Write a doorbell msg to tell phanmon of change in
1451 * receive ring producer
1453 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1454 netxen_set_msg_privid(msg);
1455 netxen_set_msg_count(msg,
1458 max_rx_desc_count - 1)));
1459 netxen_set_msg_ctxid(msg, 0);
1460 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1462 DB_NORMALIZE(adapter,
1463 NETXEN_RCV_PRODUCER_OFFSET));
1468 void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
1471 struct pci_dev *pdev = adapter->ahw.pdev;
1472 struct sk_buff *skb;
1473 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1474 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1476 struct rcv_desc *pdesc;
1477 struct netxen_rx_buffer *buffer;
1481 adapter->stats.post_called++;
1482 rcv_desc = &recv_ctx->rcv_desc[ringid];
1484 producer = rcv_desc->producer;
1485 index = rcv_desc->begin_alloc;
1486 buffer = &rcv_desc->rx_buf_arr[index];
1487 /* We can start writing rx descriptors into the phantom memory. */
1488 while (buffer->state == NETXEN_BUFFER_FREE) {
1489 skb = dev_alloc_skb(rcv_desc->skb_size);
1490 if (unlikely(!skb)) {
1492 * We need to schedule the posting of buffers to the pegs.
1494 rcv_desc->begin_alloc = index;
1495 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1496 " allocated only %d buffers\n", count);
1499 count++; /* now there should be no failure */
1500 pdesc = &rcv_desc->desc_head[producer];
1501 skb_reserve(skb, 2);
1503 * This will be setup when we receive the
1504 * buffer after it has been filled
1505 * skb->dev = netdev;
1508 buffer->state = NETXEN_BUFFER_BUSY;
1509 buffer->dma = pci_map_single(pdev, skb->data,
1511 PCI_DMA_FROMDEVICE);
1513 /* make a rcv descriptor */
1514 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1515 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1516 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1517 DPRINTK(INFO, "done writing descripter\n");
1519 get_next_index(producer, rcv_desc->max_rx_desc_count);
1520 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1521 buffer = &rcv_desc->rx_buf_arr[index];
1524 /* if we did allocate buffers, then write the count to Phantom */
1526 rcv_desc->begin_alloc = index;
1527 rcv_desc->rcv_pending += count;
1528 adapter->stats.lastposted = count;
1529 adapter->stats.posted += count;
1530 rcv_desc->producer = producer;
1531 if (rcv_desc->rcv_free >= 32) {
1532 rcv_desc->rcv_free = 0;
1534 writel((producer - 1) &
1535 (rcv_desc->max_rx_desc_count - 1),
1536 NETXEN_CRB_NORMALIZE(adapter,
1537 recv_crb_registers[0].
1538 rcv_desc_crb[ringid].
1539 crb_rcv_producer_offset));
1545 int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1547 if (find_diff_among(adapter->last_cmd_consumer,
1548 adapter->cmd_producer,
1549 adapter->max_tx_desc_count) > 0)
1556 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1558 struct netxen_port *port;
1561 memset(&adapter->stats, 0, sizeof(adapter->stats));
1562 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
1563 port = adapter->port[port_num];
1564 memset(&port->stats, 0, sizeof(port->stats));