Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt...
[linux-2.6] / drivers / gpu / drm / i915 / dvo_tfp410.c
1 /*
2  * Copyright © 2007 Dave Mueller
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Dave Mueller <dave.mueller@gmx.ch>
25  *
26  */
27
28 #include "dvo.h"
29
30 /* register definitions according to the TFP410 data sheet */
31 #define TFP410_VID              0x014C
32 #define TFP410_DID              0x0410
33
34 #define TFP410_VID_LO           0x00
35 #define TFP410_VID_HI           0x01
36 #define TFP410_DID_LO           0x02
37 #define TFP410_DID_HI           0x03
38 #define TFP410_REV              0x04
39
40 #define TFP410_CTL_1            0x08
41 #define TFP410_CTL_1_TDIS       (1<<6)
42 #define TFP410_CTL_1_VEN        (1<<5)
43 #define TFP410_CTL_1_HEN        (1<<4)
44 #define TFP410_CTL_1_DSEL       (1<<3)
45 #define TFP410_CTL_1_BSEL       (1<<2)
46 #define TFP410_CTL_1_EDGE       (1<<1)
47 #define TFP410_CTL_1_PD         (1<<0)
48
49 #define TFP410_CTL_2            0x09
50 #define TFP410_CTL_2_VLOW       (1<<7)
51 #define TFP410_CTL_2_MSEL_MASK  (0x7<<4)
52 #define TFP410_CTL_2_MSEL       (1<<4)
53 #define TFP410_CTL_2_TSEL       (1<<3)
54 #define TFP410_CTL_2_RSEN       (1<<2)
55 #define TFP410_CTL_2_HTPLG      (1<<1)
56 #define TFP410_CTL_2_MDI        (1<<0)
57
58 #define TFP410_CTL_3            0x0A
59 #define TFP410_CTL_3_DK_MASK    (0x7<<5)
60 #define TFP410_CTL_3_DK         (1<<5)
61 #define TFP410_CTL_3_DKEN       (1<<4)
62 #define TFP410_CTL_3_CTL_MASK   (0x7<<1)
63 #define TFP410_CTL_3_CTL        (1<<1)
64
65 #define TFP410_USERCFG          0x0B
66
67 #define TFP410_DE_DLY           0x32
68
69 #define TFP410_DE_CTL           0x33
70 #define TFP410_DE_CTL_DEGEN     (1<<6)
71 #define TFP410_DE_CTL_VSPOL     (1<<5)
72 #define TFP410_DE_CTL_HSPOL     (1<<4)
73 #define TFP410_DE_CTL_DEDLY8    (1<<0)
74
75 #define TFP410_DE_TOP           0x34
76
77 #define TFP410_DE_CNT_LO        0x36
78 #define TFP410_DE_CNT_HI        0x37
79
80 #define TFP410_DE_LIN_LO        0x38
81 #define TFP410_DE_LIN_HI        0x39
82
83 #define TFP410_H_RES_LO         0x3A
84 #define TFP410_H_RES_HI         0x3B
85
86 #define TFP410_V_RES_LO         0x3C
87 #define TFP410_V_RES_HI         0x3D
88
89 struct tfp410_save_rec {
90         uint8_t ctl1;
91         uint8_t ctl2;
92 };
93
94 struct tfp410_priv {
95         bool quiet;
96
97         struct tfp410_save_rec saved_reg;
98         struct tfp410_save_rec mode_reg;
99 };
100
101 static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
102 {
103         struct tfp410_priv *tfp = dvo->dev_priv;
104         struct i2c_adapter *adapter = dvo->i2c_bus;
105         struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
106         u8 out_buf[2];
107         u8 in_buf[2];
108
109         struct i2c_msg msgs[] = {
110                 {
111                         .addr = dvo->slave_addr,
112                         .flags = 0,
113                         .len = 1,
114                         .buf = out_buf,
115                 },
116                 {
117                         .addr = dvo->slave_addr,
118                         .flags = I2C_M_RD,
119                         .len = 1,
120                         .buf = in_buf,
121                 }
122         };
123
124         out_buf[0] = addr;
125         out_buf[1] = 0;
126
127         if (i2c_transfer(&i2cbus->adapter, msgs, 2) == 2) {
128                 *ch = in_buf[0];
129                 return true;
130         };
131
132         if (!tfp->quiet) {
133                 DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
134                           addr, i2cbus->adapter.name, dvo->slave_addr);
135         }
136         return false;
137 }
138
139 static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
140 {
141         struct tfp410_priv *tfp = dvo->dev_priv;
142         struct i2c_adapter *adapter = dvo->i2c_bus;
143         struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
144         uint8_t out_buf[2];
145         struct i2c_msg msg = {
146                 .addr = dvo->slave_addr,
147                 .flags = 0,
148                 .len = 2,
149                 .buf = out_buf,
150         };
151
152         out_buf[0] = addr;
153         out_buf[1] = ch;
154
155         if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1)
156                 return true;
157
158         if (!tfp->quiet) {
159                 DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
160                           addr, i2cbus->adapter.name, dvo->slave_addr);
161         }
162
163         return false;
164 }
165
166 static int tfp410_getid(struct intel_dvo_device *dvo, int addr)
167 {
168         uint8_t ch1, ch2;
169
170         if (tfp410_readb(dvo, addr+0, &ch1) &&
171             tfp410_readb(dvo, addr+1, &ch2))
172                 return ((ch2 << 8) & 0xFF00) | (ch1 & 0x00FF);
173
174         return -1;
175 }
176
177 /* Ti TFP410 driver for chip on i2c bus */
178 static bool tfp410_init(struct intel_dvo_device *dvo,
179                         struct i2c_adapter *adapter)
180 {
181         /* this will detect the tfp410 chip on the specified i2c bus */
182         struct tfp410_priv *tfp;
183         int id;
184
185         tfp = kzalloc(sizeof(struct tfp410_priv), GFP_KERNEL);
186         if (tfp == NULL)
187                 return false;
188
189         dvo->i2c_bus = adapter;
190         dvo->dev_priv = tfp;
191         tfp->quiet = true;
192
193         if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
194                 DRM_DEBUG("tfp410 not detected got VID %X: from %s Slave %d.\n",
195                           id, adapter->name, dvo->slave_addr);
196                 goto out;
197         }
198
199         if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
200                 DRM_DEBUG("tfp410 not detected got DID %X: from %s Slave %d.\n",
201                           id, adapter->name, dvo->slave_addr);
202                 goto out;
203         }
204         tfp->quiet = false;
205         return true;
206 out:
207         kfree(tfp);
208         return false;
209 }
210
211 static enum drm_connector_status tfp410_detect(struct intel_dvo_device *dvo)
212 {
213         enum drm_connector_status ret = connector_status_disconnected;
214         uint8_t ctl2;
215
216         if (tfp410_readb(dvo, TFP410_CTL_2, &ctl2)) {
217                 if (ctl2 & TFP410_CTL_2_HTPLG)
218                         ret = connector_status_connected;
219                 else
220                         ret = connector_status_disconnected;
221         }
222
223         return ret;
224 }
225
226 static enum drm_mode_status tfp410_mode_valid(struct intel_dvo_device *dvo,
227                                               struct drm_display_mode *mode)
228 {
229         return MODE_OK;
230 }
231
232 static void tfp410_mode_set(struct intel_dvo_device *dvo,
233                             struct drm_display_mode *mode,
234                             struct drm_display_mode *adjusted_mode)
235 {
236     /* As long as the basics are set up, since we don't have clock dependencies
237      * in the mode setup, we can just leave the registers alone and everything
238      * will work fine.
239      */
240     /* don't do much */
241     return;
242 }
243
244 /* set the tfp410 power state */
245 static void tfp410_dpms(struct intel_dvo_device *dvo, int mode)
246 {
247         uint8_t ctl1;
248
249         if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
250                 return;
251
252         if (mode == DRM_MODE_DPMS_ON)
253                 ctl1 |= TFP410_CTL_1_PD;
254         else
255                 ctl1 &= ~TFP410_CTL_1_PD;
256
257         tfp410_writeb(dvo, TFP410_CTL_1, ctl1);
258 }
259
260 static void tfp410_dump_regs(struct intel_dvo_device *dvo)
261 {
262         uint8_t val, val2;
263
264         tfp410_readb(dvo, TFP410_REV, &val);
265         DRM_DEBUG("TFP410_REV: 0x%02X\n", val);
266         tfp410_readb(dvo, TFP410_CTL_1, &val);
267         DRM_DEBUG("TFP410_CTL1: 0x%02X\n", val);
268         tfp410_readb(dvo, TFP410_CTL_2, &val);
269         DRM_DEBUG("TFP410_CTL2: 0x%02X\n", val);
270         tfp410_readb(dvo, TFP410_CTL_3, &val);
271         DRM_DEBUG("TFP410_CTL3: 0x%02X\n", val);
272         tfp410_readb(dvo, TFP410_USERCFG, &val);
273         DRM_DEBUG("TFP410_USERCFG: 0x%02X\n", val);
274         tfp410_readb(dvo, TFP410_DE_DLY, &val);
275         DRM_DEBUG("TFP410_DE_DLY: 0x%02X\n", val);
276         tfp410_readb(dvo, TFP410_DE_CTL, &val);
277         DRM_DEBUG("TFP410_DE_CTL: 0x%02X\n", val);
278         tfp410_readb(dvo, TFP410_DE_TOP, &val);
279         DRM_DEBUG("TFP410_DE_TOP: 0x%02X\n", val);
280         tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);
281         tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2);
282         DRM_DEBUG("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
283         tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);
284         tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2);
285         DRM_DEBUG("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
286         tfp410_readb(dvo, TFP410_H_RES_LO, &val);
287         tfp410_readb(dvo, TFP410_H_RES_HI, &val2);
288         DRM_DEBUG("TFP410_H_RES: 0x%02X%02X\n", val2, val);
289         tfp410_readb(dvo, TFP410_V_RES_LO, &val);
290         tfp410_readb(dvo, TFP410_V_RES_HI, &val2);
291         DRM_DEBUG("TFP410_V_RES: 0x%02X%02X\n", val2, val);
292 }
293
294 static void tfp410_save(struct intel_dvo_device *dvo)
295 {
296         struct tfp410_priv *tfp = dvo->dev_priv;
297
298         if (!tfp410_readb(dvo, TFP410_CTL_1, &tfp->saved_reg.ctl1))
299                 return;
300
301         if (!tfp410_readb(dvo, TFP410_CTL_2, &tfp->saved_reg.ctl2))
302                 return;
303 }
304
305 static void tfp410_restore(struct intel_dvo_device *dvo)
306 {
307         struct tfp410_priv *tfp = dvo->dev_priv;
308
309         /* Restore it powered down initially */
310         tfp410_writeb(dvo, TFP410_CTL_1, tfp->saved_reg.ctl1 & ~0x1);
311
312         tfp410_writeb(dvo, TFP410_CTL_2, tfp->saved_reg.ctl2);
313         tfp410_writeb(dvo, TFP410_CTL_1, tfp->saved_reg.ctl1);
314 }
315
316 static void tfp410_destroy(struct intel_dvo_device *dvo)
317 {
318         struct tfp410_priv *tfp = dvo->dev_priv;
319
320         if (tfp) {
321                 kfree(tfp);
322                 dvo->dev_priv = NULL;
323         }
324 }
325
326 struct intel_dvo_dev_ops tfp410_ops = {
327         .init = tfp410_init,
328         .detect = tfp410_detect,
329         .mode_valid = tfp410_mode_valid,
330         .mode_set = tfp410_mode_set,
331         .dpms = tfp410_dpms,
332         .dump_regs = tfp410_dump_regs,
333         .save = tfp410_save,
334         .restore = tfp410_restore,
335         .destroy = tfp410_destroy,
336 };