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   1 /*
   2  *  include/asm-s390/system.h
   3  *
   4  *  S390 version
   5  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6  *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
   7  *
   8  *  Derived from "include/asm-i386/system.h"
   9  */
  10
  11 #ifndef __ASM_SYSTEM_H
  12 #define __ASM_SYSTEM_H
  13
  14 #include <linux/kernel.h>
  15 #include <linux/errno.h>
  16 #include <asm/types.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/setup.h>
  19 #include <asm/processor.h>
  20 #include <asm/lowcore.h>
  21
  22 #ifdef __KERNEL__
  23
  24 struct task_struct;
  25
  26 extern struct task_struct *__switch_to(void *, void *);
  27
  28 static inline void save_fp_regs(s390_fp_regs *fpregs)
  29 {
  30         asm volatile(
  31                 "       std     0,8(%1)\n"
  32                 "       std     2,24(%1)\n"
  33                 "       std     4,40(%1)\n"
  34                 "       std     6,56(%1)"
  35                 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory");
  36         if (!MACHINE_HAS_IEEE)
  37                 return;
  38         asm volatile(
  39                 "       stfpc   0(%1)\n"
  40                 "       std     1,16(%1)\n"
  41                 "       std     3,32(%1)\n"
  42                 "       std     5,48(%1)\n"
  43                 "       std     7,64(%1)\n"
  44                 "       std     8,72(%1)\n"
  45                 "       std     9,80(%1)\n"
  46                 "       std     10,88(%1)\n"
  47                 "       std     11,96(%1)\n"
  48                 "       std     12,104(%1)\n"
  49                 "       std     13,112(%1)\n"
  50                 "       std     14,120(%1)\n"
  51                 "       std     15,128(%1)\n"
  52                 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory");
  53 }
  54
  55 static inline void restore_fp_regs(s390_fp_regs *fpregs)
  56 {
  57         asm volatile(
  58                 "       ld      0,8(%0)\n"
  59                 "       ld      2,24(%0)\n"
  60                 "       ld      4,40(%0)\n"
  61                 "       ld      6,56(%0)"
  62                 : : "a" (fpregs), "m" (*fpregs));
  63         if (!MACHINE_HAS_IEEE)
  64                 return;
  65         asm volatile(
  66                 "       lfpc    0(%0)\n"
  67                 "       ld      1,16(%0)\n"
  68                 "       ld      3,32(%0)\n"
  69                 "       ld      5,48(%0)\n"
  70                 "       ld      7,64(%0)\n"
  71                 "       ld      8,72(%0)\n"
  72                 "       ld      9,80(%0)\n"
  73                 "       ld      10,88(%0)\n"
  74                 "       ld      11,96(%0)\n"
  75                 "       ld      12,104(%0)\n"
  76                 "       ld      13,112(%0)\n"
  77                 "       ld      14,120(%0)\n"
  78                 "       ld      15,128(%0)\n"
  79                 : : "a" (fpregs), "m" (*fpregs));
  80 }
  81
  82 static inline void save_access_regs(unsigned int *acrs)
  83 {
  84         asm volatile("stam 0,15,0(%0)" : : "a" (acrs) : "memory");
  85 }
  86
  87 static inline void restore_access_regs(unsigned int *acrs)
  88 {
  89         asm volatile("lam 0,15,0(%0)" : : "a" (acrs));
  90 }
  91
  92 #define switch_to(prev,next,last) do {                                       \
  93         if (prev == next)                                                    \
  94                 break;                                                       \
  95         save_fp_regs(&prev->thread.fp_regs);                                 \
  96         restore_fp_regs(&next->thread.fp_regs);                              \
  97         save_access_regs(&prev->thread.acrs[0]);                             \
  98         restore_access_regs(&next->thread.acrs[0]);                          \
  99         prev = __switch_to(prev,next);                                       \
 100 } while (0)
 101
 102 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 103 extern void account_vtime(struct task_struct *);
 104 extern void account_tick_vtime(struct task_struct *);
 105 extern void account_system_vtime(struct task_struct *);
 106 #else
 107 #define account_vtime(x) do { /* empty */ } while (0)
 108 #endif
 109
 110 #ifdef CONFIG_PFAULT
 111 extern void pfault_irq_init(void);
 112 extern int pfault_init(void);
 113 extern void pfault_fini(void);
 114 #else /* CONFIG_PFAULT */
 115 #define pfault_irq_init()       do { } while (0)
 116 #define pfault_init()           ({-1;})
 117 #define pfault_fini()           do { } while (0)
 118 #endif /* CONFIG_PFAULT */
 119
 120 #ifdef CONFIG_PAGE_STATES
 121 extern void cmma_init(void);
 122 #else
 123 static inline void cmma_init(void) { }
 124 #endif
 125
 126 #define finish_arch_switch(prev) do {                                        \
 127         set_fs(current->thread.mm_segment);                                  \
 128         account_vtime(prev);                                                 \
 129 } while (0)
 130
 131 #define nop() asm volatile("nop")
 132
 133 #define xchg(ptr,x)                                                       \
 134 ({                                                                        \
 135         __typeof__(*(ptr)) __ret;                                         \
 136         __ret = (__typeof__(*(ptr)))                                      \
 137                 __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \
 138         __ret;                                                            \
 139 })
 140
 141 extern void __xchg_called_with_bad_pointer(void);
 142
 143 static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
 144 {
 145         unsigned long addr, old;
 146         int shift;
 147
 148         switch (size) {
 149         case 1:
 150                 addr = (unsigned long) ptr;
 151                 shift = (3 ^ (addr & 3)) << 3;
 152                 addr ^= addr & 3;
 153                 asm volatile(
 154                         "       l       %0,0(%4)\n"
 155                         "0:     lr      0,%0\n"
 156                         "       nr      0,%3\n"
 157                         "       or      0,%2\n"
 158                         "       cs      %0,0,0(%4)\n"
 159                         "       jl      0b\n"
 160                         : "=&d" (old), "=m" (*(int *) addr)
 161                         : "d" (x << shift), "d" (~(255 << shift)), "a" (addr),
 162                           "m" (*(int *) addr) : "memory", "cc", "0");
 163                 return old >> shift;
 164         case 2:
 165                 addr = (unsigned long) ptr;
 166                 shift = (2 ^ (addr & 2)) << 3;
 167                 addr ^= addr & 2;
 168                 asm volatile(
 169                         "       l       %0,0(%4)\n"
 170                         "0:     lr      0,%0\n"
 171                         "       nr      0,%3\n"
 172                         "       or      0,%2\n"
 173                         "       cs      %0,0,0(%4)\n"
 174                         "       jl      0b\n"
 175                         : "=&d" (old), "=m" (*(int *) addr)
 176                         : "d" (x << shift), "d" (~(65535 << shift)), "a" (addr),
 177                           "m" (*(int *) addr) : "memory", "cc", "0");
 178                 return old >> shift;
 179         case 4:
 180                 asm volatile(
 181                         "       l       %0,0(%3)\n"
 182                         "0:     cs      %0,%2,0(%3)\n"
 183                         "       jl      0b\n"
 184                         : "=&d" (old), "=m" (*(int *) ptr)
 185                         : "d" (x), "a" (ptr), "m" (*(int *) ptr)
 186                         : "memory", "cc");
 187                 return old;
 188 #ifdef __s390x__
 189         case 8:
 190                 asm volatile(
 191                         "       lg      %0,0(%3)\n"
 192                         "0:     csg     %0,%2,0(%3)\n"
 193                         "       jl      0b\n"
 194                         : "=&d" (old), "=m" (*(long *) ptr)
 195                         : "d" (x), "a" (ptr), "m" (*(long *) ptr)
 196                         : "memory", "cc");
 197                 return old;
 198 #endif /* __s390x__ */
 199         }
 200         __xchg_called_with_bad_pointer();
 201         return x;
 202 }
 203
 204 /*
 205  * Atomic compare and exchange.  Compare OLD with MEM, if identical,
 206  * store NEW in MEM.  Return the initial value in MEM.  Success is
 207  * indicated by comparing RETURN with OLD.
 208  */
 209
 210 #define __HAVE_ARCH_CMPXCHG 1
 211
 212 #define cmpxchg(ptr, o, n)                                              \
 213         ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o),       \
 214                                         (unsigned long)(n), sizeof(*(ptr))))
 215
 216 extern void __cmpxchg_called_with_bad_pointer(void);
 217
 218 static inline unsigned long
 219 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
 220 {
 221         unsigned long addr, prev, tmp;
 222         int shift;
 223
 224         switch (size) {
 225         case 1:
 226                 addr = (unsigned long) ptr;
 227                 shift = (3 ^ (addr & 3)) << 3;
 228                 addr ^= addr & 3;
 229                 asm volatile(
 230                         "       l       %0,0(%4)\n"
 231                         "0:     nr      %0,%5\n"
 232                         "       lr      %1,%0\n"
 233                         "       or      %0,%2\n"
 234                         "       or      %1,%3\n"
 235                         "       cs      %0,%1,0(%4)\n"
 236                         "       jnl     1f\n"
 237                         "       xr      %1,%0\n"
 238                         "       nr      %1,%5\n"
 239                         "       jnz     0b\n"
 240                         "1:"
 241                         : "=&d" (prev), "=&d" (tmp)
 242                         : "d" (old << shift), "d" (new << shift), "a" (ptr),
 243                           "d" (~(255 << shift))
 244                         : "memory", "cc");
 245                 return prev >> shift;
 246         case 2:
 247                 addr = (unsigned long) ptr;
 248                 shift = (2 ^ (addr & 2)) << 3;
 249                 addr ^= addr & 2;
 250                 asm volatile(
 251                         "       l       %0,0(%4)\n"
 252                         "0:     nr      %0,%5\n"
 253                         "       lr      %1,%0\n"
 254                         "       or      %0,%2\n"
 255                         "       or      %1,%3\n"
 256                         "       cs      %0,%1,0(%4)\n"
 257                         "       jnl     1f\n"
 258                         "       xr      %1,%0\n"
 259                         "       nr      %1,%5\n"
 260                         "       jnz     0b\n"
 261                         "1:"
 262                         : "=&d" (prev), "=&d" (tmp)
 263                         : "d" (old << shift), "d" (new << shift), "a" (ptr),
 264                           "d" (~(65535 << shift))
 265                         : "memory", "cc");
 266                 return prev >> shift;
 267         case 4:
 268                 asm volatile(
 269                         "       cs      %0,%2,0(%3)\n"
 270                         : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
 271                         : "memory", "cc");
 272                 return prev;
 273 #ifdef __s390x__
 274         case 8:
 275                 asm volatile(
 276                         "       csg     %0,%2,0(%3)\n"
 277                         : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
 278                         : "memory", "cc");
 279                 return prev;
 280 #endif /* __s390x__ */
 281         }
 282         __cmpxchg_called_with_bad_pointer();
 283         return old;
 284 }
 285
 286 /*
 287  * Force strict CPU ordering.
 288  * And yes, this is required on UP too when we're talking
 289  * to devices.
 290  *
 291  * This is very similar to the ppc eieio/sync instruction in that is
 292  * does a checkpoint syncronisation & makes sure that
 293  * all memory ops have completed wrt other CPU's ( see 7-15 POP  DJB ).
 294  */
 295
 296 #define eieio() asm volatile("bcr 15,0" : : : "memory")
 297 #define SYNC_OTHER_CORES(x)   eieio()
 298 #define mb()    eieio()
 299 #define rmb()   eieio()
 300 #define wmb()   eieio()
 301 #define read_barrier_depends() do { } while(0)
 302 #define smp_mb()       mb()
 303 #define smp_rmb()      rmb()
 304 #define smp_wmb()      wmb()
 305 #define smp_read_barrier_depends()    read_barrier_depends()
 306 #define smp_mb__before_clear_bit()     smp_mb()
 307 #define smp_mb__after_clear_bit()      smp_mb()
 308
 309
 310 #define set_mb(var, value)      do { var = value; mb(); } while (0)
 311
 312 #ifdef __s390x__
 313
 314 #define __ctl_load(array, low, high) ({                         \
 315         typedef struct { char _[sizeof(array)]; } addrtype;     \
 316         asm volatile(                                           \
 317                 "       lctlg   %1,%2,0(%0)\n"                  \
 318                 : : "a" (&array), "i" (low), "i" (high),        \
 319                     "m" (*(addrtype *)(&array)));               \
 320         })
 321
 322 #define __ctl_store(array, low, high) ({                        \
 323         typedef struct { char _[sizeof(array)]; } addrtype;     \
 324         asm volatile(                                           \
 325                 "       stctg   %2,%3,0(%1)\n"                  \
 326                 : "=m" (*(addrtype *)(&array))                  \
 327                 : "a" (&array), "i" (low), "i" (high));         \
 328         })
 329
 330 #else /* __s390x__ */
 331
 332 #define __ctl_load(array, low, high) ({                         \
 333         typedef struct { char _[sizeof(array)]; } addrtype;     \
 334         asm volatile(                                           \
 335                 "       lctl    %1,%2,0(%0)\n"                  \
 336                 : : "a" (&array), "i" (low), "i" (high),        \
 337                     "m" (*(addrtype *)(&array)));               \
 338 })
 339
 340 #define __ctl_store(array, low, high) ({                        \
 341         typedef struct { char _[sizeof(array)]; } addrtype;     \
 342         asm volatile(                                           \
 343                 "       stctl   %2,%3,0(%1)\n"                  \
 344                 : "=m" (*(addrtype *)(&array))                  \
 345                 : "a" (&array), "i" (low), "i" (high));         \
 346         })
 347
 348 #endif /* __s390x__ */
 349
 350 #define __ctl_set_bit(cr, bit) ({       \
 351         unsigned long __dummy;          \
 352         __ctl_store(__dummy, cr, cr);   \
 353         __dummy |= 1UL << (bit);        \
 354         __ctl_load(__dummy, cr, cr);    \
 355 })
 356
 357 #define __ctl_clear_bit(cr, bit) ({     \
 358         unsigned long __dummy;          \
 359         __ctl_store(__dummy, cr, cr);   \
 360         __dummy &= ~(1UL << (bit));     \
 361         __ctl_load(__dummy, cr, cr);    \
 362 })
 363
 364 #include <linux/irqflags.h>
 365
 366 #include <asm-generic/cmpxchg-local.h>
 367
 368 static inline unsigned long __cmpxchg_local(volatile void *ptr,
 369                                       unsigned long old,
 370                                       unsigned long new, int size)
 371 {
 372         switch (size) {
 373         case 1:
 374         case 2:
 375         case 4:
 376 #ifdef __s390x__
 377         case 8:
 378 #endif
 379                 return __cmpxchg(ptr, old, new, size);
 380         default:
 381                 return __cmpxchg_local_generic(ptr, old, new, size);
 382         }
 383
 384         return old;
 385 }
 386
 387 /*
 388  * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
 389  * them available.
 390  */
 391 #define cmpxchg_local(ptr, o, n)                                        \
 392         ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
 393                         (unsigned long)(n), sizeof(*(ptr))))
 394 #ifdef __s390x__
 395 #define cmpxchg64_local(ptr, o, n)                                      \
 396   ({                                                                    \
 397         BUILD_BUG_ON(sizeof(*(ptr)) != 8);                              \
 398         cmpxchg_local((ptr), (o), (n));                                 \
 399   })
 400 #else
 401 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
 402 #endif
 403
 404 /*
 405  * Use to set psw mask except for the first byte which
 406  * won't be changed by this function.
 407  */
 408 static inline void
 409 __set_psw_mask(unsigned long mask)
 410 {
 411         __load_psw_mask(mask | (__raw_local_irq_stosm(0x00) & ~(-1UL >> 8)));
 412 }
 413
 414 #define local_mcck_enable()  __set_psw_mask(psw_kernel_bits)
 415 #define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK)
 416
 417 #ifdef CONFIG_SMP
 418
 419 extern void smp_ctl_set_bit(int cr, int bit);
 420 extern void smp_ctl_clear_bit(int cr, int bit);
 421 #define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
 422 #define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
 423
 424 #else
 425
 426 #define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
 427 #define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
 428
 429 #endif /* CONFIG_SMP */
 430
 431 static inline unsigned int stfl(void)
 432 {
 433         asm volatile(
 434                 "       .insn   s,0xb2b10000,0(0)\n" /* stfl */
 435                 "0:\n"
 436                 EX_TABLE(0b,0b));
 437         return S390_lowcore.stfl_fac_list;
 438 }
 439
 440 static inline int __stfle(unsigned long long *list, int doublewords)
 441 {
 442         typedef struct { unsigned long long _[doublewords]; } addrtype;
 443         register unsigned long __nr asm("0") = doublewords - 1;
 444
 445         asm volatile(".insn s,0xb2b00000,%0" /* stfle */
 446                      : "=m" (*(addrtype *) list), "+d" (__nr) : : "cc");
 447         return __nr + 1;
 448 }
 449
 450 static inline int stfle(unsigned long long *list, int doublewords)
 451 {
 452         if (!(stfl() & (1UL << 24)))
 453                 return -EOPNOTSUPP;
 454         return __stfle(list, doublewords);
 455 }
 456
 457 static inline unsigned short stap(void)
 458 {
 459         unsigned short cpu_address;
 460
 461         asm volatile("stap %0" : "=m" (cpu_address));
 462         return cpu_address;
 463 }
 464
 465 extern void (*_machine_restart)(char *command);
 466 extern void (*_machine_halt)(void);
 467 extern void (*_machine_power_off)(void);
 468
 469 #define arch_align_stack(x) (x)
 470
 471 #ifdef CONFIG_TRACE_IRQFLAGS
 472 extern psw_t sysc_restore_trace_psw;
 473 extern psw_t io_restore_trace_psw;
 474 #endif
 475
 476 #endif /* __KERNEL__ */
 477
 478 #endif