git.oblomov.eu Git - linux-2.6/blob - drivers/usb/host/ohci-hcd.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  *
  13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14  * interfaces (though some non-x86 Intel chips use it).  It supports
  15  * smarter hardware than UHCI.  A download link for the spec available
  16  * through the http://www.usb.org website.
  17  *
  18  * History:
  19  *
  20  * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
  21  * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
  22  * 2003/02/24 show registers in sysfs (Kevin Brosius)
  23  *
  24  * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
  25  *      bandwidth accounting; if debugging, show schedules in driverfs
  26  * 2002/07/19 fixes to management of ED and schedule state.
  27  * 2002/06/09 SA-1111 support (Christopher Hoover)
  28  * 2002/06/01 remember frame when HC won't see EDs any more; use that info
  29  *      to fix urb unlink races caused by interrupt latency assumptions;
  30  *      minor ED field and function naming updates
  31  * 2002/01/18 package as a patch for 2.5.3; this should match the
  32  *      2.4.17 kernel modulo some bugs being fixed.
  33  *
  34  * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
  35  *      from post-2.4.5 patches.
  36  * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
  37  * 2001/09/07 match PCI PM changes, errnos from Linus' tree
  38  * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
  39  *      pbook pci quirks gone (please fix pbook pci sw!) (db)
  40  *
  41  * 2001/04/08 Identify version on module load (gb)
  42  * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
  43         pci_map_single (db)
  44  * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
  45  * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
  46  *
  47  * 2000/09/26 fixed races in removing the private portion of the urb
  48  * 2000/09/07 disable bulk and control lists when unlinking the last
  49  *      endpoint descriptor in order to avoid unrecoverable errors on
  50  *      the Lucent chips. (rwc@sgi)
  51  * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
  52  *      urb unlink probs, indentation fixes
  53  * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
  54  *      device unplugs.
  55  * 2000/06/28 use PCI hotplug framework, for better power management
  56  *      and for Cardbus support (David Brownell)
  57  * 2000/earlier:  fixes for NEC/Lucent chips; suspend/resume handling
  58  *      when the controller loses power; handle UE; cleanup; ...
  59  *
  60  * v5.2 1999/12/07 URB 3rd preview,
  61  * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
  62  * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
  63  *      i386: HUB, Keyboard, Mouse, Printer
  64  *
  65  * v4.3 1999/10/27 multiple HCs, bulk_request
  66  * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
  67  * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
  68  * v4.0 1999/08/18
  69  * v3.0 1999/06/25
  70  * v2.1 1999/05/09  code clean up
  71  * v2.0 1999/05/04
  72  * v1.0 1999/04/27 initial release
  73  *
  74  * This file is licenced under the GPL.
  75  */
  76
  77 #include <linux/config.h>
  78
  79 #ifdef CONFIG_USB_DEBUG
  80 #       define DEBUG
  81 #else
  82 #       undef DEBUG
  83 #endif
  84
  85 #include <linux/module.h>
  86 #include <linux/moduleparam.h>
  87 #include <linux/pci.h>
  88 #include <linux/kernel.h>
  89 #include <linux/delay.h>
  90 #include <linux/ioport.h>
  91 #include <linux/sched.h>
  92 #include <linux/slab.h>
  93 #include <linux/smp_lock.h>
  94 #include <linux/errno.h>
  95 #include <linux/init.h>
  96 #include <linux/timer.h>
  97 #include <linux/list.h>
  98 #include <linux/usb.h>
  99 #include <linux/usb_otg.h>
 100 #include <linux/dma-mapping.h>
 101 #include <linux/dmapool.h>
 102 #include <linux/reboot.h>
 103
 104 #include <asm/io.h>
 105 #include <asm/irq.h>
 106 #include <asm/system.h>
 107 #include <asm/unaligned.h>
 108 #include <asm/byteorder.h>
 109
 110 #include "../core/hcd.h"
 111
 112 #define DRIVER_VERSION "2005 April 22"
 113 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
 114 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
 115
 116 /*-------------------------------------------------------------------------*/
 117
 118 // #define OHCI_VERBOSE_DEBUG   /* not always helpful */
 119
 120 /* For initializing controller (mask in an HCFS mode too) */
 121 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
 122 #define OHCI_INTR_INIT \
 123         (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
 124
 125 #ifdef __hppa__
 126 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
 127 #define IR_DISABLE
 128 #endif
 129
 130 #ifdef CONFIG_ARCH_OMAP
 131 /* OMAP doesn't support IR (no SMM; not needed) */
 132 #define IR_DISABLE
 133 #endif
 134
 135 /*-------------------------------------------------------------------------*/
 136
 137 static const char       hcd_name [] = "ohci_hcd";
 138
 139 #include "ohci.h"
 140
 141 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
 142 static int ohci_init (struct ohci_hcd *ohci);
 143 static void ohci_stop (struct usb_hcd *hcd);
 144 static int ohci_reboot (struct notifier_block *, unsigned long , void *);
 145
 146 #include "ohci-hub.c"
 147 #include "ohci-dbg.c"
 148 #include "ohci-mem.c"
 149 #include "ohci-q.c"
 150
 151
 152 /*
 153  * On architectures with edge-triggered interrupts we must never return
 154  * IRQ_NONE.
 155  */
 156 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
 157 #define IRQ_NOTMINE     IRQ_HANDLED
 158 #else
 159 #define IRQ_NOTMINE     IRQ_NONE
 160 #endif
 161
 162
 163 /* Some boards misreport power switching/overcurrent */
 164 static int distrust_firmware = 1;
 165 module_param (distrust_firmware, bool, 0);
 166 MODULE_PARM_DESC (distrust_firmware,
 167         "true to distrust firmware power/overcurrent setup");
 168
 169 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 170 static int no_handshake = 0;
 171 module_param (no_handshake, bool, 0);
 172 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 173
 174 /*-------------------------------------------------------------------------*/
 175
 176 /*
 177  * queue up an urb for anything except the root hub
 178  */
 179 static int ohci_urb_enqueue (
 180         struct usb_hcd  *hcd,
 181         struct usb_host_endpoint *ep,
 182         struct urb      *urb,
 183         int             mem_flags
 184 ) {
 185         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 186         struct ed       *ed;
 187         urb_priv_t      *urb_priv;
 188         unsigned int    pipe = urb->pipe;
 189         int             i, size = 0;
 190         unsigned long   flags;
 191         int             retval = 0;
 192
 193 #ifdef OHCI_VERBOSE_DEBUG
 194         urb_print (urb, "SUB", usb_pipein (pipe));
 195 #endif
 196
 197         /* every endpoint has a ed, locate and maybe (re)initialize it */
 198         if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
 199                 return -ENOMEM;
 200
 201         /* for the private part of the URB we need the number of TDs (size) */
 202         switch (ed->type) {
 203                 case PIPE_CONTROL:
 204                         /* td_submit_urb() doesn't yet handle these */
 205                         if (urb->transfer_buffer_length > 4096)
 206                                 return -EMSGSIZE;
 207
 208                         /* 1 TD for setup, 1 for ACK, plus ... */
 209                         size = 2;
 210                         /* FALLTHROUGH */
 211                 // case PIPE_INTERRUPT:
 212                 // case PIPE_BULK:
 213                 default:
 214                         /* one TD for every 4096 Bytes (can be upto 8K) */
 215                         size += urb->transfer_buffer_length / 4096;
 216                         /* ... and for any remaining bytes ... */
 217                         if ((urb->transfer_buffer_length % 4096) != 0)
 218                                 size++;
 219                         /* ... and maybe a zero length packet to wrap it up */
 220                         if (size == 0)
 221                                 size++;
 222                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 223                                 && (urb->transfer_buffer_length
 224                                         % usb_maxpacket (urb->dev, pipe,
 225                                                 usb_pipeout (pipe))) == 0)
 226                                 size++;
 227                         break;
 228                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 229                         size = urb->number_of_packets;
 230                         break;
 231         }
 232
 233         /* allocate the private part of the URB */
 234         urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 235                         mem_flags);
 236         if (!urb_priv)
 237                 return -ENOMEM;
 238         memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
 239         INIT_LIST_HEAD (&urb_priv->pending);
 240         urb_priv->length = size;
 241         urb_priv->ed = ed;
 242
 243         /* allocate the TDs (deferring hash chain updates) */
 244         for (i = 0; i < size; i++) {
 245                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 246                 if (!urb_priv->td [i]) {
 247                         urb_priv->length = i;
 248                         urb_free_priv (ohci, urb_priv);
 249                         return -ENOMEM;
 250                 }
 251         }
 252
 253         spin_lock_irqsave (&ohci->lock, flags);
 254
 255         /* don't submit to a dead HC */
 256         if (!HC_IS_RUNNING(hcd->state)) {
 257                 retval = -ENODEV;
 258                 goto fail;
 259         }
 260
 261         /* in case of unlink-during-submit */
 262         spin_lock (&urb->lock);
 263         if (urb->status != -EINPROGRESS) {
 264                 spin_unlock (&urb->lock);
 265                 urb->hcpriv = urb_priv;
 266                 finish_urb (ohci, urb, NULL);
 267                 retval = 0;
 268                 goto fail;
 269         }
 270
 271         /* schedule the ed if needed */
 272         if (ed->state == ED_IDLE) {
 273                 retval = ed_schedule (ohci, ed);
 274                 if (retval < 0)
 275                         goto fail0;
 276                 if (ed->type == PIPE_ISOCHRONOUS) {
 277                         u16     frame = ohci_frame_no(ohci);
 278
 279                         /* delay a few frames before the first TD */
 280                         frame += max_t (u16, 8, ed->interval);
 281                         frame &= ~(ed->interval - 1);
 282                         frame |= ed->branch;
 283                         urb->start_frame = frame;
 284
 285                         /* yes, only URB_ISO_ASAP is supported, and
 286                          * urb->start_frame is never used as input.
 287                          */
 288                 }
 289         } else if (ed->type == PIPE_ISOCHRONOUS)
 290                 urb->start_frame = ed->last_iso + ed->interval;
 291
 292         /* fill the TDs and link them to the ed; and
 293          * enable that part of the schedule, if needed
 294          * and update count of queued periodic urbs
 295          */
 296         urb->hcpriv = urb_priv;
 297         td_submit_urb (ohci, urb);
 298
 299 fail0:
 300         spin_unlock (&urb->lock);
 301 fail:
 302         if (retval)
 303                 urb_free_priv (ohci, urb_priv);
 304         spin_unlock_irqrestore (&ohci->lock, flags);
 305         return retval;
 306 }
 307
 308 /*
 309  * decouple the URB from the HC queues (TDs, urb_priv); it's
 310  * already marked using urb->status.  reporting is always done
 311  * asynchronously, and we might be dealing with an urb that's
 312  * partially transferred, or an ED with other urbs being unlinked.
 313  */
 314 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
 315 {
 316         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 317         unsigned long           flags;
 318
 319 #ifdef OHCI_VERBOSE_DEBUG
 320         urb_print (urb, "UNLINK", 1);
 321 #endif
 322
 323         spin_lock_irqsave (&ohci->lock, flags);
 324         if (HC_IS_RUNNING(hcd->state)) {
 325                 urb_priv_t  *urb_priv;
 326
 327                 /* Unless an IRQ completed the unlink while it was being
 328                  * handed to us, flag it for unlink and giveback, and force
 329                  * some upcoming INTR_SF to call finish_unlinks()
 330                  */
 331                 urb_priv = urb->hcpriv;
 332                 if (urb_priv) {
 333                         if (urb_priv->ed->state == ED_OPER)
 334                                 start_ed_unlink (ohci, urb_priv->ed);
 335                 }
 336         } else {
 337                 /*
 338                  * with HC dead, we won't respect hc queue pointers
 339                  * any more ... just clean up every urb's memory.
 340                  */
 341                 if (urb->hcpriv)
 342                         finish_urb (ohci, urb, NULL);
 343         }
 344         spin_unlock_irqrestore (&ohci->lock, flags);
 345         return 0;
 346 }
 347
 348 /*-------------------------------------------------------------------------*/
 349
 350 /* frees config/altsetting state for endpoints,
 351  * including ED memory, dummy TD, and bulk/intr data toggle
 352  */
 353
 354 static void
 355 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 356 {
 357         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 358         unsigned long           flags;
 359         struct ed               *ed = ep->hcpriv;
 360         unsigned                limit = 1000;
 361
 362         /* ASSERT:  any requests/urbs are being unlinked */
 363         /* ASSERT:  nobody can be submitting urbs for this any more */
 364
 365         if (!ed)
 366                 return;
 367
 368 rescan:
 369         spin_lock_irqsave (&ohci->lock, flags);
 370
 371         if (!HC_IS_RUNNING (hcd->state)) {
 372 sanitize:
 373                 ed->state = ED_IDLE;
 374                 finish_unlinks (ohci, 0, NULL);
 375         }
 376
 377         switch (ed->state) {
 378         case ED_UNLINK:         /* wait for hw to finish? */
 379                 /* major IRQ delivery trouble loses INTR_SF too... */
 380                 if (limit-- == 0) {
 381                         ohci_warn (ohci, "IRQ INTR_SF lossage\n");
 382                         goto sanitize;
 383                 }
 384                 spin_unlock_irqrestore (&ohci->lock, flags);
 385                 set_current_state (TASK_UNINTERRUPTIBLE);
 386                 schedule_timeout (1);
 387                 goto rescan;
 388         case ED_IDLE:           /* fully unlinked */
 389                 if (list_empty (&ed->td_list)) {
 390                         td_free (ohci, ed->dummy);
 391                         ed_free (ohci, ed);
 392                         break;
 393                 }
 394                 /* else FALL THROUGH */
 395         default:
 396                 /* caller was supposed to have unlinked any requests;
 397                  * that's not our job.  can't recover; must leak ed.
 398                  */
 399                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 400                         ed, ep->desc.bEndpointAddress, ed->state,
 401                         list_empty (&ed->td_list) ? "" : " (has tds)");
 402                 td_free (ohci, ed->dummy);
 403                 break;
 404         }
 405         ep->hcpriv = NULL;
 406         spin_unlock_irqrestore (&ohci->lock, flags);
 407         return;
 408 }
 409
 410 static int ohci_get_frame (struct usb_hcd *hcd)
 411 {
 412         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 413
 414         return ohci_frame_no(ohci);
 415 }
 416
 417 static void ohci_usb_reset (struct ohci_hcd *ohci)
 418 {
 419         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 420         ohci->hc_control &= OHCI_CTRL_RWC;
 421         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 422 }
 423
 424 /* reboot notifier forcibly disables IRQs and DMA, helping kexec and
 425  * other cases where the next software may expect clean state from the
 426  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 427  */
 428 static int
 429 ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
 430 {
 431         struct ohci_hcd *ohci;
 432
 433         ohci = container_of (block, struct ohci_hcd, reboot_notifier);
 434         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 435         ohci_usb_reset (ohci);
 436         /* flush the writes */
 437         (void) ohci_readl (ohci, &ohci->regs->control);
 438         return 0;
 439 }
 440
 441 /*-------------------------------------------------------------------------*
 442  * HC functions
 443  *-------------------------------------------------------------------------*/
 444
 445 /* init memory, and kick BIOS/SMM off */
 446
 447 static int ohci_init (struct ohci_hcd *ohci)
 448 {
 449         int ret;
 450
 451         disable (ohci);
 452         ohci->regs = ohci_to_hcd(ohci)->regs;
 453         ohci->next_statechange = jiffies;
 454
 455 #ifndef IR_DISABLE
 456         /* SMM owns the HC?  not for long! */
 457         if (!no_handshake && ohci_readl (ohci,
 458                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 459                 u32 temp;
 460
 461                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 462
 463                 /* this timeout is arbitrary.  we make it long, so systems
 464                  * depending on usb keyboards may be usable even if the
 465                  * BIOS/SMM code seems pretty broken.
 466                  */
 467                 temp = 500;     /* arbitrary: five seconds */
 468
 469                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 470                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 471                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 472                         msleep (10);
 473                         if (--temp == 0) {
 474                                 ohci_err (ohci, "USB HC takeover failed!"
 475                                         "  (BIOS/SMM bug)\n");
 476                                 return -EBUSY;
 477                         }
 478                 }
 479                 ohci_usb_reset (ohci);
 480         }
 481 #endif
 482
 483         /* Disable HC interrupts */
 484         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 485         // flush the writes
 486         (void) ohci_readl (ohci, &ohci->regs->control);
 487
 488         if (ohci->hcca)
 489                 return 0;
 490
 491         ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller,
 492                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
 493         if (!ohci->hcca)
 494                 return -ENOMEM;
 495
 496         if ((ret = ohci_mem_init (ohci)) < 0)
 497                 ohci_stop (ohci_to_hcd(ohci));
 498
 499         return ret;
 500
 501 }
 502
 503 /*-------------------------------------------------------------------------*/
 504
 505 /* Start an OHCI controller, set the BUS operational
 506  * resets USB and controller
 507  * enable interrupts
 508  * connect the virtual root hub
 509  */
 510 static int ohci_run (struct ohci_hcd *ohci)
 511 {
 512         u32                     mask, temp;
 513         struct usb_device       *udev;
 514         struct usb_bus          *bus;
 515         int                     first = ohci->fminterval == 0;
 516
 517         disable (ohci);
 518
 519         /* boot firmware should have set this up (5.1.1.3.1) */
 520         if (first) {
 521
 522                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
 523                 ohci->fminterval = temp & 0x3fff;
 524                 if (ohci->fminterval != FI)
 525                         ohci_dbg (ohci, "fminterval delta %d\n",
 526                                 ohci->fminterval - FI);
 527                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 528                 /* also: power/overcurrent flags in roothub.a */
 529         }
 530
 531         /* Reset USB nearly "by the book".  RemoteWakeupConnected
 532          * saved if boot firmware (BIOS/SMM/...) told us it's connected
 533          * (for OHCI integrated on mainboard, it normally is)
 534          */
 535         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 536         ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
 537                         hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
 538                         ohci->hc_control);
 539
 540         if (ohci->hc_control & OHCI_CTRL_RWC
 541                         && !(ohci->flags & OHCI_QUIRK_AMD756))
 542                 ohci_to_hcd(ohci)->can_wakeup = 1;
 543
 544         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 545         case OHCI_USB_OPER:
 546                 temp = 0;
 547                 break;
 548         case OHCI_USB_SUSPEND:
 549         case OHCI_USB_RESUME:
 550                 ohci->hc_control &= OHCI_CTRL_RWC;
 551                 ohci->hc_control |= OHCI_USB_RESUME;
 552                 temp = 10 /* msec wait */;
 553                 break;
 554         // case OHCI_USB_RESET:
 555         default:
 556                 ohci->hc_control &= OHCI_CTRL_RWC;
 557                 ohci->hc_control |= OHCI_USB_RESET;
 558                 temp = 50 /* msec wait */;
 559                 break;
 560         }
 561         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 562         // flush the writes
 563         (void) ohci_readl (ohci, &ohci->regs->control);
 564         msleep(temp);
 565         temp = roothub_a (ohci);
 566         if (!(temp & RH_A_NPS)) {
 567                 unsigned ports = temp & RH_A_NDP;
 568
 569                 /* power down each port */
 570                 for (temp = 0; temp < ports; temp++)
 571                         ohci_writel (ohci, RH_PS_LSDA,
 572                                 &ohci->regs->roothub.portstatus [temp]);
 573         }
 574         // flush those writes
 575         (void) ohci_readl (ohci, &ohci->regs->control);
 576         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 577
 578         /* 2msec timelimit here means no irqs/preempt */
 579         spin_lock_irq (&ohci->lock);
 580
 581 retry:
 582         /* HC Reset requires max 10 us delay */
 583         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 584         temp = 30;      /* ... allow extra time */
 585         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 586                 if (--temp == 0) {
 587                         spin_unlock_irq (&ohci->lock);
 588                         ohci_err (ohci, "USB HC reset timed out!\n");
 589                         return -1;
 590                 }
 591                 udelay (1);
 592         }
 593
 594         /* now we're in the SUSPEND state ... must go OPERATIONAL
 595          * within 2msec else HC enters RESUME
 596          *
 597          * ... but some hardware won't init fmInterval "by the book"
 598          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 599          * this if we write fmInterval after we're OPERATIONAL.
 600          * Unclear about ALi, ServerWorks, and others ... this could
 601          * easily be a longstanding bug in chip init on Linux.
 602          */
 603         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 604                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 605                 // flush those writes
 606                 (void) ohci_readl (ohci, &ohci->regs->control);
 607         }
 608
 609         /* Tell the controller where the control and bulk lists are
 610          * The lists are empty now. */
 611         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 612         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 613
 614         /* a reset clears this */
 615         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 616
 617         periodic_reinit (ohci);
 618
 619         /* some OHCI implementations are finicky about how they init.
 620          * bogus values here mean not even enumeration could work.
 621          */
 622         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 623                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 624                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 625                         ohci->flags |= OHCI_QUIRK_INITRESET;
 626                         ohci_dbg (ohci, "enabling initreset quirk\n");
 627                         goto retry;
 628                 }
 629                 spin_unlock_irq (&ohci->lock);
 630                 ohci_err (ohci, "init err (%08x %04x)\n",
 631                         ohci_readl (ohci, &ohci->regs->fminterval),
 632                         ohci_readl (ohci, &ohci->regs->periodicstart));
 633                 return -EOVERFLOW;
 634         }
 635
 636         /* start controller operations */
 637         ohci->hc_control &= OHCI_CTRL_RWC;
 638         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 639         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 640         ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
 641
 642         /* wake on ConnectStatusChange, matching external hubs */
 643         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 644
 645         /* Choose the interrupts we care about now, others later on demand */
 646         mask = OHCI_INTR_INIT;
 647         ohci_writel (ohci, mask, &ohci->regs->intrstatus);
 648         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 649
 650         /* handle root hub init quirks ... */
 651         temp = roothub_a (ohci);
 652         temp &= ~(RH_A_PSM | RH_A_OCPM);
 653         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 654                 /* NSC 87560 and maybe others */
 655                 temp |= RH_A_NOCP;
 656                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
 657                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 658         } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
 659                 /* hub power always on; required for AMD-756 and some
 660                  * Mac platforms.  ganged overcurrent reporting, if any.
 661                  */
 662                 temp |= RH_A_NPS;
 663                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 664         }
 665         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 666         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
 667                                                 &ohci->regs->roothub.b);
 668         // flush those writes
 669         (void) ohci_readl (ohci, &ohci->regs->control);
 670
 671         spin_unlock_irq (&ohci->lock);
 672
 673         // POTPGT delay is bits 24-31, in 2 ms units.
 674         mdelay ((temp >> 23) & 0x1fe);
 675         bus = &ohci_to_hcd(ohci)->self;
 676         ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
 677
 678         ohci_dump (ohci, 1);
 679
 680         udev = bus->root_hub;
 681         if (udev) {
 682                 return 0;
 683         }
 684
 685         /* connect the virtual root hub */
 686         udev = usb_alloc_dev (NULL, bus, 0);
 687         if (!udev) {
 688                 disable (ohci);
 689                 ohci->hc_control &= ~OHCI_CTRL_HCFS;
 690                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 691                 return -ENOMEM;
 692         }
 693
 694         udev->speed = USB_SPEED_FULL;
 695         if (usb_hcd_register_root_hub (udev, ohci_to_hcd(ohci)) != 0) {
 696                 usb_put_dev (udev);
 697                 disable (ohci);
 698                 ohci->hc_control &= ~OHCI_CTRL_HCFS;
 699                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 700                 return -ENODEV;
 701         }
 702
 703         register_reboot_notifier (&ohci->reboot_notifier);
 704         create_debug_files (ohci);
 705         return 0;
 706 }
 707
 708 /*-------------------------------------------------------------------------*/
 709
 710 /* an interrupt happens */
 711
 712 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
 713 {
 714         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 715         struct ohci_regs __iomem *regs = ohci->regs;
 716         int                     ints;
 717
 718         /* we can eliminate a (slow) ohci_readl()
 719            if _only_ WDH caused this irq */
 720         if ((ohci->hcca->done_head != 0)
 721                         && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
 722                                 & 0x01)) {
 723                 ints =  OHCI_INTR_WDH;
 724
 725         /* cardbus/... hardware gone before remove() */
 726         } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
 727                 disable (ohci);
 728                 ohci_dbg (ohci, "device removed!\n");
 729                 return IRQ_HANDLED;
 730
 731         /* interrupt for some other device? */
 732         } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
 733                 return IRQ_NOTMINE;
 734         }
 735
 736         if (ints & OHCI_INTR_UE) {
 737                 disable (ohci);
 738                 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 739                 // e.g. due to PCI Master/Target Abort
 740
 741                 ohci_dump (ohci, 1);
 742                 ohci_usb_reset (ohci);
 743         }
 744
 745         if (ints & OHCI_INTR_RD) {
 746                 ohci_vdbg (ohci, "resume detect\n");
 747                 if (hcd->state != HC_STATE_QUIESCING)
 748                         schedule_work(&ohci->rh_resume);
 749         }
 750
 751         if (ints & OHCI_INTR_WDH) {
 752                 if (HC_IS_RUNNING(hcd->state))
 753                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
 754                 spin_lock (&ohci->lock);
 755                 dl_done_list (ohci, ptregs);
 756                 spin_unlock (&ohci->lock);
 757                 if (HC_IS_RUNNING(hcd->state))
 758                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
 759         }
 760
 761         /* could track INTR_SO to reduce available PCI/... bandwidth */
 762
 763         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 764          * when there's still unlinking to be done (next frame).
 765          */
 766         spin_lock (&ohci->lock);
 767         if (ohci->ed_rm_list)
 768                 finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
 769         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 770                         && HC_IS_RUNNING(hcd->state))
 771                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 772         spin_unlock (&ohci->lock);
 773
 774         if (HC_IS_RUNNING(hcd->state)) {
 775                 ohci_writel (ohci, ints, &regs->intrstatus);
 776                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 777                 // flush those writes
 778                 (void) ohci_readl (ohci, &ohci->regs->control);
 779         }
 780
 781         return IRQ_HANDLED;
 782 }
 783
 784 /*-------------------------------------------------------------------------*/
 785
 786 static void ohci_stop (struct usb_hcd *hcd)
 787 {
 788         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 789
 790         ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
 791                 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
 792                 hcd->state);
 793         ohci_dump (ohci, 1);
 794
 795         flush_scheduled_work();
 796
 797         ohci_usb_reset (ohci);
 798         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 799
 800         remove_debug_files (ohci);
 801         unregister_reboot_notifier (&ohci->reboot_notifier);
 802         ohci_mem_cleanup (ohci);
 803         if (ohci->hcca) {
 804                 dma_free_coherent (hcd->self.controller,
 805                                 sizeof *ohci->hcca,
 806                                 ohci->hcca, ohci->hcca_dma);
 807                 ohci->hcca = NULL;
 808                 ohci->hcca_dma = 0;
 809         }
 810 }
 811
 812 /*-------------------------------------------------------------------------*/
 813
 814 /* must not be called from interrupt context */
 815
 816 #if     defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM)
 817
 818 static int ohci_restart (struct ohci_hcd *ohci)
 819 {
 820         int temp;
 821         int i;
 822         struct urb_priv *priv;
 823         struct usb_device *root = ohci_to_hcd(ohci)->self.root_hub;
 824
 825         /* mark any devices gone, so they do nothing till khubd disconnects.
 826          * recycle any "live" eds/tds (and urbs) right away.
 827          * later, khubd disconnect processing will recycle the other state,
 828          * (either as disconnect/reconnect, or maybe someday as a reset).
 829          */
 830         spin_lock_irq(&ohci->lock);
 831         disable (ohci);
 832         for (i = 0; i < root->maxchild; i++) {
 833                 if (root->children [i])
 834                         usb_set_device_state (root->children[i],
 835                                 USB_STATE_NOTATTACHED);
 836         }
 837         if (!list_empty (&ohci->pending))
 838                 ohci_dbg(ohci, "abort schedule...\n");
 839         list_for_each_entry (priv, &ohci->pending, pending) {
 840                 struct urb      *urb = priv->td[0]->urb;
 841                 struct ed       *ed = priv->ed;
 842
 843                 switch (ed->state) {
 844                 case ED_OPER:
 845                         ed->state = ED_UNLINK;
 846                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 847                         ed_deschedule (ohci, ed);
 848
 849                         ed->ed_next = ohci->ed_rm_list;
 850                         ed->ed_prev = NULL;
 851                         ohci->ed_rm_list = ed;
 852                         /* FALLTHROUGH */
 853                 case ED_UNLINK:
 854                         break;
 855                 default:
 856                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 857                                         ed, ed->state);
 858                 }
 859
 860                 spin_lock (&urb->lock);
 861                 urb->status = -ESHUTDOWN;
 862                 spin_unlock (&urb->lock);
 863         }
 864         finish_unlinks (ohci, 0, NULL);
 865         spin_unlock_irq(&ohci->lock);
 866
 867         /* paranoia, in case that didn't work: */
 868
 869         /* empty the interrupt branches */
 870         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
 871         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
 872
 873         /* no EDs to remove */
 874         ohci->ed_rm_list = NULL;
 875
 876         /* empty control and bulk lists */
 877         ohci->ed_controltail = NULL;
 878         ohci->ed_bulktail    = NULL;
 879
 880         if ((temp = ohci_run (ohci)) < 0) {
 881                 ohci_err (ohci, "can't restart, %d\n", temp);
 882                 return temp;
 883         } else {
 884                 /* here we "know" root ports should always stay powered,
 885                  * and that if we try to turn them back on the root hub
 886                  * will respond to CSC processing.
 887                  */
 888                 i = roothub_a (ohci) & RH_A_NDP;
 889                 while (i--)
 890                         ohci_writel (ohci, RH_PS_PSS,
 891                                 &ohci->regs->roothub.portstatus [temp]);
 892                 ohci_dbg (ohci, "restart complete\n");
 893         }
 894         return 0;
 895 }
 896 #endif
 897
 898 /*-------------------------------------------------------------------------*/
 899
 900 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
 901
 902 MODULE_AUTHOR (DRIVER_AUTHOR);
 903 MODULE_DESCRIPTION (DRIVER_INFO);
 904 MODULE_LICENSE ("GPL");
 905
 906 #ifdef CONFIG_PCI
 907 #include "ohci-pci.c"
 908 #endif
 909
 910 #ifdef CONFIG_SA1111
 911 #include "ohci-sa1111.c"
 912 #endif
 913
 914 #ifdef CONFIG_ARCH_OMAP
 915 #include "ohci-omap.c"
 916 #endif
 917
 918 #ifdef CONFIG_ARCH_LH7A404
 919 #include "ohci-lh7a404.c"
 920 #endif
 921
 922 #ifdef CONFIG_PXA27x
 923 #include "ohci-pxa27x.c"
 924 #endif
 925
 926 #ifdef CONFIG_SOC_AU1X00
 927 #include "ohci-au1xxx.c"
 928 #endif
 929
 930 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
 931 #include "ohci-ppc-soc.c"
 932 #endif
 933
 934 #if !(defined(CONFIG_PCI) \
 935       || defined(CONFIG_SA1111) \
 936       || defined(CONFIG_ARCH_OMAP) \
 937       || defined (CONFIG_ARCH_LH7A404) \
 938       || defined (CONFIG_PXA27x) \
 939       || defined (CONFIG_SOC_AU1X00) \
 940       || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \
 941         )
 942 #error "missing bus glue for ohci-hcd"
 943 #endif