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   1 #ifndef __HEAD_BOOKE_H__
   2 #define __HEAD_BOOKE_H__
   3
   4 /*
   5  * Macros used for common Book-e exception handling
   6  */
   7
   8 #define SET_IVOR(vector_number, vector_label)           \
   9                 li      r26,vector_label@l;             \
  10                 mtspr   SPRN_IVOR##vector_number,r26;   \
  11                 sync
  12
  13 #define NORMAL_EXCEPTION_PROLOG                                              \
  14         mtspr   SPRN_SPRG0,r10;         /* save two registers to work with */\
  15         mtspr   SPRN_SPRG1,r11;                                              \
  16         mtspr   SPRN_SPRG4W,r1;                                              \
  17         mfcr    r10;                    /* save CR in r10 for now          */\
  18         mfspr   r11,SPRN_SRR1;          /* check whether user or kernel    */\
  19         andi.   r11,r11,MSR_PR;                                              \
  20         beq     1f;                                                          \
  21         mfspr   r1,SPRN_SPRG3;          /* if from user, start at top of   */\
  22         lwz     r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack   */\
  23         addi    r1,r1,THREAD_SIZE;                                           \
  24 1:      subi    r1,r1,INT_FRAME_SIZE;   /* Allocate an exception frame     */\
  25         mr      r11,r1;                                                      \
  26         stw     r10,_CCR(r11);          /* save various registers          */\
  27         stw     r12,GPR12(r11);                                              \
  28         stw     r9,GPR9(r11);                                                \
  29         mfspr   r10,SPRN_SPRG0;                                              \
  30         stw     r10,GPR10(r11);                                              \
  31         mfspr   r12,SPRN_SPRG1;                                              \
  32         stw     r12,GPR11(r11);                                              \
  33         mflr    r10;                                                         \
  34         stw     r10,_LINK(r11);                                              \
  35         mfspr   r10,SPRN_SPRG4R;                                             \
  36         mfspr   r12,SPRN_SRR0;                                               \
  37         stw     r10,GPR1(r11);                                               \
  38         mfspr   r9,SPRN_SRR1;                                                \
  39         stw     r10,0(r11);                                                  \
  40         rlwinm  r9,r9,0,14,12;          /* clear MSR_WE (necessary?)       */\
  41         stw     r0,GPR0(r11);                                                \
  42         SAVE_4GPRS(3, r11);                                                  \
  43         SAVE_2GPRS(7, r11)
  44
  45 /* To handle the additional exception priority levels on 40x and Book-E
  46  * processors we allocate a stack per additional priority level.
  47  *
  48  * On 40x critical is the only additional level
  49  * On 44x/e500 we have critical and machine check
  50  * On e200 we have critical and debug (machine check occurs via critical)
  51  *
  52  * Additionally we reserve a SPRG for each priority level so we can free up a
  53  * GPR to use as the base for indirect access to the exception stacks.  This
  54  * is necessary since the MMU is always on, for Book-E parts, and the stacks
  55  * are offset from KERNELBASE.
  56  *
  57  * There is some space optimization to be had here if desired.  However
  58  * to allow for a common kernel with support for debug exceptions either
  59  * going to critical or their own debug level we aren't currently
  60  * providing configurations that micro-optimize space usage.
  61  */
  62
  63 /* CRIT_SPRG only used in critical exception handling */
  64 #define CRIT_SPRG       SPRN_SPRG2
  65 /* MCHECK_SPRG only used in machine check exception handling */
  66 #define MCHECK_SPRG     SPRN_SPRG6W
  67
  68 #define MCHECK_STACK_BASE       mcheckirq_ctx
  69 #define CRIT_STACK_BASE         critirq_ctx
  70
  71 /* only on e200 for now */
  72 #define DEBUG_STACK_BASE        dbgirq_ctx
  73 #define DEBUG_SPRG              SPRN_SPRG6W
  74
  75 #ifdef CONFIG_SMP
  76 #define BOOKE_LOAD_EXC_LEVEL_STACK(level)               \
  77         mfspr   r8,SPRN_PIR;                            \
  78         slwi    r8,r8,2;                                \
  79         addis   r8,r8,level##_STACK_BASE@ha;            \
  80         lwz     r8,level##_STACK_BASE@l(r8);            \
  81         addi    r8,r8,THREAD_SIZE;
  82 #else
  83 #define BOOKE_LOAD_EXC_LEVEL_STACK(level)               \
  84         lis     r8,level##_STACK_BASE@ha;               \
  85         lwz     r8,level##_STACK_BASE@l(r8);            \
  86         addi    r8,r8,THREAD_SIZE;
  87 #endif
  88
  89 /*
  90  * Exception prolog for critical/machine check exceptions.  This is a
  91  * little different from the normal exception prolog above since a
  92  * critical/machine check exception can potentially occur at any point
  93  * during normal exception processing. Thus we cannot use the same SPRG
  94  * registers as the normal prolog above. Instead we use a portion of the
  95  * critical/machine check exception stack at low physical addresses.
  96  */
  97 #define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \
  98         mtspr   exc_level##_SPRG,r8;                                         \
  99         BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \
 100         stw     r10,GPR10-INT_FRAME_SIZE(r8);                                \
 101         stw     r11,GPR11-INT_FRAME_SIZE(r8);                                \
 102         mfcr    r10;                    /* save CR in r10 for now          */\
 103         mfspr   r11,exc_level_srr1;     /* check whether user or kernel    */\
 104         andi.   r11,r11,MSR_PR;                                              \
 105         mr      r11,r8;                                                      \
 106         mfspr   r8,exc_level##_SPRG;                                         \
 107         beq     1f;                                                          \
 108         /* COMING FROM USER MODE */                                          \
 109         mfspr   r11,SPRN_SPRG3;         /* if from user, start at top of   */\
 110         lwz     r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
 111         addi    r11,r11,THREAD_SIZE;                                         \
 112 1:      subi    r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame     */\
 113         stw     r10,_CCR(r11);          /* save various registers          */\
 114         stw     r12,GPR12(r11);                                              \
 115         stw     r9,GPR9(r11);                                                \
 116         mflr    r10;                                                         \
 117         stw     r10,_LINK(r11);                                              \
 118         mfspr   r12,SPRN_DEAR;          /* save DEAR and ESR in the frame  */\
 119         stw     r12,_DEAR(r11);         /* since they may have had stuff   */\
 120         mfspr   r9,SPRN_ESR;            /* in them at the point where the  */\
 121         stw     r9,_ESR(r11);           /* exception was taken             */\
 122         mfspr   r12,exc_level_srr0;                                          \
 123         stw     r1,GPR1(r11);                                                \
 124         mfspr   r9,exc_level_srr1;                                           \
 125         stw     r1,0(r11);                                                   \
 126         mr      r1,r11;                                                      \
 127         rlwinm  r9,r9,0,14,12;          /* clear MSR_WE (necessary?)       */\
 128         stw     r0,GPR0(r11);                                                \
 129         SAVE_4GPRS(3, r11);                                                  \
 130         SAVE_2GPRS(7, r11)
 131
 132 #define CRITICAL_EXCEPTION_PROLOG \
 133                 EXC_LEVEL_EXCEPTION_PROLOG(CRIT, SPRN_CSRR0, SPRN_CSRR1)
 134 #define DEBUG_EXCEPTION_PROLOG \
 135                 EXC_LEVEL_EXCEPTION_PROLOG(DEBUG, SPRN_DSRR0, SPRN_DSRR1)
 136 #define MCHECK_EXCEPTION_PROLOG \
 137                 EXC_LEVEL_EXCEPTION_PROLOG(MCHECK, SPRN_MCSRR0, SPRN_MCSRR1)
 138
 139 /*
 140  * Exception vectors.
 141  */
 142 #define START_EXCEPTION(label)                                               \
 143         .align 5;                                                            \
 144 label:
 145
 146 #define FINISH_EXCEPTION(func)                                  \
 147         bl      transfer_to_handler_full;                       \
 148         .long   func;                                           \
 149         .long   ret_from_except_full
 150
 151 #define EXCEPTION(n, label, hdlr, xfer)                         \
 152         START_EXCEPTION(label);                                 \
 153         NORMAL_EXCEPTION_PROLOG;                                \
 154         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 155         xfer(n, hdlr)
 156
 157 #define CRITICAL_EXCEPTION(n, label, hdlr)                      \
 158         START_EXCEPTION(label);                                 \
 159         CRITICAL_EXCEPTION_PROLOG;                              \
 160         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 161         EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
 162                           NOCOPY, crit_transfer_to_handler, \
 163                           ret_from_crit_exc)
 164
 165 #define MCHECK_EXCEPTION(n, label, hdlr)                        \
 166         START_EXCEPTION(label);                                 \
 167         MCHECK_EXCEPTION_PROLOG;                                \
 168         mfspr   r5,SPRN_ESR;                                    \
 169         stw     r5,_ESR(r11);                                   \
 170         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 171         EXC_XFER_TEMPLATE(hdlr, n+4, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
 172                           NOCOPY, mcheck_transfer_to_handler,   \
 173                           ret_from_mcheck_exc)
 174
 175 #define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret)   \
 176         li      r10,trap;                                       \
 177         stw     r10,_TRAP(r11);                                 \
 178         lis     r10,msr@h;                                      \
 179         ori     r10,r10,msr@l;                                  \
 180         copyee(r10, r9);                                        \
 181         bl      tfer;                                           \
 182         .long   hdlr;                                           \
 183         .long   ret
 184
 185 #define COPY_EE(d, s)           rlwimi d,s,0,16,16
 186 #define NOCOPY(d, s)
 187
 188 #define EXC_XFER_STD(n, hdlr)           \
 189         EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \
 190                           ret_from_except_full)
 191
 192 #define EXC_XFER_LITE(n, hdlr)          \
 193         EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \
 194                           ret_from_except)
 195
 196 #define EXC_XFER_EE(n, hdlr)            \
 197         EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \
 198                           ret_from_except_full)
 199
 200 #define EXC_XFER_EE_LITE(n, hdlr)       \
 201         EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \
 202                           ret_from_except)
 203
 204 /* Check for a single step debug exception while in an exception
 205  * handler before state has been saved.  This is to catch the case
 206  * where an instruction that we are trying to single step causes
 207  * an exception (eg ITLB/DTLB miss) and thus the first instruction of
 208  * the exception handler generates a single step debug exception.
 209  *
 210  * If we get a debug trap on the first instruction of an exception handler,
 211  * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is
 212  * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR).
 213  * The exception handler was handling a non-critical interrupt, so it will
 214  * save (and later restore) the MSR via SPRN_CSRR1, which will still have
 215  * the MSR_DE bit set.
 216  */
 217 #define DEBUG_DEBUG_EXCEPTION                                                 \
 218         START_EXCEPTION(DebugDebug);                                          \
 219         DEBUG_EXCEPTION_PROLOG;                                               \
 220                                                                               \
 221         /*                                                                    \
 222          * If there is a single step or branch-taken exception in an          \
 223          * exception entry sequence, it was probably meant to apply to        \
 224          * the code where the exception occurred (since exception entry       \
 225          * doesn't turn off DE automatically).  We simulate the effect        \
 226          * of turning off DE on entry to an exception handler by turning      \
 227          * off DE in the CSRR1 value and clearing the debug status.           \
 228          */                                                                   \
 229         mfspr   r10,SPRN_DBSR;          /* check single-step/branch taken */  \
 230         andis.  r10,r10,DBSR_IC@h;                                            \
 231         beq+    2f;                                                           \
 232                                                                               \
 233         lis     r10,KERNELBASE@h;       /* check if exception in vectors */   \
 234         ori     r10,r10,KERNELBASE@l;                                         \
 235         cmplw   r12,r10;                                                      \
 236         blt+    2f;                     /* addr below exception vectors */    \
 237                                                                               \
 238         lis     r10,DebugDebug@h;                                             \
 239         ori     r10,r10,DebugDebug@l;                                         \
 240         cmplw   r12,r10;                                                      \
 241         bgt+    2f;                     /* addr above exception vectors */    \
 242                                                                               \
 243         /* here it looks like we got an inappropriate debug exception. */     \
 244 1:      rlwinm  r9,r9,0,~MSR_DE;        /* clear DE in the CDRR1 value */     \
 245         lis     r10,DBSR_IC@h;          /* clear the IC event */              \
 246         mtspr   SPRN_DBSR,r10;                                                \
 247         /* restore state and get out */                                       \
 248         lwz     r10,_CCR(r11);                                                \
 249         lwz     r0,GPR0(r11);                                                 \
 250         lwz     r1,GPR1(r11);                                                 \
 251         mtcrf   0x80,r10;                                                     \
 252         mtspr   SPRN_DSRR0,r12;                                               \
 253         mtspr   SPRN_DSRR1,r9;                                                \
 254         lwz     r9,GPR9(r11);                                                 \
 255         lwz     r12,GPR12(r11);                                               \
 256         mtspr   DEBUG_SPRG,r8;                                                \
 257         BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \
 258         lwz     r10,GPR10-INT_FRAME_SIZE(r8);                                 \
 259         lwz     r11,GPR11-INT_FRAME_SIZE(r8);                                 \
 260         mfspr   r8,DEBUG_SPRG;                                                \
 261                                                                               \
 262         RFDI;                                                                 \
 263         b       .;                                                            \
 264                                                                               \
 265         /* continue normal handling for a critical exception... */            \
 266 2:      mfspr   r4,SPRN_DBSR;                                                 \
 267         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 268         EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
 269
 270 #define DEBUG_CRIT_EXCEPTION                                                  \
 271         START_EXCEPTION(DebugCrit);                                           \
 272         CRITICAL_EXCEPTION_PROLOG;                                            \
 273                                                                               \
 274         /*                                                                    \
 275          * If there is a single step or branch-taken exception in an          \
 276          * exception entry sequence, it was probably meant to apply to        \
 277          * the code where the exception occurred (since exception entry       \
 278          * doesn't turn off DE automatically).  We simulate the effect        \
 279          * of turning off DE on entry to an exception handler by turning      \
 280          * off DE in the CSRR1 value and clearing the debug status.           \
 281          */                                                                   \
 282         mfspr   r10,SPRN_DBSR;          /* check single-step/branch taken */  \
 283         andis.  r10,r10,DBSR_IC@h;                                            \
 284         beq+    2f;                                                           \
 285                                                                               \
 286         lis     r10,KERNELBASE@h;       /* check if exception in vectors */   \
 287         ori     r10,r10,KERNELBASE@l;                                         \
 288         cmplw   r12,r10;                                                      \
 289         blt+    2f;                     /* addr below exception vectors */    \
 290                                                                               \
 291         lis     r10,DebugCrit@h;                                                      \
 292         ori     r10,r10,DebugCrit@l;                                          \
 293         cmplw   r12,r10;                                                      \
 294         bgt+    2f;                     /* addr above exception vectors */    \
 295                                                                               \
 296         /* here it looks like we got an inappropriate debug exception. */     \
 297 1:      rlwinm  r9,r9,0,~MSR_DE;        /* clear DE in the CSRR1 value */     \
 298         lis     r10,DBSR_IC@h;          /* clear the IC event */              \
 299         mtspr   SPRN_DBSR,r10;                                                \
 300         /* restore state and get out */                                       \
 301         lwz     r10,_CCR(r11);                                                \
 302         lwz     r0,GPR0(r11);                                                 \
 303         lwz     r1,GPR1(r11);                                                 \
 304         mtcrf   0x80,r10;                                                     \
 305         mtspr   SPRN_CSRR0,r12;                                               \
 306         mtspr   SPRN_CSRR1,r9;                                                \
 307         lwz     r9,GPR9(r11);                                                 \
 308         lwz     r12,GPR12(r11);                                               \
 309         mtspr   CRIT_SPRG,r8;                                                 \
 310         BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */  \
 311         lwz     r10,GPR10-INT_FRAME_SIZE(r8);                                 \
 312         lwz     r11,GPR11-INT_FRAME_SIZE(r8);                                 \
 313         mfspr   r8,CRIT_SPRG;                                                 \
 314                                                                               \
 315         rfci;                                                                 \
 316         b       .;                                                            \
 317                                                                               \
 318         /* continue normal handling for a critical exception... */            \
 319 2:      mfspr   r4,SPRN_DBSR;                                                 \
 320         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 321         EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
 322
 323 #define INSTRUCTION_STORAGE_EXCEPTION                                         \
 324         START_EXCEPTION(InstructionStorage)                                   \
 325         NORMAL_EXCEPTION_PROLOG;                                              \
 326         mfspr   r5,SPRN_ESR;            /* Grab the ESR and save it */        \
 327         stw     r5,_ESR(r11);                                                 \
 328         mr      r4,r12;                 /* Pass SRR0 as arg2 */               \
 329         li      r5,0;                   /* Pass zero as arg3 */               \
 330         EXC_XFER_EE_LITE(0x0400, handle_page_fault)
 331
 332 #define ALIGNMENT_EXCEPTION                                                   \
 333         START_EXCEPTION(Alignment)                                            \
 334         NORMAL_EXCEPTION_PROLOG;                                              \
 335         mfspr   r4,SPRN_DEAR;           /* Grab the DEAR and save it */       \
 336         stw     r4,_DEAR(r11);                                                \
 337         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 338         EXC_XFER_EE(0x0600, alignment_exception)
 339
 340 #define PROGRAM_EXCEPTION                                                     \
 341         START_EXCEPTION(Program)                                              \
 342         NORMAL_EXCEPTION_PROLOG;                                              \
 343         mfspr   r4,SPRN_ESR;            /* Grab the ESR and save it */        \
 344         stw     r4,_ESR(r11);                                                 \
 345         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 346         EXC_XFER_STD(0x0700, program_check_exception)
 347
 348 #define DECREMENTER_EXCEPTION                                                 \
 349         START_EXCEPTION(Decrementer)                                          \
 350         NORMAL_EXCEPTION_PROLOG;                                              \
 351         lis     r0,TSR_DIS@h;           /* Setup the DEC interrupt mask */    \
 352         mtspr   SPRN_TSR,r0;            /* Clear the DEC interrupt */         \
 353         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 354         EXC_XFER_LITE(0x0900, timer_interrupt)
 355
 356 #define FP_UNAVAILABLE_EXCEPTION                                              \
 357         START_EXCEPTION(FloatingPointUnavailable)                             \
 358         NORMAL_EXCEPTION_PROLOG;                                              \
 359         bne     load_up_fpu;            /* if from user, just load it up */   \
 360         addi    r3,r1,STACK_FRAME_OVERHEAD;                                   \
 361         EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
 362
 363 #endif /* __HEAD_BOOKE_H__ */