Merge branch 'linux-2.6'
[linux-2.6] / arch / arm / mach-at91 / at91rm9200_devices.c
1 /*
2  * arch/arm/mach-at91/at91rm9200_devices.c
3  *
4  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5  *  Copyright (C) 2005 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <asm/arch/board.h>
21 #include <asm/arch/gpio.h>
22 #include <asm/arch/at91rm9200.h>
23 #include <asm/arch/at91rm9200_mc.h>
24
25 #include "generic.h"
26
27
28 /* --------------------------------------------------------------------
29  *  USB Host
30  * -------------------------------------------------------------------- */
31
32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33 static u64 ohci_dmamask = DMA_BIT_MASK(32);
34 static struct at91_usbh_data usbh_data;
35
36 static struct resource usbh_resources[] = {
37         [0] = {
38                 .start  = AT91RM9200_UHP_BASE,
39                 .end    = AT91RM9200_UHP_BASE + SZ_1M - 1,
40                 .flags  = IORESOURCE_MEM,
41         },
42         [1] = {
43                 .start  = AT91RM9200_ID_UHP,
44                 .end    = AT91RM9200_ID_UHP,
45                 .flags  = IORESOURCE_IRQ,
46         },
47 };
48
49 static struct platform_device at91rm9200_usbh_device = {
50         .name           = "at91_ohci",
51         .id             = -1,
52         .dev            = {
53                                 .dma_mask               = &ohci_dmamask,
54                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
55                                 .platform_data          = &usbh_data,
56         },
57         .resource       = usbh_resources,
58         .num_resources  = ARRAY_SIZE(usbh_resources),
59 };
60
61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
62 {
63         if (!data)
64                 return;
65
66         usbh_data = *data;
67         platform_device_register(&at91rm9200_usbh_device);
68 }
69 #else
70 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
71 #endif
72
73
74 /* --------------------------------------------------------------------
75  *  USB Device (Gadget)
76  * -------------------------------------------------------------------- */
77
78 #ifdef CONFIG_USB_GADGET_AT91
79 static struct at91_udc_data udc_data;
80
81 static struct resource udc_resources[] = {
82         [0] = {
83                 .start  = AT91RM9200_BASE_UDP,
84                 .end    = AT91RM9200_BASE_UDP + SZ_16K - 1,
85                 .flags  = IORESOURCE_MEM,
86         },
87         [1] = {
88                 .start  = AT91RM9200_ID_UDP,
89                 .end    = AT91RM9200_ID_UDP,
90                 .flags  = IORESOURCE_IRQ,
91         },
92 };
93
94 static struct platform_device at91rm9200_udc_device = {
95         .name           = "at91_udc",
96         .id             = -1,
97         .dev            = {
98                                 .platform_data          = &udc_data,
99         },
100         .resource       = udc_resources,
101         .num_resources  = ARRAY_SIZE(udc_resources),
102 };
103
104 void __init at91_add_device_udc(struct at91_udc_data *data)
105 {
106         if (!data)
107                 return;
108
109         if (data->vbus_pin) {
110                 at91_set_gpio_input(data->vbus_pin, 0);
111                 at91_set_deglitch(data->vbus_pin, 1);
112         }
113         if (data->pullup_pin)
114                 at91_set_gpio_output(data->pullup_pin, 0);
115
116         udc_data = *data;
117         platform_device_register(&at91rm9200_udc_device);
118 }
119 #else
120 void __init at91_add_device_udc(struct at91_udc_data *data) {}
121 #endif
122
123
124 /* --------------------------------------------------------------------
125  *  Ethernet
126  * -------------------------------------------------------------------- */
127
128 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
129 static u64 eth_dmamask = DMA_BIT_MASK(32);
130 static struct at91_eth_data eth_data;
131
132 static struct resource eth_resources[] = {
133         [0] = {
134                 .start  = AT91_VA_BASE_EMAC,
135                 .end    = AT91_VA_BASE_EMAC + SZ_16K - 1,
136                 .flags  = IORESOURCE_MEM,
137         },
138         [1] = {
139                 .start  = AT91RM9200_ID_EMAC,
140                 .end    = AT91RM9200_ID_EMAC,
141                 .flags  = IORESOURCE_IRQ,
142         },
143 };
144
145 static struct platform_device at91rm9200_eth_device = {
146         .name           = "at91_ether",
147         .id             = -1,
148         .dev            = {
149                                 .dma_mask               = &eth_dmamask,
150                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
151                                 .platform_data          = &eth_data,
152         },
153         .resource       = eth_resources,
154         .num_resources  = ARRAY_SIZE(eth_resources),
155 };
156
157 void __init at91_add_device_eth(struct at91_eth_data *data)
158 {
159         if (!data)
160                 return;
161
162         if (data->phy_irq_pin) {
163                 at91_set_gpio_input(data->phy_irq_pin, 0);
164                 at91_set_deglitch(data->phy_irq_pin, 1);
165         }
166
167         /* Pins used for MII and RMII */
168         at91_set_A_periph(AT91_PIN_PA16, 0);    /* EMDIO */
169         at91_set_A_periph(AT91_PIN_PA15, 0);    /* EMDC */
170         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERXER */
171         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ERX1 */
172         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ERX0 */
173         at91_set_A_periph(AT91_PIN_PA11, 0);    /* ECRS_ECRSDV */
174         at91_set_A_periph(AT91_PIN_PA10, 0);    /* ETX1 */
175         at91_set_A_periph(AT91_PIN_PA9, 0);     /* ETX0 */
176         at91_set_A_periph(AT91_PIN_PA8, 0);     /* ETXEN */
177         at91_set_A_periph(AT91_PIN_PA7, 0);     /* ETXCK_EREFCK */
178
179         if (!data->is_rmii) {
180                 at91_set_B_periph(AT91_PIN_PB19, 0);    /* ERXCK */
181                 at91_set_B_periph(AT91_PIN_PB18, 0);    /* ECOL */
182                 at91_set_B_periph(AT91_PIN_PB17, 0);    /* ERXDV */
183                 at91_set_B_periph(AT91_PIN_PB16, 0);    /* ERX3 */
184                 at91_set_B_periph(AT91_PIN_PB15, 0);    /* ERX2 */
185                 at91_set_B_periph(AT91_PIN_PB14, 0);    /* ETXER */
186                 at91_set_B_periph(AT91_PIN_PB13, 0);    /* ETX3 */
187                 at91_set_B_periph(AT91_PIN_PB12, 0);    /* ETX2 */
188         }
189
190         eth_data = *data;
191         platform_device_register(&at91rm9200_eth_device);
192 }
193 #else
194 void __init at91_add_device_eth(struct at91_eth_data *data) {}
195 #endif
196
197
198 /* --------------------------------------------------------------------
199  *  Compact Flash / PCMCIA
200  * -------------------------------------------------------------------- */
201
202 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
203 static struct at91_cf_data cf_data;
204
205 #define CF_BASE         AT91_CHIPSELECT_4
206
207 static struct resource cf_resources[] = {
208         [0] = {
209                 .start  = CF_BASE,
210                 /* ties up CS4, CS5 and CS6 */
211                 .end    = CF_BASE + (0x30000000 - 1),
212                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
213         },
214 };
215
216 static struct platform_device at91rm9200_cf_device = {
217         .name           = "at91_cf",
218         .id             = -1,
219         .dev            = {
220                                 .platform_data          = &cf_data,
221         },
222         .resource       = cf_resources,
223         .num_resources  = ARRAY_SIZE(cf_resources),
224 };
225
226 void __init at91_add_device_cf(struct at91_cf_data *data)
227 {
228         unsigned int csa;
229
230         if (!data)
231                 return;
232
233         data->chipselect = 4;           /* can only use EBI ChipSelect 4 */
234
235         /* CF takes over CS4, CS5, CS6 */
236         csa = at91_sys_read(AT91_EBI_CSA);
237         at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
238
239         /*
240          * Static memory controller timing adjustments.
241          * REVISIT:  these timings are in terms of MCK cycles, so
242          * when MCK changes (cpufreq etc) so must these values...
243          */
244         at91_sys_write(AT91_SMC_CSR(4),
245                                   AT91_SMC_ACSS_STD
246                                 | AT91_SMC_DBW_16
247                                 | AT91_SMC_BAT
248                                 | AT91_SMC_WSEN
249                                 | AT91_SMC_NWS_(32)     /* wait states */
250                                 | AT91_SMC_RWSETUP_(6)  /* setup time */
251                                 | AT91_SMC_RWHOLD_(4)   /* hold time */
252         );
253
254         /* input/irq */
255         if (data->irq_pin) {
256                 at91_set_gpio_input(data->irq_pin, 1);
257                 at91_set_deglitch(data->irq_pin, 1);
258         }
259         at91_set_gpio_input(data->det_pin, 1);
260         at91_set_deglitch(data->det_pin, 1);
261
262         /* outputs, initially off */
263         if (data->vcc_pin)
264                 at91_set_gpio_output(data->vcc_pin, 0);
265         at91_set_gpio_output(data->rst_pin, 0);
266
267         /* force poweron defaults for these pins ... */
268         at91_set_A_periph(AT91_PIN_PC9, 0);     /* A25/CFRNW */
269         at91_set_A_periph(AT91_PIN_PC10, 0);    /* NCS4/CFCS */
270         at91_set_A_periph(AT91_PIN_PC11, 0);    /* NCS5/CFCE1 */
271         at91_set_A_periph(AT91_PIN_PC12, 0);    /* NCS6/CFCE2 */
272
273         /* nWAIT is _not_ a default setting */
274         at91_set_A_periph(AT91_PIN_PC6, 1);     /* nWAIT */
275
276         cf_data = *data;
277         platform_device_register(&at91rm9200_cf_device);
278 }
279 #else
280 void __init at91_add_device_cf(struct at91_cf_data *data) {}
281 #endif
282
283
284 /* --------------------------------------------------------------------
285  *  MMC / SD
286  * -------------------------------------------------------------------- */
287
288 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
289 static u64 mmc_dmamask = DMA_BIT_MASK(32);
290 static struct at91_mmc_data mmc_data;
291
292 static struct resource mmc_resources[] = {
293         [0] = {
294                 .start  = AT91RM9200_BASE_MCI,
295                 .end    = AT91RM9200_BASE_MCI + SZ_16K - 1,
296                 .flags  = IORESOURCE_MEM,
297         },
298         [1] = {
299                 .start  = AT91RM9200_ID_MCI,
300                 .end    = AT91RM9200_ID_MCI,
301                 .flags  = IORESOURCE_IRQ,
302         },
303 };
304
305 static struct platform_device at91rm9200_mmc_device = {
306         .name           = "at91_mci",
307         .id             = -1,
308         .dev            = {
309                                 .dma_mask               = &mmc_dmamask,
310                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
311                                 .platform_data          = &mmc_data,
312         },
313         .resource       = mmc_resources,
314         .num_resources  = ARRAY_SIZE(mmc_resources),
315 };
316
317 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
318 {
319         if (!data)
320                 return;
321
322         /* input/irq */
323         if (data->det_pin) {
324                 at91_set_gpio_input(data->det_pin, 1);
325                 at91_set_deglitch(data->det_pin, 1);
326         }
327         if (data->wp_pin)
328                 at91_set_gpio_input(data->wp_pin, 1);
329         if (data->vcc_pin)
330                 at91_set_gpio_output(data->vcc_pin, 0);
331
332         /* CLK */
333         at91_set_A_periph(AT91_PIN_PA27, 0);
334
335         if (data->slot_b) {
336                 /* CMD */
337                 at91_set_B_periph(AT91_PIN_PA8, 1);
338
339                 /* DAT0, maybe DAT1..DAT3 */
340                 at91_set_B_periph(AT91_PIN_PA9, 1);
341                 if (data->wire4) {
342                         at91_set_B_periph(AT91_PIN_PA10, 1);
343                         at91_set_B_periph(AT91_PIN_PA11, 1);
344                         at91_set_B_periph(AT91_PIN_PA12, 1);
345                 }
346         } else {
347                 /* CMD */
348                 at91_set_A_periph(AT91_PIN_PA28, 1);
349
350                 /* DAT0, maybe DAT1..DAT3 */
351                 at91_set_A_periph(AT91_PIN_PA29, 1);
352                 if (data->wire4) {
353                         at91_set_B_periph(AT91_PIN_PB3, 1);
354                         at91_set_B_periph(AT91_PIN_PB4, 1);
355                         at91_set_B_periph(AT91_PIN_PB5, 1);
356                 }
357         }
358
359         mmc_data = *data;
360         platform_device_register(&at91rm9200_mmc_device);
361 }
362 #else
363 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
364 #endif
365
366
367 /* --------------------------------------------------------------------
368  *  NAND / SmartMedia
369  * -------------------------------------------------------------------- */
370
371 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
372 static struct at91_nand_data nand_data;
373
374 #define NAND_BASE       AT91_CHIPSELECT_3
375
376 static struct resource nand_resources[] = {
377         {
378                 .start  = NAND_BASE,
379                 .end    = NAND_BASE + SZ_256M - 1,
380                 .flags  = IORESOURCE_MEM,
381         }
382 };
383
384 static struct platform_device at91rm9200_nand_device = {
385         .name           = "at91_nand",
386         .id             = -1,
387         .dev            = {
388                                 .platform_data  = &nand_data,
389         },
390         .resource       = nand_resources,
391         .num_resources  = ARRAY_SIZE(nand_resources),
392 };
393
394 void __init at91_add_device_nand(struct at91_nand_data *data)
395 {
396         unsigned int csa;
397
398         if (!data)
399                 return;
400
401         /* enable the address range of CS3 */
402         csa = at91_sys_read(AT91_EBI_CSA);
403         at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
404
405         /* set the bus interface characteristics */
406         at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
407                 | AT91_SMC_NWS_(5)
408                 | AT91_SMC_TDF_(1)
409                 | AT91_SMC_RWSETUP_(0)  /* tDS Data Set up Time 30 - ns */
410                 | AT91_SMC_RWHOLD_(1)   /* tDH Data Hold Time 20 - ns */
411         );
412
413         /* enable pin */
414         if (data->enable_pin)
415                 at91_set_gpio_output(data->enable_pin, 1);
416
417         /* ready/busy pin */
418         if (data->rdy_pin)
419                 at91_set_gpio_input(data->rdy_pin, 1);
420
421         /* card detect pin */
422         if (data->det_pin)
423                 at91_set_gpio_input(data->det_pin, 1);
424
425         at91_set_A_periph(AT91_PIN_PC1, 0);             /* SMOE */
426         at91_set_A_periph(AT91_PIN_PC3, 0);             /* SMWE */
427
428         nand_data = *data;
429         platform_device_register(&at91rm9200_nand_device);
430 }
431 #else
432 void __init at91_add_device_nand(struct at91_nand_data *data) {}
433 #endif
434
435
436 /* --------------------------------------------------------------------
437  *  TWI (i2c)
438  * -------------------------------------------------------------------- */
439
440 /*
441  * Prefer the GPIO code since the TWI controller isn't robust
442  * (gets overruns and underruns under load) and can only issue
443  * repeated STARTs in one scenario (the driver doesn't yet handle them).
444  */
445 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
446
447 static struct i2c_gpio_platform_data pdata = {
448         .sda_pin                = AT91_PIN_PA25,
449         .sda_is_open_drain      = 1,
450         .scl_pin                = AT91_PIN_PA26,
451         .scl_is_open_drain      = 1,
452         .udelay                 = 2,            /* ~100 kHz */
453 };
454
455 static struct platform_device at91rm9200_twi_device = {
456         .name                   = "i2c-gpio",
457         .id                     = -1,
458         .dev.platform_data      = &pdata,
459 };
460
461 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
462 {
463         at91_set_GPIO_periph(AT91_PIN_PA25, 1);         /* TWD (SDA) */
464         at91_set_multi_drive(AT91_PIN_PA25, 1);
465
466         at91_set_GPIO_periph(AT91_PIN_PA26, 1);         /* TWCK (SCL) */
467         at91_set_multi_drive(AT91_PIN_PA26, 1);
468
469         i2c_register_board_info(0, devices, nr_devices);
470         platform_device_register(&at91rm9200_twi_device);
471 }
472
473 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
474
475 static struct resource twi_resources[] = {
476         [0] = {
477                 .start  = AT91RM9200_BASE_TWI,
478                 .end    = AT91RM9200_BASE_TWI + SZ_16K - 1,
479                 .flags  = IORESOURCE_MEM,
480         },
481         [1] = {
482                 .start  = AT91RM9200_ID_TWI,
483                 .end    = AT91RM9200_ID_TWI,
484                 .flags  = IORESOURCE_IRQ,
485         },
486 };
487
488 static struct platform_device at91rm9200_twi_device = {
489         .name           = "at91_i2c",
490         .id             = -1,
491         .resource       = twi_resources,
492         .num_resources  = ARRAY_SIZE(twi_resources),
493 };
494
495 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
496 {
497         /* pins used for TWI interface */
498         at91_set_A_periph(AT91_PIN_PA25, 0);            /* TWD */
499         at91_set_multi_drive(AT91_PIN_PA25, 1);
500
501         at91_set_A_periph(AT91_PIN_PA26, 0);            /* TWCK */
502         at91_set_multi_drive(AT91_PIN_PA26, 1);
503
504         i2c_register_board_info(0, devices, nr_devices);
505         platform_device_register(&at91rm9200_twi_device);
506 }
507 #else
508 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
509 #endif
510
511
512 /* --------------------------------------------------------------------
513  *  SPI
514  * -------------------------------------------------------------------- */
515
516 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
517 static u64 spi_dmamask = DMA_BIT_MASK(32);
518
519 static struct resource spi_resources[] = {
520         [0] = {
521                 .start  = AT91RM9200_BASE_SPI,
522                 .end    = AT91RM9200_BASE_SPI + SZ_16K - 1,
523                 .flags  = IORESOURCE_MEM,
524         },
525         [1] = {
526                 .start  = AT91RM9200_ID_SPI,
527                 .end    = AT91RM9200_ID_SPI,
528                 .flags  = IORESOURCE_IRQ,
529         },
530 };
531
532 static struct platform_device at91rm9200_spi_device = {
533         .name           = "atmel_spi",
534         .id             = 0,
535         .dev            = {
536                                 .dma_mask               = &spi_dmamask,
537                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
538         },
539         .resource       = spi_resources,
540         .num_resources  = ARRAY_SIZE(spi_resources),
541 };
542
543 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
544
545 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
546 {
547         int i;
548         unsigned long cs_pin;
549
550         at91_set_A_periph(AT91_PIN_PA0, 0);     /* MISO */
551         at91_set_A_periph(AT91_PIN_PA1, 0);     /* MOSI */
552         at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPCK */
553
554         /* Enable SPI chip-selects */
555         for (i = 0; i < nr_devices; i++) {
556                 if (devices[i].controller_data)
557                         cs_pin = (unsigned long) devices[i].controller_data;
558                 else
559                         cs_pin = spi_standard_cs[devices[i].chip_select];
560
561                 if (devices[i].chip_select == 0)        /* for CS0 errata */
562                         at91_set_A_periph(cs_pin, 0);
563                 else
564                         at91_set_gpio_output(cs_pin, 1);
565
566
567                 /* pass chip-select pin to driver */
568                 devices[i].controller_data = (void *) cs_pin;
569         }
570
571         spi_register_board_info(devices, nr_devices);
572         platform_device_register(&at91rm9200_spi_device);
573 }
574 #else
575 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
576 #endif
577
578
579 /* --------------------------------------------------------------------
580  *  RTC
581  * -------------------------------------------------------------------- */
582
583 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
584 static struct platform_device at91rm9200_rtc_device = {
585         .name           = "at91_rtc",
586         .id             = -1,
587         .num_resources  = 0,
588 };
589
590 static void __init at91_add_device_rtc(void)
591 {
592         platform_device_register(&at91rm9200_rtc_device);
593 }
594 #else
595 static void __init at91_add_device_rtc(void) {}
596 #endif
597
598
599 /* --------------------------------------------------------------------
600  *  Watchdog
601  * -------------------------------------------------------------------- */
602
603 #if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
604 static struct platform_device at91rm9200_wdt_device = {
605         .name           = "at91_wdt",
606         .id             = -1,
607         .num_resources  = 0,
608 };
609
610 static void __init at91_add_device_watchdog(void)
611 {
612         platform_device_register(&at91rm9200_wdt_device);
613 }
614 #else
615 static void __init at91_add_device_watchdog(void) {}
616 #endif
617
618
619 /* --------------------------------------------------------------------
620  *  SSC -- Synchronous Serial Controller
621  * -------------------------------------------------------------------- */
622
623 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
624 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
625
626 static struct resource ssc0_resources[] = {
627         [0] = {
628                 .start  = AT91RM9200_BASE_SSC0,
629                 .end    = AT91RM9200_BASE_SSC0 + SZ_16K - 1,
630                 .flags  = IORESOURCE_MEM,
631         },
632         [1] = {
633                 .start  = AT91RM9200_ID_SSC0,
634                 .end    = AT91RM9200_ID_SSC0,
635                 .flags  = IORESOURCE_IRQ,
636         },
637 };
638
639 static struct platform_device at91rm9200_ssc0_device = {
640         .name   = "ssc",
641         .id     = 0,
642         .dev    = {
643                 .dma_mask               = &ssc0_dmamask,
644                 .coherent_dma_mask      = DMA_BIT_MASK(32),
645         },
646         .resource       = ssc0_resources,
647         .num_resources  = ARRAY_SIZE(ssc0_resources),
648 };
649
650 static inline void configure_ssc0_pins(unsigned pins)
651 {
652         if (pins & ATMEL_SSC_TF)
653                 at91_set_A_periph(AT91_PIN_PB0, 1);
654         if (pins & ATMEL_SSC_TK)
655                 at91_set_A_periph(AT91_PIN_PB1, 1);
656         if (pins & ATMEL_SSC_TD)
657                 at91_set_A_periph(AT91_PIN_PB2, 1);
658         if (pins & ATMEL_SSC_RD)
659                 at91_set_A_periph(AT91_PIN_PB3, 1);
660         if (pins & ATMEL_SSC_RK)
661                 at91_set_A_periph(AT91_PIN_PB4, 1);
662         if (pins & ATMEL_SSC_RF)
663                 at91_set_A_periph(AT91_PIN_PB5, 1);
664 }
665
666 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
667
668 static struct resource ssc1_resources[] = {
669         [0] = {
670                 .start  = AT91RM9200_BASE_SSC1,
671                 .end    = AT91RM9200_BASE_SSC1 + SZ_16K - 1,
672                 .flags  = IORESOURCE_MEM,
673         },
674         [1] = {
675                 .start  = AT91RM9200_ID_SSC1,
676                 .end    = AT91RM9200_ID_SSC1,
677                 .flags  = IORESOURCE_IRQ,
678         },
679 };
680
681 static struct platform_device at91rm9200_ssc1_device = {
682         .name   = "ssc",
683         .id     = 1,
684         .dev    = {
685                 .dma_mask               = &ssc1_dmamask,
686                 .coherent_dma_mask      = DMA_BIT_MASK(32),
687         },
688         .resource       = ssc1_resources,
689         .num_resources  = ARRAY_SIZE(ssc1_resources),
690 };
691
692 static inline void configure_ssc1_pins(unsigned pins)
693 {
694         if (pins & ATMEL_SSC_TF)
695                 at91_set_A_periph(AT91_PIN_PB6, 1);
696         if (pins & ATMEL_SSC_TK)
697                 at91_set_A_periph(AT91_PIN_PB7, 1);
698         if (pins & ATMEL_SSC_TD)
699                 at91_set_A_periph(AT91_PIN_PB8, 1);
700         if (pins & ATMEL_SSC_RD)
701                 at91_set_A_periph(AT91_PIN_PB9, 1);
702         if (pins & ATMEL_SSC_RK)
703                 at91_set_A_periph(AT91_PIN_PB10, 1);
704         if (pins & ATMEL_SSC_RF)
705                 at91_set_A_periph(AT91_PIN_PB11, 1);
706 }
707
708 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
709
710 static struct resource ssc2_resources[] = {
711         [0] = {
712                 .start  = AT91RM9200_BASE_SSC2,
713                 .end    = AT91RM9200_BASE_SSC2 + SZ_16K - 1,
714                 .flags  = IORESOURCE_MEM,
715         },
716         [1] = {
717                 .start  = AT91RM9200_ID_SSC2,
718                 .end    = AT91RM9200_ID_SSC2,
719                 .flags  = IORESOURCE_IRQ,
720         },
721 };
722
723 static struct platform_device at91rm9200_ssc2_device = {
724         .name   = "ssc",
725         .id     = 2,
726         .dev    = {
727                 .dma_mask               = &ssc2_dmamask,
728                 .coherent_dma_mask      = DMA_BIT_MASK(32),
729         },
730         .resource       = ssc2_resources,
731         .num_resources  = ARRAY_SIZE(ssc2_resources),
732 };
733
734 static inline void configure_ssc2_pins(unsigned pins)
735 {
736         if (pins & ATMEL_SSC_TF)
737                 at91_set_A_periph(AT91_PIN_PB12, 1);
738         if (pins & ATMEL_SSC_TK)
739                 at91_set_A_periph(AT91_PIN_PB13, 1);
740         if (pins & ATMEL_SSC_TD)
741                 at91_set_A_periph(AT91_PIN_PB14, 1);
742         if (pins & ATMEL_SSC_RD)
743                 at91_set_A_periph(AT91_PIN_PB15, 1);
744         if (pins & ATMEL_SSC_RK)
745                 at91_set_A_periph(AT91_PIN_PB16, 1);
746         if (pins & ATMEL_SSC_RF)
747                 at91_set_A_periph(AT91_PIN_PB17, 1);
748 }
749
750 /*
751  * SSC controllers are accessed through library code, instead of any
752  * kind of all-singing/all-dancing driver.  For example one could be
753  * used by a particular I2S audio codec's driver, while another one
754  * on the same system might be used by a custom data capture driver.
755  */
756 void __init at91_add_device_ssc(unsigned id, unsigned pins)
757 {
758         struct platform_device *pdev;
759
760         /*
761          * NOTE: caller is responsible for passing information matching
762          * "pins" to whatever will be using each particular controller.
763          */
764         switch (id) {
765         case AT91RM9200_ID_SSC0:
766                 pdev = &at91rm9200_ssc0_device;
767                 configure_ssc0_pins(pins);
768                 at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
769                 break;
770         case AT91RM9200_ID_SSC1:
771                 pdev = &at91rm9200_ssc1_device;
772                 configure_ssc1_pins(pins);
773                 at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
774                 break;
775         case AT91RM9200_ID_SSC2:
776                 pdev = &at91rm9200_ssc2_device;
777                 configure_ssc2_pins(pins);
778                 at91_clock_associate("ssc2_clk", &pdev->dev, "ssc");
779                 break;
780         default:
781                 return;
782         }
783
784         platform_device_register(pdev);
785 }
786
787 #else
788 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
789 #endif
790
791
792 /* --------------------------------------------------------------------
793  *  UART
794  * -------------------------------------------------------------------- */
795
796 #if defined(CONFIG_SERIAL_ATMEL)
797 static struct resource dbgu_resources[] = {
798         [0] = {
799                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
800                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
801                 .flags  = IORESOURCE_MEM,
802         },
803         [1] = {
804                 .start  = AT91_ID_SYS,
805                 .end    = AT91_ID_SYS,
806                 .flags  = IORESOURCE_IRQ,
807         },
808 };
809
810 static struct atmel_uart_data dbgu_data = {
811         .use_dma_tx     = 0,
812         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
813         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
814 };
815
816 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
817
818 static struct platform_device at91rm9200_dbgu_device = {
819         .name           = "atmel_usart",
820         .id             = 0,
821         .dev            = {
822                                 .dma_mask               = &dbgu_dmamask,
823                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
824                                 .platform_data          = &dbgu_data,
825         },
826         .resource       = dbgu_resources,
827         .num_resources  = ARRAY_SIZE(dbgu_resources),
828 };
829
830 static inline void configure_dbgu_pins(void)
831 {
832         at91_set_A_periph(AT91_PIN_PA30, 0);            /* DRXD */
833         at91_set_A_periph(AT91_PIN_PA31, 1);            /* DTXD */
834 }
835
836 static struct resource uart0_resources[] = {
837         [0] = {
838                 .start  = AT91RM9200_BASE_US0,
839                 .end    = AT91RM9200_BASE_US0 + SZ_16K - 1,
840                 .flags  = IORESOURCE_MEM,
841         },
842         [1] = {
843                 .start  = AT91RM9200_ID_US0,
844                 .end    = AT91RM9200_ID_US0,
845                 .flags  = IORESOURCE_IRQ,
846         },
847 };
848
849 static struct atmel_uart_data uart0_data = {
850         .use_dma_tx     = 1,
851         .use_dma_rx     = 1,
852 };
853
854 static u64 uart0_dmamask = DMA_BIT_MASK(32);
855
856 static struct platform_device at91rm9200_uart0_device = {
857         .name           = "atmel_usart",
858         .id             = 1,
859         .dev            = {
860                                 .dma_mask               = &uart0_dmamask,
861                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
862                                 .platform_data          = &uart0_data,
863         },
864         .resource       = uart0_resources,
865         .num_resources  = ARRAY_SIZE(uart0_resources),
866 };
867
868 static inline void configure_usart0_pins(unsigned pins)
869 {
870         at91_set_A_periph(AT91_PIN_PA17, 1);            /* TXD0 */
871         at91_set_A_periph(AT91_PIN_PA18, 0);            /* RXD0 */
872
873         if (pins & ATMEL_UART_CTS)
874                 at91_set_A_periph(AT91_PIN_PA20, 0);    /* CTS0 */
875
876         if (pins & ATMEL_UART_RTS) {
877                 /*
878                  * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
879                  *  We need to drive the pin manually.  Default is off (RTS is active low).
880                  */
881                 at91_set_gpio_output(AT91_PIN_PA21, 1);
882         }
883 }
884
885 static struct resource uart1_resources[] = {
886         [0] = {
887                 .start  = AT91RM9200_BASE_US1,
888                 .end    = AT91RM9200_BASE_US1 + SZ_16K - 1,
889                 .flags  = IORESOURCE_MEM,
890         },
891         [1] = {
892                 .start  = AT91RM9200_ID_US1,
893                 .end    = AT91RM9200_ID_US1,
894                 .flags  = IORESOURCE_IRQ,
895         },
896 };
897
898 static struct atmel_uart_data uart1_data = {
899         .use_dma_tx     = 1,
900         .use_dma_rx     = 1,
901 };
902
903 static u64 uart1_dmamask = DMA_BIT_MASK(32);
904
905 static struct platform_device at91rm9200_uart1_device = {
906         .name           = "atmel_usart",
907         .id             = 2,
908         .dev            = {
909                                 .dma_mask               = &uart1_dmamask,
910                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
911                                 .platform_data          = &uart1_data,
912         },
913         .resource       = uart1_resources,
914         .num_resources  = ARRAY_SIZE(uart1_resources),
915 };
916
917 static inline void configure_usart1_pins(unsigned pins)
918 {
919         at91_set_A_periph(AT91_PIN_PB20, 1);            /* TXD1 */
920         at91_set_A_periph(AT91_PIN_PB21, 0);            /* RXD1 */
921
922         if (pins & ATMEL_UART_RI)
923                 at91_set_A_periph(AT91_PIN_PB18, 0);    /* RI1 */
924         if (pins & ATMEL_UART_DTR)
925                 at91_set_A_periph(AT91_PIN_PB19, 0);    /* DTR1 */
926         if (pins & ATMEL_UART_DCD)
927                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD1 */
928         if (pins & ATMEL_UART_CTS)
929                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* CTS1 */
930         if (pins & ATMEL_UART_DSR)
931                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* DSR1 */
932         if (pins & ATMEL_UART_RTS)
933                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS1 */
934 }
935
936 static struct resource uart2_resources[] = {
937         [0] = {
938                 .start  = AT91RM9200_BASE_US2,
939                 .end    = AT91RM9200_BASE_US2 + SZ_16K - 1,
940                 .flags  = IORESOURCE_MEM,
941         },
942         [1] = {
943                 .start  = AT91RM9200_ID_US2,
944                 .end    = AT91RM9200_ID_US2,
945                 .flags  = IORESOURCE_IRQ,
946         },
947 };
948
949 static struct atmel_uart_data uart2_data = {
950         .use_dma_tx     = 1,
951         .use_dma_rx     = 1,
952 };
953
954 static u64 uart2_dmamask = DMA_BIT_MASK(32);
955
956 static struct platform_device at91rm9200_uart2_device = {
957         .name           = "atmel_usart",
958         .id             = 3,
959         .dev            = {
960                                 .dma_mask               = &uart2_dmamask,
961                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
962                                 .platform_data          = &uart2_data,
963         },
964         .resource       = uart2_resources,
965         .num_resources  = ARRAY_SIZE(uart2_resources),
966 };
967
968 static inline void configure_usart2_pins(unsigned pins)
969 {
970         at91_set_A_periph(AT91_PIN_PA22, 0);            /* RXD2 */
971         at91_set_A_periph(AT91_PIN_PA23, 1);            /* TXD2 */
972
973         if (pins & ATMEL_UART_CTS)
974                 at91_set_B_periph(AT91_PIN_PA30, 0);    /* CTS2 */
975         if (pins & ATMEL_UART_RTS)
976                 at91_set_B_periph(AT91_PIN_PA31, 0);    /* RTS2 */
977 }
978
979 static struct resource uart3_resources[] = {
980         [0] = {
981                 .start  = AT91RM9200_BASE_US3,
982                 .end    = AT91RM9200_BASE_US3 + SZ_16K - 1,
983                 .flags  = IORESOURCE_MEM,
984         },
985         [1] = {
986                 .start  = AT91RM9200_ID_US3,
987                 .end    = AT91RM9200_ID_US3,
988                 .flags  = IORESOURCE_IRQ,
989         },
990 };
991
992 static struct atmel_uart_data uart3_data = {
993         .use_dma_tx     = 1,
994         .use_dma_rx     = 1,
995 };
996
997 static u64 uart3_dmamask = DMA_BIT_MASK(32);
998
999 static struct platform_device at91rm9200_uart3_device = {
1000         .name           = "atmel_usart",
1001         .id             = 4,
1002         .dev            = {
1003                                 .dma_mask               = &uart3_dmamask,
1004                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1005                                 .platform_data          = &uart3_data,
1006         },
1007         .resource       = uart3_resources,
1008         .num_resources  = ARRAY_SIZE(uart3_resources),
1009 };
1010
1011 static inline void configure_usart3_pins(unsigned pins)
1012 {
1013         at91_set_B_periph(AT91_PIN_PA5, 1);             /* TXD3 */
1014         at91_set_B_periph(AT91_PIN_PA6, 0);             /* RXD3 */
1015
1016         if (pins & ATMEL_UART_CTS)
1017                 at91_set_B_periph(AT91_PIN_PB1, 0);     /* CTS3 */
1018         if (pins & ATMEL_UART_RTS)
1019                 at91_set_B_periph(AT91_PIN_PB0, 0);     /* RTS3 */
1020 }
1021
1022 static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
1023 struct platform_device *atmel_default_console_device;   /* the serial console device */
1024
1025 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1026 {
1027         int i;
1028
1029         /* Fill in list of supported UARTs */
1030         for (i = 0; i < config->nr_tty; i++) {
1031                 switch (config->tty_map[i]) {
1032                         case 0:
1033                                 configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
1034                                 at91_uarts[i] = &at91rm9200_uart0_device;
1035                                 at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
1036                                 break;
1037                         case 1:
1038                                 configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI);
1039                                 at91_uarts[i] = &at91rm9200_uart1_device;
1040                                 at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
1041                                 break;
1042                         case 2:
1043                                 configure_usart2_pins(0);
1044                                 at91_uarts[i] = &at91rm9200_uart2_device;
1045                                 at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
1046                                 break;
1047                         case 3:
1048                                 configure_usart3_pins(0);
1049                                 at91_uarts[i] = &at91rm9200_uart3_device;
1050                                 at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
1051                                 break;
1052                         case 4:
1053                                 configure_dbgu_pins();
1054                                 at91_uarts[i] = &at91rm9200_dbgu_device;
1055                                 at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
1056                                 break;
1057                         default:
1058                                 continue;
1059                 }
1060                 at91_uarts[i]->id = i;          /* update ID number to mapped ID */
1061         }
1062
1063         /* Set serial console device */
1064         if (config->console_tty < ATMEL_MAX_UART)
1065                 atmel_default_console_device = at91_uarts[config->console_tty];
1066         if (!atmel_default_console_device)
1067                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1068 }
1069
1070 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1071 {
1072         struct platform_device *pdev;
1073
1074         switch (id) {
1075                 case 0:         /* DBGU */
1076                         pdev = &at91rm9200_dbgu_device;
1077                         configure_dbgu_pins();
1078                         at91_clock_associate("mck", &pdev->dev, "usart");
1079                         break;
1080                 case AT91RM9200_ID_US0:
1081                         pdev = &at91rm9200_uart0_device;
1082                         configure_usart0_pins(pins);
1083                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1084                         break;
1085                 case AT91RM9200_ID_US1:
1086                         pdev = &at91rm9200_uart1_device;
1087                         configure_usart1_pins(pins);
1088                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1089                         break;
1090                 case AT91RM9200_ID_US2:
1091                         pdev = &at91rm9200_uart2_device;
1092                         configure_usart2_pins(pins);
1093                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1094                         break;
1095                 case AT91RM9200_ID_US3:
1096                         pdev = &at91rm9200_uart3_device;
1097                         configure_usart3_pins(pins);
1098                         at91_clock_associate("usart3_clk", &pdev->dev, "usart");
1099                         break;
1100                 default:
1101                         return;
1102         }
1103         pdev->id = portnr;              /* update to mapped ID */
1104
1105         if (portnr < ATMEL_MAX_UART)
1106                 at91_uarts[portnr] = pdev;
1107 }
1108
1109 void __init at91_set_serial_console(unsigned portnr)
1110 {
1111         if (portnr < ATMEL_MAX_UART)
1112                 atmel_default_console_device = at91_uarts[portnr];
1113         if (!atmel_default_console_device)
1114                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1115 }
1116
1117 void __init at91_add_device_serial(void)
1118 {
1119         int i;
1120
1121         for (i = 0; i < ATMEL_MAX_UART; i++) {
1122                 if (at91_uarts[i])
1123                         platform_device_register(at91_uarts[i]);
1124         }
1125 }
1126 #else
1127 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1128 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1129 void __init at91_set_serial_console(unsigned portnr) {}
1130 void __init at91_add_device_serial(void) {}
1131 #endif
1132
1133
1134 /* -------------------------------------------------------------------- */
1135
1136 /*
1137  * These devices are always present and don't need any board-specific
1138  * setup.
1139  */
1140 static int __init at91_add_standard_devices(void)
1141 {
1142         at91_add_device_rtc();
1143         at91_add_device_watchdog();
1144         return 0;
1145 }
1146
1147 arch_initcall(at91_add_standard_devices);