git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-footbridge/common.c

   1 /*
   2  *  linux/arch/arm/mach-footbridge/common.c
   3  *
   4  *  Copyright (C) 1998-2000 Russell King, Dave Gilbert.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/module.h>
  11 #include <linux/types.h>
  12 #include <linux/mm.h>
  13 #include <linux/ioport.h>
  14 #include <linux/list.h>
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/spinlock.h>
  18
  19 #include <asm/pgtable.h>
  20 #include <asm/page.h>
  21 #include <asm/irq.h>
  22 #include <asm/mach-types.h>
  23 #include <asm/setup.h>
  24 #include <asm/hardware/dec21285.h>
  25
  26 #include <asm/mach/irq.h>
  27 #include <asm/mach/map.h>
  28
  29 #include "common.h"
  30
  31 extern void __init isa_init_irq(unsigned int irq);
  32
  33 unsigned int mem_fclk_21285 = 50000000;
  34
  35 EXPORT_SYMBOL(mem_fclk_21285);
  36
  37 static void __init early_fclk(char **arg)
  38 {
  39         mem_fclk_21285 = simple_strtoul(*arg, arg, 0);
  40 }
  41
  42 __early_param("mem_fclk_21285=", early_fclk);
  43
  44 static int __init parse_tag_memclk(const struct tag *tag)
  45 {
  46         mem_fclk_21285 = tag->u.memclk.fmemclk;
  47         return 0;
  48 }
  49
  50 __tagtable(ATAG_MEMCLK, parse_tag_memclk);
  51
  52 /*
  53  * Footbridge IRQ translation table
  54  *  Converts from our IRQ numbers into FootBridge masks
  55  */
  56 static const int fb_irq_mask[] = {
  57         IRQ_MASK_UART_RX,       /*  0 */
  58         IRQ_MASK_UART_TX,       /*  1 */
  59         IRQ_MASK_TIMER1,        /*  2 */
  60         IRQ_MASK_TIMER2,        /*  3 */
  61         IRQ_MASK_TIMER3,        /*  4 */
  62         IRQ_MASK_IN0,           /*  5 */
  63         IRQ_MASK_IN1,           /*  6 */
  64         IRQ_MASK_IN2,           /*  7 */
  65         IRQ_MASK_IN3,           /*  8 */
  66         IRQ_MASK_DOORBELLHOST,  /*  9 */
  67         IRQ_MASK_DMA1,          /* 10 */
  68         IRQ_MASK_DMA2,          /* 11 */
  69         IRQ_MASK_PCI,           /* 12 */
  70         IRQ_MASK_SDRAMPARITY,   /* 13 */
  71         IRQ_MASK_I2OINPOST,     /* 14 */
  72         IRQ_MASK_PCI_ABORT,     /* 15 */
  73         IRQ_MASK_PCI_SERR,      /* 16 */
  74         IRQ_MASK_DISCARD_TIMER, /* 17 */
  75         IRQ_MASK_PCI_DPERR,     /* 18 */
  76         IRQ_MASK_PCI_PERR,      /* 19 */
  77 };
  78
  79 static void fb_mask_irq(unsigned int irq)
  80 {
  81         *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
  82 }
  83
  84 static void fb_unmask_irq(unsigned int irq)
  85 {
  86         *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
  87 }
  88
  89 static struct irq_chip fb_chip = {
  90         .ack    = fb_mask_irq,
  91         .mask   = fb_mask_irq,
  92         .unmask = fb_unmask_irq,
  93 };
  94
  95 static void __init __fb_init_irq(void)
  96 {
  97         unsigned int irq;
  98
  99         /*
 100          * setup DC21285 IRQs
 101          */
 102         *CSR_IRQ_DISABLE = -1;
 103         *CSR_FIQ_DISABLE = -1;
 104
 105         for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
 106                 set_irq_chip(irq, &fb_chip);
 107                 set_irq_handler(irq, handle_level_irq);
 108                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 109         }
 110 }
 111
 112 void __init footbridge_init_irq(void)
 113 {
 114         __fb_init_irq();
 115
 116         if (!footbridge_cfn_mode())
 117                 return;
 118
 119         if (machine_is_ebsa285())
 120                 /* The following is dependent on which slot
 121                  * you plug the Southbridge card into.  We
 122                  * currently assume that you plug it into
 123                  * the right-hand most slot.
 124                  */
 125                 isa_init_irq(IRQ_PCI);
 126
 127         if (machine_is_cats())
 128                 isa_init_irq(IRQ_IN2);
 129
 130         if (machine_is_netwinder())
 131                 isa_init_irq(IRQ_IN3);
 132 }
 133
 134 /*
 135  * Common mapping for all systems.  Note that the outbound write flush is
 136  * commented out since there is a "No Fix" problem with it.  Not mapping
 137  * it means that we have extra bullet protection on our feet.
 138  */
 139 static struct map_desc fb_common_io_desc[] __initdata = {
 140         {
 141                 .virtual        = ARMCSR_BASE,
 142                 .pfn            = __phys_to_pfn(DC21285_ARMCSR_BASE),
 143                 .length         = ARMCSR_SIZE,
 144                 .type           = MT_DEVICE,
 145         }, {
 146                 .virtual        = XBUS_BASE,
 147                 .pfn            = __phys_to_pfn(0x40000000),
 148                 .length         = XBUS_SIZE,
 149                 .type           = MT_DEVICE,
 150         }
 151 };
 152
 153 /*
 154  * The mapping when the footbridge is in host mode.  We don't map any of
 155  * this when we are in add-in mode.
 156  */
 157 static struct map_desc ebsa285_host_io_desc[] __initdata = {
 158 #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
 159         {
 160                 .virtual        = PCIMEM_BASE,
 161                 .pfn            = __phys_to_pfn(DC21285_PCI_MEM),
 162                 .length         = PCIMEM_SIZE,
 163                 .type           = MT_DEVICE,
 164         }, {
 165                 .virtual        = PCICFG0_BASE,
 166                 .pfn            = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
 167                 .length         = PCICFG0_SIZE,
 168                 .type           = MT_DEVICE,
 169         }, {
 170                 .virtual        = PCICFG1_BASE,
 171                 .pfn            = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
 172                 .length         = PCICFG1_SIZE,
 173                 .type           = MT_DEVICE,
 174         }, {
 175                 .virtual        = PCIIACK_BASE,
 176                 .pfn            = __phys_to_pfn(DC21285_PCI_IACK),
 177                 .length         = PCIIACK_SIZE,
 178                 .type           = MT_DEVICE,
 179         }, {
 180                 .virtual        = PCIO_BASE,
 181                 .pfn            = __phys_to_pfn(DC21285_PCI_IO),
 182                 .length         = PCIO_SIZE,
 183                 .type           = MT_DEVICE,
 184         },
 185 #endif
 186 };
 187
 188 void __init footbridge_map_io(void)
 189 {
 190         /*
 191          * Set up the common mapping first; we need this to
 192          * determine whether we're in host mode or not.
 193          */
 194         iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
 195
 196         /*
 197          * Now, work out what we've got to map in addition on this
 198          * platform.
 199          */
 200         if (footbridge_cfn_mode())
 201                 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
 202 }
 203
 204 #ifdef CONFIG_FOOTBRIDGE_ADDIN
 205
 206 /*
 207  * These two functions convert virtual addresses to PCI addresses and PCI
 208  * addresses to virtual addresses.  Note that it is only legal to use these
 209  * on memory obtained via get_zeroed_page or kmalloc.
 210  */
 211 unsigned long __virt_to_bus(unsigned long res)
 212 {
 213         WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
 214
 215         return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0);
 216 }
 217 EXPORT_SYMBOL(__virt_to_bus);
 218
 219 unsigned long __bus_to_virt(unsigned long res)
 220 {
 221         res -= (*CSR_PCISDRAMBASE & 0xfffffff0);
 222         res += PAGE_OFFSET;
 223
 224         WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
 225
 226         return res;
 227 }
 228 EXPORT_SYMBOL(__bus_to_virt);
 229
 230 #endif