Merge ../linux-2.6-watchdog-mm
[linux-2.6] / arch / arm / mach-ixp4xx / common.c
1 /*
2  * arch/arm/mach-ixp4xx/common.c
3  *
4  * Generic code shared across all IXP4XX platforms
5  *
6  * Maintainer: Deepak Saxena <dsaxena@plexity.net>
7  *
8  * Copyright 2002 (c) Intel Corporation
9  * Copyright 2003-2004 (c) MontaVista, Software, Inc. 
10  * 
11  * This file is licensed under  the terms of the GNU General Public 
12  * License version 2. This program is licensed "as is" without any 
13  * warranty of any kind, whether express or implied.
14  */
15
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/init.h>
19 #include <linux/serial.h>
20 #include <linux/sched.h>
21 #include <linux/tty.h>
22 #include <linux/platform_device.h>
23 #include <linux/serial_core.h>
24 #include <linux/bootmem.h>
25 #include <linux/interrupt.h>
26 #include <linux/bitops.h>
27 #include <linux/time.h>
28 #include <linux/timex.h>
29 #include <linux/clocksource.h>
30
31 #include <asm/hardware.h>
32 #include <asm/uaccess.h>
33 #include <asm/io.h>
34 #include <asm/pgtable.h>
35 #include <asm/page.h>
36 #include <asm/irq.h>
37
38 #include <asm/mach/map.h>
39 #include <asm/mach/irq.h>
40 #include <asm/mach/time.h>
41
42 /*************************************************************************
43  * IXP4xx chipset I/O mapping
44  *************************************************************************/
45 static struct map_desc ixp4xx_io_desc[] __initdata = {
46         {       /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */
47                 .virtual        = IXP4XX_PERIPHERAL_BASE_VIRT,
48                 .pfn            = __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS),
49                 .length         = IXP4XX_PERIPHERAL_REGION_SIZE,
50                 .type           = MT_DEVICE
51         }, {    /* Expansion Bus Config Registers */
52                 .virtual        = IXP4XX_EXP_CFG_BASE_VIRT,
53                 .pfn            = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS),
54                 .length         = IXP4XX_EXP_CFG_REGION_SIZE,
55                 .type           = MT_DEVICE
56         }, {    /* PCI Registers */
57                 .virtual        = IXP4XX_PCI_CFG_BASE_VIRT,
58                 .pfn            = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
59                 .length         = IXP4XX_PCI_CFG_REGION_SIZE,
60                 .type           = MT_DEVICE
61         },
62 #ifdef CONFIG_DEBUG_LL
63         {       /* Debug UART mapping */
64                 .virtual        = IXP4XX_DEBUG_UART_BASE_VIRT,
65                 .pfn            = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
66                 .length         = IXP4XX_DEBUG_UART_REGION_SIZE,
67                 .type           = MT_DEVICE
68         }
69 #endif
70 };
71
72 void __init ixp4xx_map_io(void)
73 {
74         iotable_init(ixp4xx_io_desc, ARRAY_SIZE(ixp4xx_io_desc));
75 }
76
77
78 /*************************************************************************
79  * IXP4xx chipset IRQ handling
80  *
81  * TODO: GPIO IRQs should be marked invalid until the user of the IRQ
82  *       (be it PCI or something else) configures that GPIO line
83  *       as an IRQ.
84  **************************************************************************/
85 enum ixp4xx_irq_type {
86         IXP4XX_IRQ_LEVEL, IXP4XX_IRQ_EDGE
87 };
88
89 /* Each bit represents an IRQ: 1: edge-triggered, 0: level triggered */
90 static unsigned long long ixp4xx_irq_edge = 0;
91
92 /*
93  * IRQ -> GPIO mapping table
94  */
95 static signed char irq2gpio[32] = {
96         -1, -1, -1, -1, -1, -1,  0,  1,
97         -1, -1, -1, -1, -1, -1, -1, -1,
98         -1, -1, -1,  2,  3,  4,  5,  6,
99          7,  8,  9, 10, 11, 12, -1, -1,
100 };
101
102 static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
103 {
104         int line = irq2gpio[irq];
105         u32 int_style;
106         enum ixp4xx_irq_type irq_type;
107         volatile u32 *int_reg;
108
109         /*
110          * Only for GPIO IRQs
111          */
112         if (line < 0)
113                 return -EINVAL;
114
115         switch (type){
116         case IRQT_BOTHEDGE:
117                 int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
118                 irq_type = IXP4XX_IRQ_EDGE;
119                 break;
120         case IRQT_RISING:
121                 int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
122                 irq_type = IXP4XX_IRQ_EDGE;
123                 break;
124         case IRQT_FALLING:
125                 int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
126                 irq_type = IXP4XX_IRQ_EDGE;
127                 break;
128         case IRQT_HIGH:
129                 int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
130                 irq_type = IXP4XX_IRQ_LEVEL;
131                 break;
132         case IRQT_LOW:
133                 int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
134                 irq_type = IXP4XX_IRQ_LEVEL;
135                 break;
136         default:
137                 return -EINVAL;
138         }
139
140         if (irq_type == IXP4XX_IRQ_EDGE)
141                 ixp4xx_irq_edge |= (1 << irq);
142         else
143                 ixp4xx_irq_edge &= ~(1 << irq);
144
145         if (line >= 8) {        /* pins 8-15 */
146                 line -= 8;
147                 int_reg = IXP4XX_GPIO_GPIT2R;
148         } else {                /* pins 0-7 */
149                 int_reg = IXP4XX_GPIO_GPIT1R;
150         }
151
152         /* Clear the style for the appropriate pin */
153         *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR <<
154                         (line * IXP4XX_GPIO_STYLE_SIZE));
155
156         *IXP4XX_GPIO_GPISR = (1 << line);
157
158         /* Set the new style */
159         *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
160
161         /* Configure the line as an input */
162         gpio_line_config(line, IXP4XX_GPIO_IN);
163
164         return 0;
165 }
166
167 static void ixp4xx_irq_mask(unsigned int irq)
168 {
169         if (cpu_is_ixp46x() && irq >= 32)
170                 *IXP4XX_ICMR2 &= ~(1 << (irq - 32));
171         else
172                 *IXP4XX_ICMR &= ~(1 << irq);
173 }
174
175 static void ixp4xx_irq_ack(unsigned int irq)
176 {
177         int line = (irq < 32) ? irq2gpio[irq] : -1;
178
179         if (line >= 0)
180                 *IXP4XX_GPIO_GPISR = (1 << line);
181 }
182
183 /*
184  * Level triggered interrupts on GPIO lines can only be cleared when the
185  * interrupt condition disappears.
186  */
187 static void ixp4xx_irq_unmask(unsigned int irq)
188 {
189         if (!(ixp4xx_irq_edge & (1 << irq)))
190                 ixp4xx_irq_ack(irq);
191
192         if (cpu_is_ixp46x() && irq >= 32)
193                 *IXP4XX_ICMR2 |= (1 << (irq - 32));
194         else
195                 *IXP4XX_ICMR |= (1 << irq);
196 }
197
198 static struct irqchip ixp4xx_irq_chip = {
199         .name           = "IXP4xx",
200         .ack            = ixp4xx_irq_ack,
201         .mask           = ixp4xx_irq_mask,
202         .unmask         = ixp4xx_irq_unmask,
203         .set_type       = ixp4xx_set_irq_type,
204 };
205
206 void __init ixp4xx_init_irq(void)
207 {
208         int i = 0;
209
210         /* Route all sources to IRQ instead of FIQ */
211         *IXP4XX_ICLR = 0x0;
212
213         /* Disable all interrupt */
214         *IXP4XX_ICMR = 0x0; 
215
216         if (cpu_is_ixp46x()) {
217                 /* Route upper 32 sources to IRQ instead of FIQ */
218                 *IXP4XX_ICLR2 = 0x00;
219
220                 /* Disable upper 32 interrupts */
221                 *IXP4XX_ICMR2 = 0x00;
222         }
223
224         /* Default to all level triggered */
225         for(i = 0; i < NR_IRQS; i++) {
226                 set_irq_chip(i, &ixp4xx_irq_chip);
227                 set_irq_handler(i, do_level_IRQ);
228                 set_irq_flags(i, IRQF_VALID);
229         }
230 }
231
232
233 /*************************************************************************
234  * IXP4xx timer tick
235  * We use OS timer1 on the CPU for the timer tick and the timestamp 
236  * counter as a source of real clock ticks to account for missed jiffies.
237  *************************************************************************/
238
239 static unsigned volatile last_jiffy_time;
240
241 #define CLOCK_TICKS_PER_USEC    ((CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
242
243 static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id)
244 {
245         write_seqlock(&xtime_lock);
246
247         /* Clear Pending Interrupt by writing '1' to it */
248         *IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND;
249
250         /*
251          * Catch up with the real idea of time
252          */
253         while ((signed long)(*IXP4XX_OSTS - last_jiffy_time) >= LATCH) {
254                 timer_tick();
255                 last_jiffy_time += LATCH;
256         }
257
258         write_sequnlock(&xtime_lock);
259
260         return IRQ_HANDLED;
261 }
262
263 static struct irqaction ixp4xx_timer_irq = {
264         .name           = "IXP4xx Timer Tick",
265         .flags          = IRQF_DISABLED | IRQF_TIMER,
266         .handler        = ixp4xx_timer_interrupt,
267 };
268
269 static void __init ixp4xx_timer_init(void)
270 {
271         /* Clear Pending Interrupt by writing '1' to it */
272         *IXP4XX_OSST = IXP4XX_OSST_TIMER_1_PEND;
273
274         /* Setup the Timer counter value */
275         *IXP4XX_OSRT1 = (LATCH & ~IXP4XX_OST_RELOAD_MASK) | IXP4XX_OST_ENABLE;
276
277         /* Reset time-stamp counter */
278         *IXP4XX_OSTS = 0;
279         last_jiffy_time = 0;
280
281         /* Connect the interrupt handler and enable the interrupt */
282         setup_irq(IRQ_IXP4XX_TIMER1, &ixp4xx_timer_irq);
283 }
284
285 struct sys_timer ixp4xx_timer = {
286         .init           = ixp4xx_timer_init,
287 };
288
289 static struct resource ixp46x_i2c_resources[] = {
290         [0] = {
291                 .start  = 0xc8011000,
292                 .end    = 0xc801101c,
293                 .flags  = IORESOURCE_MEM,
294         },
295         [1] = {
296                 .start  = IRQ_IXP4XX_I2C,
297                 .end    = IRQ_IXP4XX_I2C,
298                 .flags  = IORESOURCE_IRQ
299         }
300 };
301
302 /*
303  * I2C controller. The IXP46x uses the same block as the IOP3xx, so
304  * we just use the same device name.
305  */
306 static struct platform_device ixp46x_i2c_controller = {
307         .name           = "IOP3xx-I2C",
308         .id             = 0,
309         .num_resources  = 2,
310         .resource       = ixp46x_i2c_resources
311 };
312
313 static struct platform_device *ixp46x_devices[] __initdata = {
314         &ixp46x_i2c_controller
315 };
316
317 unsigned long ixp4xx_exp_bus_size;
318 EXPORT_SYMBOL(ixp4xx_exp_bus_size);
319
320 void __init ixp4xx_sys_init(void)
321 {
322         ixp4xx_exp_bus_size = SZ_16M;
323
324         if (cpu_is_ixp46x()) {
325                 int region;
326
327                 platform_add_devices(ixp46x_devices,
328                                 ARRAY_SIZE(ixp46x_devices));
329
330                 for (region = 0; region < 7; region++) {
331                         if((*(IXP4XX_EXP_REG(0x4 * region)) & 0x200)) {
332                                 ixp4xx_exp_bus_size = SZ_32M;
333                                 break;
334                         }
335                 }
336         }
337
338         printk("IXP4xx: Using %luMiB expansion bus window size\n",
339                         ixp4xx_exp_bus_size >> 20);
340 }
341
342 cycle_t ixp4xx_get_cycles(void)
343 {
344         return *IXP4XX_OSTS;
345 }
346
347 static struct clocksource clocksource_ixp4xx = {
348         .name           = "OSTS",
349         .rating         = 200,
350         .read           = ixp4xx_get_cycles,
351         .mask           = CLOCKSOURCE_MASK(32),
352         .shift          = 20,
353         .is_continuous  = 1,
354 };
355
356 unsigned long ixp4xx_timer_freq = FREQ;
357 static int __init ixp4xx_clocksource_init(void)
358 {
359         clocksource_ixp4xx.mult =
360                 clocksource_hz2mult(ixp4xx_timer_freq,
361                                     clocksource_ixp4xx.shift);
362         clocksource_register(&clocksource_ixp4xx);
363
364         return 0;
365 }
366
367 device_initcall(ixp4xx_clocksource_init);