[POWERPC] 85xx: Add next-level-cache property
[linux-2.6] / arch / powerpc / boot / dts / tqm8540.dts
1 /*
2  * TQM 8540 Device Tree Source
3  *
4  * Copyright 2008 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "tqm,8540";
16         compatible = "tqm,8540", "tqm,85xx";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 ethernet2 = &enet2;
24                 serial0 = &serial0;
25                 serial1 = &serial1;
26                 pci0 = &pci0;
27         };
28
29         cpus {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32
33                 PowerPC,8540@0 {
34                         device_type = "cpu";
35                         reg = <0>;
36                         d-cache-line-size = <32>;
37                         i-cache-line-size = <32>;
38                         d-cache-size = <32768>;
39                         i-cache-size = <32768>;
40                         timebase-frequency = <0>;
41                         bus-frequency = <0>;
42                         clock-frequency = <0>;
43                         next-level-cache = <&L2>;
44                 };
45         };
46
47         memory {
48                 device_type = "memory";
49                 reg = <0x00000000 0x10000000>;
50         };
51
52         soc@e0000000 {
53                 #address-cells = <1>;
54                 #size-cells = <1>;
55                 device_type = "soc";
56                 ranges = <0x0 0xe0000000 0x100000>;
57                 reg = <0xe0000000 0x200>;
58                 bus-frequency = <0>;
59                 compatible = "fsl,mpc8540-immr", "simple-bus";
60
61                 memory-controller@2000 {
62                         compatible = "fsl,8540-memory-controller";
63                         reg = <0x2000 0x1000>;
64                         interrupt-parent = <&mpic>;
65                         interrupts = <18 2>;
66                 };
67
68                 L2: l2-cache-controller@20000 {
69                         compatible = "fsl,8540-l2-cache-controller";
70                         reg = <0x20000 0x1000>;
71                         cache-line-size = <32>;
72                         cache-size = <0x40000>; // L2, 256K
73                         interrupt-parent = <&mpic>;
74                         interrupts = <16 2>;
75                 };
76
77                 i2c@3000 {
78                         #address-cells = <1>;
79                         #size-cells = <0>;
80                         cell-index = <0>;
81                         compatible = "fsl-i2c";
82                         reg = <0x3000 0x100>;
83                         interrupts = <43 2>;
84                         interrupt-parent = <&mpic>;
85                         dfsrr;
86
87                         rtc@68 {
88                                 compatible = "dallas,ds1337";
89                                 reg = <0x68>;
90                         };
91                 };
92
93                 mdio@24520 {
94                         #address-cells = <1>;
95                         #size-cells = <0>;
96                         compatible = "fsl,gianfar-mdio";
97                         reg = <0x24520 0x20>;
98
99                         phy1: ethernet-phy@1 {
100                                 interrupt-parent = <&mpic>;
101                                 interrupts = <8 1>;
102                                 reg = <1>;
103                                 device_type = "ethernet-phy";
104                         };
105                         phy2: ethernet-phy@2 {
106                                 interrupt-parent = <&mpic>;
107                                 interrupts = <8 1>;
108                                 reg = <2>;
109                                 device_type = "ethernet-phy";
110                         };
111                         phy3: ethernet-phy@3 {
112                                 interrupt-parent = <&mpic>;
113                                 interrupts = <8 1>;
114                                 reg = <3>;
115                                 device_type = "ethernet-phy";
116                         };
117                 };
118
119                 enet0: ethernet@24000 {
120                         cell-index = <0>;
121                         device_type = "network";
122                         model = "TSEC";
123                         compatible = "gianfar";
124                         reg = <0x24000 0x1000>;
125                         local-mac-address = [ 00 00 00 00 00 00 ];
126                         interrupts = <29 2 30 2 34 2>;
127                         interrupt-parent = <&mpic>;
128                         phy-handle = <&phy2>;
129                 };
130
131                 enet1: ethernet@25000 {
132                         cell-index = <1>;
133                         device_type = "network";
134                         model = "TSEC";
135                         compatible = "gianfar";
136                         reg = <0x25000 0x1000>;
137                         local-mac-address = [ 00 00 00 00 00 00 ];
138                         interrupts = <35 2 36 2 40 2>;
139                         interrupt-parent = <&mpic>;
140                         phy-handle = <&phy1>;
141                 };
142
143                 enet2: ethernet@26000 {
144                         cell-index = <2>;
145                         device_type = "network";
146                         model = "FEC";
147                         compatible = "gianfar";
148                         reg = <0x26000 0x1000>;
149                         local-mac-address = [ 00 00 00 00 00 00 ];
150                         interrupts = <41 2>;
151                         interrupt-parent = <&mpic>;
152                         phy-handle = <&phy3>;
153                 };
154
155                 serial0: serial@4500 {
156                         cell-index = <0>;
157                         device_type = "serial";
158                         compatible = "ns16550";
159                         reg = <0x4500 0x100>;   // reg base, size
160                         clock-frequency = <0>;  // should we fill in in uboot?
161                         interrupts = <42 2>;
162                         interrupt-parent = <&mpic>;
163                 };
164
165                 serial1: serial@4600 {
166                         cell-index = <1>;
167                         device_type = "serial";
168                         compatible = "ns16550";
169                         reg = <0x4600 0x100>;   // reg base, size
170                         clock-frequency = <0>;  // should we fill in in uboot?
171                         interrupts = <42 2>;
172                         interrupt-parent = <&mpic>;
173                 };
174
175                 mpic: pic@40000 {
176                         interrupt-controller;
177                         #address-cells = <0>;
178                         #interrupt-cells = <2>;
179                         reg = <0x40000 0x40000>;
180                         device_type = "open-pic";
181                         compatible = "chrp,open-pic";
182                 };
183         };
184
185         pci0: pci@e0008000 {
186                 cell-index = <0>;
187                 #interrupt-cells = <1>;
188                 #size-cells = <2>;
189                 #address-cells = <3>;
190                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
191                 device_type = "pci";
192                 reg = <0xe0008000 0x1000>;
193                 clock-frequency = <66666666>;
194                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
195                 interrupt-map = <
196                                 /* IDSEL 28 */
197                                  0xe000 0 0 1 &mpic 2 1
198                                  0xe000 0 0 2 &mpic 3 1>;
199
200                 interrupt-parent = <&mpic>;
201                 interrupts = <24 2>;
202                 bus-range = <0 0>;
203                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
204                           0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
205         };
206 };