2 * TQM 8560 Device Tree Source
4 * Copyright 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
16 compatible = "tqm,8560", "tqm,85xx";
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
48 device_type = "memory";
49 reg = <0x00000000 0x10000000>;
56 ranges = <0x0 0xe0000000 0x100000>;
57 reg = <0xe0000000 0x200>;
59 compatible = "fsl,mpc8560-immr", "simple-bus";
61 memory-controller@2000 {
62 compatible = "fsl,8540-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>;
68 L2: l2-cache-controller@20000 {
69 compatible = "fsl,8540-l2-cache-controller";
70 reg = <0x20000 0x1000>;
71 cache-line-size = <32>;
72 cache-size = <0x40000>; // L2, 256K
73 interrupt-parent = <&mpic>;
81 compatible = "fsl-i2c";
84 interrupt-parent = <&mpic>;
88 compatible = "dallas,ds1337";
96 compatible = "fsl,gianfar-mdio";
99 phy1: ethernet-phy@1 {
100 interrupt-parent = <&mpic>;
103 device_type = "ethernet-phy";
105 phy2: ethernet-phy@2 {
106 interrupt-parent = <&mpic>;
109 device_type = "ethernet-phy";
111 phy3: ethernet-phy@3 {
112 interrupt-parent = <&mpic>;
115 device_type = "ethernet-phy";
119 enet0: ethernet@24000 {
121 device_type = "network";
123 compatible = "gianfar";
124 reg = <0x24000 0x1000>;
125 local-mac-address = [ 00 00 00 00 00 00 ];
126 interrupts = <29 2 30 2 34 2>;
127 interrupt-parent = <&mpic>;
128 phy-handle = <&phy2>;
131 enet1: ethernet@25000 {
133 device_type = "network";
135 compatible = "gianfar";
136 reg = <0x25000 0x1000>;
137 local-mac-address = [ 00 00 00 00 00 00 ];
138 interrupts = <35 2 36 2 40 2>;
139 interrupt-parent = <&mpic>;
140 phy-handle = <&phy1>;
144 interrupt-controller;
145 #address-cells = <0>;
146 #interrupt-cells = <2>;
147 reg = <0x40000 0x40000>;
148 device_type = "open-pic";
149 compatible = "chrp,open-pic";
153 #address-cells = <1>;
155 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
156 reg = <0x919c0 0x30>;
160 #address-cells = <1>;
162 ranges = <0 0x80000 0x10000>;
165 compatible = "fsl,cpm-muram-data";
166 reg = <0 0x4000 0x9000 0x2000>;
171 compatible = "fsl,mpc8560-brg",
174 reg = <0x919f0 0x10 0x915f0 0x10>;
175 clock-frequency = <0>;
179 interrupt-controller;
180 #address-cells = <0>;
181 #interrupt-cells = <2>;
183 interrupt-parent = <&mpic>;
184 reg = <0x90c00 0x80>;
185 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
188 serial0: serial@91a00 {
189 device_type = "serial";
190 compatible = "fsl,mpc8560-scc-uart",
192 reg = <0x91a00 0x20 0x88000 0x100>;
194 fsl,cpm-command = <0x800000>;
195 current-speed = <115200>;
197 interrupt-parent = <&cpmpic>;
200 serial1: serial@91a20 {
201 device_type = "serial";
202 compatible = "fsl,mpc8560-scc-uart",
204 reg = <0x91a20 0x20 0x88100 0x100>;
206 fsl,cpm-command = <0x4a00000>;
207 current-speed = <115200>;
209 interrupt-parent = <&cpmpic>;
212 enet2: ethernet@91340 {
213 device_type = "network";
214 compatible = "fsl,mpc8560-fcc-enet",
216 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
217 local-mac-address = [ 00 00 00 00 00 00 ];
218 fsl,cpm-command = <0x1a400300>;
220 interrupt-parent = <&cpmpic>;
221 phy-handle = <&phy3>;
228 #interrupt-cells = <1>;
230 #address-cells = <3>;
231 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
233 reg = <0xe0008000 0x1000>;
234 clock-frequency = <66666666>;
235 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
238 0xe000 0 0 1 &mpic 2 1
239 0xe000 0 0 2 &mpic 3 1>;
241 interrupt-parent = <&mpic>;
244 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
245 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;