git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/platforms/cell/pervasive.c

   1 /*
   2  * CBE Pervasive Monitor and Debug
   3  *
   4  * (C) Copyright IBM Corporation 2005
   5  *
   6  * Authors: Maximino Aguilar (maguilar@us.ibm.com)
   7  *          Michael N. Day (mnday@us.ibm.com)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2, or (at your option)
  12  * any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #undef DEBUG
  25
  26 #include <linux/config.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/irq.h>
  29 #include <linux/percpu.h>
  30 #include <linux/types.h>
  31 #include <linux/kallsyms.h>
  32
  33 #include <asm/io.h>
  34 #include <asm/machdep.h>
  35 #include <asm/prom.h>
  36 #include <asm/pgtable.h>
  37 #include <asm/reg.h>
  38
  39 #include "pervasive.h"
  40 #include "cbe_regs.h"
  41
  42 static DEFINE_SPINLOCK(cbe_pervasive_lock);
  43
  44 static void __init cbe_enable_pause_zero(void)
  45 {
  46         unsigned long thread_switch_control;
  47         unsigned long temp_register;
  48         struct cbe_pmd_regs __iomem *pregs;
  49
  50         spin_lock_irq(&cbe_pervasive_lock);
  51         pregs = cbe_get_cpu_pmd_regs(smp_processor_id());
  52         if (pregs == NULL)
  53                 goto out;
  54
  55         pr_debug("Power Management: CPU %d\n", smp_processor_id());
  56
  57          /* Enable Pause(0) control bit */
  58         temp_register = in_be64(&pregs->pm_control);
  59
  60         out_be64(&pregs->pm_control,
  61                  temp_register | CBE_PMD_PAUSE_ZERO_CONTROL);
  62
  63         /* Enable DEC and EE interrupt request */
  64         thread_switch_control  = mfspr(SPRN_TSC_CELL);
  65         thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST;
  66
  67         switch ((mfspr(SPRN_CTRLF) & CTRL_CT)) {
  68         case CTRL_CT0:
  69                 thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
  70                 break;
  71         case CTRL_CT1:
  72                 thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
  73                 break;
  74         default:
  75                 printk(KERN_WARNING "%s: unknown configuration\n",
  76                         __FUNCTION__);
  77                 break;
  78         }
  79
  80         mtspr(SPRN_TSC_CELL, thread_switch_control);
  81
  82 out:
  83         spin_unlock_irq(&cbe_pervasive_lock);
  84 }
  85
  86 static void cbe_idle(void)
  87 {
  88         unsigned long ctrl;
  89
  90         /* Why do we do that on every idle ? Couldn't that be done once for
  91          * all or do we lose the state some way ? Also, the pm_control
  92          * register setting, that can't be set once at boot ? We really want
  93          * to move that away in order to implement a simple powersave
  94          */
  95         cbe_enable_pause_zero();
  96
  97         while (1) {
  98                 if (!need_resched()) {
  99                         local_irq_disable();
 100                         while (!need_resched()) {
 101                                 /* go into low thread priority */
 102                                 HMT_low();
 103
 104                                 /*
 105                                  * atomically disable thread execution
 106                                  * and runlatch.
 107                                  * External and Decrementer exceptions
 108                                  * are still handled when the thread
 109                                  * is disabled but now enter in
 110                                  * cbe_system_reset_exception()
 111                                  */
 112                                 ctrl = mfspr(SPRN_CTRLF);
 113                                 ctrl &= ~(CTRL_RUNLATCH | CTRL_TE);
 114                                 mtspr(SPRN_CTRLT, ctrl);
 115                         }
 116                         /* restore thread prio */
 117                         HMT_medium();
 118                         local_irq_enable();
 119                 }
 120
 121                 /*
 122                  * turn runlatch on again before scheduling the
 123                  * process we just woke up
 124                  */
 125                 ppc64_runlatch_on();
 126
 127                 preempt_enable_no_resched();
 128                 schedule();
 129                 preempt_disable();
 130         }
 131 }
 132
 133 static int cbe_system_reset_exception(struct pt_regs *regs)
 134 {
 135         switch (regs->msr & SRR1_WAKEMASK) {
 136         case SRR1_WAKEEE:
 137                 do_IRQ(regs);
 138                 break;
 139         case SRR1_WAKEDEC:
 140                 timer_interrupt(regs);
 141                 break;
 142         case SRR1_WAKEMT:
 143                 break;
 144 #ifdef CONFIG_CBE_RAS
 145         case SRR1_WAKESYSERR:
 146                 cbe_system_error_exception(regs);
 147                 break;
 148         case SRR1_WAKETHERM:
 149                 cbe_thermal_exception(regs);
 150                 break;
 151 #endif /* CONFIG_CBE_RAS */
 152         default:
 153                 /* do system reset */
 154                 return 0;
 155         }
 156         /* everything handled */
 157         return 1;
 158 }
 159
 160 void __init cbe_pervasive_init(void)
 161 {
 162         if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
 163                 return;
 164
 165         ppc_md.idle_loop = cbe_idle;
 166         ppc_md.system_reset_exception = cbe_system_reset_exception;
 167 }