3 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
17 #include <asm/cache.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/setup.h>
21 #include <asm/processor-flags.h>
22 #include <asm/percpu.h>
24 /* Physical address */
25 #define pa(X) ((X) - __PAGE_OFFSET)
28 * References to members of the new_cpu_data structure.
31 #define X86 new_cpu_data+CPUINFO_x86
32 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
33 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
34 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
35 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
36 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
37 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
38 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
41 * This is how much memory in addition to the memory covered up to
42 * and including _end we need mapped initially.
44 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
45 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
47 * Modulo rounding, each megabyte assigned here requires a kilobyte of
48 * memory, which is currently unreclaimed.
50 * This should be a multiple of a page.
52 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
53 * and small than max_low_pfn, otherwise will waste some page table entries
57 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
59 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
63 /* Enough space to fit pagetables for the low memory linear map */
64 MAPPING_BEYOND_END = (PAGE_TABLE_SIZE(1 << (32 - PAGE_SHIFT)) * PAGE_SIZE)
67 * Worst-case size of the kernel mapping we need to make:
68 * the worst-case size of the kernel itself, plus the extra we need
69 * to map for the linear map.
71 KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT
73 INIT_MAP_SIZE = (PAGE_TABLE_SIZE(KERNEL_PAGES) + ALLOCATOR_SLOP) * PAGE_SIZE_asm
74 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
77 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
78 * %esi points to the real-mode code as a 32-bit pointer.
79 * CS and DS must be 4 GB flat segments, but we don't depend on
80 * any particular GDT layout, because we load our own as soon as we
83 .section .text.head,"ax",@progbits
85 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
86 us to not reload segments */
87 testb $(1<<6), BP_loadflags(%esi)
91 * Set segments to known values.
93 lgdt pa(boot_gdt_descr)
94 movl $(__BOOT_DS),%eax
102 * Clear BSS first so that there are no surprises...
106 movl $pa(__bss_start),%edi
107 movl $pa(__bss_stop),%ecx
112 * Copy bootup parameters out of the way.
113 * Note: %esi still has the pointer to the real-mode data.
114 * With the kexec as boot loader, parameter segment might be loaded beyond
115 * kernel image and might not even be addressable by early boot page tables.
116 * (kexec on panic case). Hence copy out the parameters before initializing
119 movl $pa(boot_params),%edi
120 movl $(PARAM_SIZE/4),%ecx
124 movl pa(boot_params) + NEW_CL_POINTER,%esi
126 jz 1f # No comand line
127 movl $pa(boot_command_line),%edi
128 movl $(COMMAND_LINE_SIZE/4),%ecx
133 #ifdef CONFIG_PARAVIRT
134 /* This is can only trip for a broken bootloader... */
135 cmpw $0x207, pa(boot_params + BP_version)
138 /* Paravirt-compatible boot parameters. Look to see what architecture
139 we're booting under. */
140 movl pa(boot_params + BP_hardware_subarch), %eax
141 cmpl $num_subarch_entries, %eax
144 movl pa(subarch_entries)(,%eax,4), %eax
145 subl $__PAGE_OFFSET, %eax
151 /* Unknown implementation; there's really
152 nothing we can do at this point. */
158 .long default_entry /* normal x86/PC */
159 .long lguest_entry /* lguest hypervisor */
160 .long xen_entry /* Xen hypervisor */
161 num_subarch_entries = (. - subarch_entries) / 4
163 #endif /* CONFIG_PARAVIRT */
166 * Initialize page tables. This creates a PDE and a set of page
167 * tables, which are located immediately beyond __brk_base. The variable
168 * _brk_end is set up to point to the first "safe" location.
169 * Mappings are created both at virtual address 0 (identity mapping)
170 * and PAGE_OFFSET for up to _end.
172 * Note that the stack is not yet set up!
175 #ifdef CONFIG_X86_PAE
178 * In PAE mode swapper_pg_dir is statically defined to contain enough
179 * entries to cover the VMSPLIT option (that is the top 1, 2 or 3
180 * entries). The identity mapping is handled by pointing two PGD
181 * entries to the first kernel PMD.
183 * Note the upper half of each PMD or PTE are always zero at
187 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
189 xorl %ebx,%ebx /* %ebx is kept at zero */
191 movl $pa(__brk_base), %edi
192 movl $pa(swapper_pg_pmd), %edx
193 movl $PTE_IDENT_ATTR, %eax
195 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
196 movl %ecx,(%edx) /* Store PMD entry */
197 /* Upper half already zero */
209 * End condition: we must map up to the end + MAPPING_BEYOND_END.
211 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
215 addl $__PAGE_OFFSET, %edi
216 movl %edi, pa(_brk_end)
218 movl %eax, pa(max_pfn_mapped)
220 /* Do early initialization of the fixmap area */
221 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
222 movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
225 page_pde_offset = (__PAGE_OFFSET >> 20);
227 movl $pa(__brk_base), %edi
228 movl $pa(swapper_pg_dir), %edx
229 movl $PTE_IDENT_ATTR, %eax
231 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
232 movl %ecx,(%edx) /* Store identity PDE entry */
233 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
241 * End condition: we must map up to the end + MAPPING_BEYOND_END.
243 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
246 addl $__PAGE_OFFSET, %edi
247 movl %edi, pa(_brk_end)
249 movl %eax, pa(max_pfn_mapped)
251 /* Do early initialization of the fixmap area */
252 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
253 movl %eax,pa(swapper_pg_dir+0xffc)
257 * Non-boot CPU entry point; entered from trampoline.S
258 * We can't lgdt here, because lgdt itself uses a data segment, but
259 * we know the trampoline has already loaded the boot_gdt for us.
261 * If cpu hotplug is not supported then this code can go in init section
262 * which will be freed later
265 #ifndef CONFIG_HOTPLUG_CPU
266 .section .init.text,"ax",@progbits
270 ENTRY(startup_32_smp)
272 movl $(__BOOT_DS),%eax
277 #endif /* CONFIG_SMP */
281 * New page tables may be in 4Mbyte page mode and may
282 * be using the global pages.
284 * NOTE! If we are on a 486 we may have no cr4 at all!
285 * So we do not try to touch it unless we really have
286 * some bits in it to set. This won't work if the BSP
287 * implements cr4 but this AP does not -- very unlikely
288 * but be warned! The same applies to the pse feature
289 * if not equally supported. --macro
291 * NOTE! We have to correct for the fact that we're
292 * not yet offset PAGE_OFFSET..
294 #define cr4_bits pa(mmu_cr4_features)
298 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
302 btl $5, %eax # check if PAE is enabled
305 /* Check if extended functions are implemented */
306 movl $0x80000000, %eax
308 cmpl $0x80000000, %eax
310 mov $0x80000001, %eax
312 /* Execute Disable bit supported? */
316 /* Setup EFER (Extended Feature Enable Register) */
317 movl $0xc0000080, %ecx
321 /* Make changes effective */
329 movl $pa(swapper_pg_dir),%eax
330 movl %eax,%cr3 /* set the page table pointer.. */
333 movl %eax,%cr0 /* ..and set paging (PG) bit */
334 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
336 /* Set up the stack pointer */
340 * Initialize eflags. Some BIOS's leave bits like NT set. This would
341 * confuse the debugger if this code is traced.
342 * XXX - best to initialize before switching to protected mode.
349 jz 1f /* Initial CPU cleans BSS */
352 #endif /* CONFIG_SMP */
355 * start system 32-bit setup. We need to re-do some of the things done
356 * in 16-bit mode for the "real" operations.
362 movl $-1,X86_CPUID # -1 for no CPUID initially
364 /* check if it is 486 or 386. */
366 * XXX - this does a lot of unnecessary setup. Alignment checks don't
367 * apply at our cpl of 0 and the stack ought to be aligned already, and
368 * we don't need to preserve eflags.
371 movb $3,X86 # at least 386
373 popl %eax # get EFLAGS
374 movl %eax,%ecx # save original EFLAGS
375 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
376 pushl %eax # copy to EFLAGS
378 pushfl # get new EFLAGS
379 popl %eax # put it in eax
380 xorl %ecx,%eax # change in flags
381 pushl %ecx # restore original EFLAGS
383 testl $0x40000,%eax # check if AC bit changed
386 movb $4,X86 # at least 486
387 testl $0x200000,%eax # check if ID bit changed
390 /* get vendor info */
391 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
393 movl %eax,X86_CPUID # save CPUID level
394 movl %ebx,X86_VENDOR_ID # lo 4 chars
395 movl %edx,X86_VENDOR_ID+4 # next 4 chars
396 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
398 orl %eax,%eax # do we have processor info as well?
401 movl $1,%eax # Use the CPUID instruction to get CPU type
403 movb %al,%cl # save reg for future use
404 andb $0x0f,%ah # mask processor family
406 andb $0xf0,%al # mask model
409 andb $0x0f,%cl # mask mask revision
411 movl %edx,X86_CAPABILITY
413 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
416 is386: movl $2,%ecx # set MP
418 andl $0x80000011,%eax # Save PG,PE,ET
425 ljmp $(__KERNEL_CS),$1f
426 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
427 movl %eax,%ss # after changing gdt.
429 movl $(__USER_DS),%eax # DS/ES contains default USER segment
433 movl $(__KERNEL_PERCPU), %eax
434 movl %eax,%fs # set this cpu's percpu
436 #ifdef CONFIG_CC_STACKPROTECTOR
438 * The linker can't handle this by relocation. Manually set
439 * base address in stack canary segment descriptor.
443 movl $per_cpu__gdt_page,%eax
444 movl $per_cpu__stack_canary,%ecx
446 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
448 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
449 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
452 movl $(__KERNEL_STACK_CANARY),%eax
455 xorl %eax,%eax # Clear LDT
458 cld # gcc2 wants the direction flag cleared at all times
459 pushl $0 # fake return address for unwinder
463 cmpb $0,%cl # the first CPU calls start_kernel
465 movl (stack_start), %esp
467 #endif /* CONFIG_SMP */
471 * We depend on ET to be correct. This checks for 287/387.
474 movb $0,X86_HARD_MATH
480 movl %cr0,%eax /* no coprocessor: have to set bits */
481 xorl $4,%eax /* set EM */
485 1: movb $1,X86_HARD_MATH
486 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
492 * sets up a idt with 256 entries pointing to
493 * ignore_int, interrupt gates. It doesn't actually load
494 * idt - that can be done only after paging has been enabled
495 * and the kernel moved to PAGE_OFFSET. Interrupts
496 * are enabled elsewhere, when we can be relatively
497 * sure everything is ok.
499 * Warning: %esi is live across this function.
503 movl $(__KERNEL_CS << 16),%eax
504 movw %dx,%ax /* selector = 0x0010 = cs */
505 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
516 .macro set_early_handler handler,trapno
518 movl $(__KERNEL_CS << 16),%eax
520 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
522 movl %eax,8*\trapno(%edi)
523 movl %edx,8*\trapno+4(%edi)
526 set_early_handler handler=early_divide_err,trapno=0
527 set_early_handler handler=early_illegal_opcode,trapno=6
528 set_early_handler handler=early_protection_fault,trapno=13
529 set_early_handler handler=early_page_fault,trapno=14
535 pushl $0 /* fake errcode */
538 early_illegal_opcode:
540 pushl $0 /* fake errcode */
543 early_protection_fault:
555 movl $(__KERNEL_DS),%eax
558 cmpl $2,early_recursion_flag
560 incl early_recursion_flag
563 pushl %edx /* trapno */
572 /* This is the default interrupt "handler" :-) */
582 movl $(__KERNEL_DS),%eax
585 cmpl $2,early_recursion_flag
587 incl early_recursion_flag
606 .section .cpuinit.data,"wa"
609 .long i386_start_kernel
613 * Real beginning of normal "text" segment
621 .section ".bss.page_aligned","wa"
623 #ifdef CONFIG_X86_PAE
627 ENTRY(swapper_pg_dir)
632 ENTRY(empty_zero_page)
636 * This starts the data section.
638 #ifdef CONFIG_X86_PAE
639 .section ".data.page_aligned","wa"
640 /* Page-aligned for the benefit of paravirt? */
642 ENTRY(swapper_pg_dir)
643 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
645 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
646 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
647 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0
650 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
651 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
655 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
657 # error "Kernel PMDs should be 1, 2 or 3"
659 .align PAGE_SIZE_asm /* needs to be page-sized too */
664 .long init_thread_union+THREAD_SIZE
669 early_recursion_flag:
673 .asciz "Unknown interrupt or fault at: %p %p %p\n"
677 .ascii "BUG: Int %d: CR2 %p\n"
679 .ascii " EDI %p ESI %p EBP %p ESP %p\n"
680 .ascii " EBX %p EDX %p ECX %p EAX %p\n"
682 .ascii " err %p EIP %p CS %p flg %p\n"
683 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
684 .ascii " %p %p %p %p %p %p %p %p\n"
685 .asciz " %p %p %p %p %p %p %p %p\n"
687 #include "../../x86/xen/xen-head.S"
690 * The IDT and GDT 'descriptors' are a strange 48-bit object
691 * only used by the lidt and lgdt instructions. They are not
692 * like usual segment descriptors - they consist of a 16-bit
693 * segment size, and 32-bit linear address value:
696 .globl boot_gdt_descr
700 # early boot GDT descriptor (must use 1:1 address mapping)
701 .word 0 # 32 bit align gdt_desc.address
704 .long boot_gdt - __PAGE_OFFSET
706 .word 0 # 32-bit align idt_desc.address
708 .word IDT_ENTRIES*8-1 # idt contains 256 entries
711 # boot GDT descriptor (later on used by CPU#0):
712 .word 0 # 32 bit align gdt_desc.address
713 ENTRY(early_gdt_descr)
714 .word GDT_ENTRIES*8-1
715 .long per_cpu__gdt_page /* Overwritten for secondary CPUs */
718 * The boot_gdt must mirror the equivalent in setup.S and is
719 * used only for booting.
721 .align L1_CACHE_BYTES
723 .fill GDT_ENTRY_BOOT_CS,8,0
724 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
725 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */