2 * drivers/pcmcia/m32r_pcc.c
4 * Device driver for the PCMCIA functionality of M32R.
6 * Copyright (c) 2001, 2002, 2003, 2004
7 * Hiroyuki Kondo, Naoto Sugai, Hayato Fujiwara
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/fcntl.h>
15 #include <linux/string.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/timer.h>
19 #include <linux/slab.h>
20 #include <linux/ioport.h>
21 #include <linux/delay.h>
22 #include <linux/workqueue.h>
23 #include <linux/interrupt.h>
24 #include <linux/platform_device.h>
25 #include <linux/bitops.h>
28 #include <asm/system.h>
29 #include <asm/addrspace.h>
31 #include <pcmcia/cs_types.h>
32 #include <pcmcia/ss.h>
33 #include <pcmcia/cs.h>
35 /* XXX: should be moved into asm/irq.h */
41 #define CHAOS_PCC_DEBUG
42 #ifdef CHAOS_PCC_DEBUG
43 static volatile u_short dummy_readbuf;
46 #define PCC_DEBUG_DBEX
48 #ifdef CONFIG_PCMCIA_DEBUG
49 static int m32r_pcc_debug;
50 module_param(m32r_pcc_debug, int, 0644);
51 #define debug(lvl, fmt, arg...) do { \
52 if (m32r_pcc_debug > (lvl)) \
53 printk(KERN_DEBUG "m32r_pcc: " fmt , ## arg); \
56 #define debug(n, args...) do { } while (0)
59 /* Poll status interval -- 0 means default to interrupt */
60 static int poll_interval = 0;
62 typedef enum pcc_space { as_none = 0, as_comm, as_attr, as_io } pcc_as_t;
64 typedef struct pcc_socket {
66 struct pcmcia_socket socket;
70 u_long base; /* PCC register base */
72 pccard_io_map io_map[MAX_IO_WIN];
73 pccard_mem_map mem_map[MAX_WIN];
76 pcc_as_t current_space;
78 #ifdef CHAOS_PCC_DEBUG
82 struct proc_dir_entry *proc;
86 static int pcc_sockets = 0;
87 static pcc_socket_t socket[M32R_MAX_PCC] = {
91 /*====================================================================*/
93 static unsigned int pcc_get(u_short, unsigned int);
94 static void pcc_set(u_short, unsigned int , unsigned int );
96 static DEFINE_SPINLOCK(pcc_lock);
98 void pcc_iorw(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int wr, int flag)
103 #ifdef PCC_DEBUG_DBEX
106 pcc_socket_t *t = &socket[sock];
107 #ifdef CHAOS_PCC_DEBUG
112 spin_lock_irqsave(&pcc_lock, flags);
117 need_ex = (size > 1 && flag == 0) ? PCMOD_DBEX : 0;
118 #ifdef PCC_DEBUG_DBEX
124 * calculate access address
126 addr = t->mapaddr + port - t->ioaddr + KSEG1; /* XXX */
129 * Check current mapping
131 if (t->current_space != as_io || t->last_iodbex != need_ex) {
138 pcc_set(sock, PCCR, 0);
141 * Set mode and io address
143 cbsz = (t->flags & MAP_16BIT) ? 0 : PCMOD_CBSZ;
144 pcc_set(sock, PCMOD, PCMOD_AS_IO | cbsz | need_ex);
145 pcc_set(sock, PCADR, addr & 0x1ff00000);
150 pcc_set(sock, PCCR, 1);
152 #ifdef CHAOS_PCC_DEBUG
154 map_changed = (t->current_space == as_attr && size == 2); /* XXX */
159 t->current_space = as_io;
167 unsigned char *bp = (unsigned char *)buf;
171 dummy_readbuf = readb(addr);
187 unsigned short *bp = (unsigned short *)buf;
189 #ifdef CHAOS_PCC_DEBUG
191 dummy_readbuf = readw(addr);
197 #ifdef PCC_DEBUG_DBEX
199 unsigned char *cp = (unsigned char *)bp;
201 tmp = cp[1] << 8 | cp[0];
211 #ifdef PCC_DEBUG_DBEX
213 unsigned char *cp = (unsigned char *)bp;
217 cp[1] = (tmp >> 8) & 0xff;
227 /* addr is no longer used */
228 if ((addr = pcc_get(sock, PCIRC)) & PCIRC_BWERR) {
229 printk("m32r_pcc: BWERR detected : port 0x%04lx : iosize %dbit\n",
231 pcc_set(sock, PCIRC, addr);
237 t->last_iosize = size;
238 t->last_iodbex = need_ex;
242 spin_unlock_irqrestore(&pcc_lock,flags);
247 void pcc_ioread(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
248 pcc_iorw(sock, port, buf, size, nmemb, 0, flag);
251 void pcc_iowrite(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
252 pcc_iorw(sock, port, buf, size, nmemb, 1, flag);
255 /*====================================================================*/
257 #define IS_REGISTERED 0x2000
258 #define IS_ALIVE 0x8000
260 typedef struct pcc_t {
265 static pcc_t pcc[] = {
266 { "xnux2", 0 }, { "xnux2", 0 },
269 static irqreturn_t pcc_interrupt(int, void *);
271 /*====================================================================*/
273 static struct timer_list poll_timer;
275 static unsigned int pcc_get(u_short sock, unsigned int reg)
277 return inl(socket[sock].base + reg);
281 static void pcc_set(u_short sock, unsigned int reg, unsigned int data)
283 outl(data, socket[sock].base + reg);
286 /*======================================================================
288 See if a card is present, powered up, in IO mode, and already
289 bound to a (non PC Card) Linux driver. We leave these alone.
291 We make an exception for cards that seem to be serial devices.
293 ======================================================================*/
295 static int __init is_alive(u_short sock)
300 stat = pcc_get(sock, PCIRC);
301 f = (stat & (PCIRC_CDIN1 | PCIRC_CDIN2)) >> 16;
303 printk("m32r_pcc: No Card is detected at socket %d : stat = 0x%08x\n",stat,sock);
307 printk("m32r_pcc: Insertion fail (%.8x) at socket %d\n",stat,sock);
309 printk("m32r_pcc: Card is Inserted at socket %d(%.8x)\n",sock,stat);
313 static void add_pcc_socket(ulong base, int irq, ulong mapaddr,
316 pcc_socket_t *t = &socket[pcc_sockets];
320 t->mapaddr = mapaddr;
322 #ifdef CHAOS_PCC_DEBUG
323 t->flags = MAP_16BIT;
327 if (is_alive(pcc_sockets))
328 t->flags |= IS_ALIVE;
332 request_region(t->base, 0x20, "m32r-pcc");
335 printk(KERN_INFO " %s ", pcc[pcc_sockets].name);
336 printk("pcc at 0x%08lx\n", t->base);
338 /* Update socket interrupt information, capabilities */
339 t->socket.features |= (SS_CAP_PCCARD | SS_CAP_STATIC_MAP);
340 t->socket.map_size = M32R_PCC_MAPSIZE;
341 t->socket.io_offset = ioaddr; /* use for io access offset */
342 t->socket.irq_mask = 0;
343 t->socket.pci_irq = 2 + pcc_sockets; /* XXX */
345 request_irq(irq, pcc_interrupt, 0, "m32r-pcc", pcc_interrupt);
353 /*====================================================================*/
355 static irqreturn_t pcc_interrupt(int irq, void *dev)
358 u_int events, active;
361 debug(4, "m32r: pcc_interrupt(%d)\n", irq);
363 for (j = 0; j < 20; j++) {
365 for (i = 0; i < pcc_sockets; i++) {
366 if ((socket[i].cs_irq != irq) &&
367 (socket[i].socket.pci_irq != irq))
370 irc = pcc_get(i, PCIRC);
372 debug(2, "m32r-pcc:interrupt: socket %d pcirc 0x%02x ", i, irc);
376 events = (irc) ? SS_DETECT : 0;
377 events |= (pcc_get(i,PCCR) & PCCR_PCEN) ? SS_READY : 0;
378 debug(2, " event 0x%02x\n", events);
381 pcmcia_parse_events(&socket[i].socket, events);
389 printk(KERN_NOTICE "m32r-pcc: infinite loop in interrupt handler\n");
391 debug(4, "m32r-pcc: interrupt done\n");
393 return IRQ_RETVAL(handled);
394 } /* pcc_interrupt */
396 static void pcc_interrupt_wrapper(u_long data)
398 pcc_interrupt(0, NULL);
399 init_timer(&poll_timer);
400 poll_timer.expires = jiffies + poll_interval;
401 add_timer(&poll_timer);
404 /*====================================================================*/
406 static int _pcc_get_status(u_short sock, u_int *value)
410 status = pcc_get(sock,PCIRC);
411 *value = ((status & PCIRC_CDIN1) && (status & PCIRC_CDIN2))
414 status = pcc_get(sock,PCCR);
417 *value |= (status & PCCR_PCEN) ? SS_READY : 0;
419 *value |= SS_READY; /* XXX: always */
422 status = pcc_get(sock,PCCSIGCR);
423 *value |= (status & PCCSIGCR_VEN) ? SS_POWERON : 0;
425 debug(3, "m32r-pcc: GetStatus(%d) = %#4.4x\n", sock, *value);
429 /*====================================================================*/
431 static int _pcc_set_socket(u_short sock, socket_state_t *state)
435 debug(3, "m32r-pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
436 "io_irq %d, csc_mask %#2.2x)", sock, state->flags,
437 state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
443 if (state->Vcc == 50) {
450 if (state->flags & SS_RESET) {
451 debug(3, ":RESET\n");
452 reg |= PCCSIGCR_CRST;
454 if (state->flags & SS_OUTPUT_ENA){
455 debug(3, ":OUTPUT_ENA\n");
461 pcc_set(sock,PCCSIGCR,reg);
463 #ifdef CONFIG_PCMCIA_DEBUG
464 if(state->flags & SS_IOCARD){
467 if (state->flags & SS_PWR_AUTO) {
468 debug(3, ":PWR_AUTO");
470 if (state->csc_mask & SS_DETECT)
471 debug(3, ":csc-SS_DETECT");
472 if (state->flags & SS_IOCARD) {
473 if (state->csc_mask & SS_STSCHG)
476 if (state->csc_mask & SS_BATDEAD)
477 debug(3, ":BATDEAD");
478 if (state->csc_mask & SS_BATWARN)
479 debug(3, ":BATWARN");
480 if (state->csc_mask & SS_READY)
488 /*====================================================================*/
490 static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
494 debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
495 "%#x-%#x)\n", sock, io->map, io->flags,
496 io->speed, io->start, io->stop);
502 /*====================================================================*/
504 static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
507 u_char map = mem->map;
510 pcc_socket_t *t = &socket[sock];
511 #ifdef CHAOS_PCC_DEBUG
513 pcc_as_t last = t->current_space;
517 debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, "
518 "%#lx, %#x)\n", sock, map, mem->flags,
519 mem->speed, mem->static_start, mem->card_start);
524 if ((map > MAX_WIN) || (mem->card_start > 0x3ffffff)){
531 if ((mem->flags & MAP_ACTIVE) == 0) {
532 t->current_space = as_none;
539 pcc_set(sock, PCCR, 0);
544 if (mem->flags & MAP_ATTRIB) {
545 mode = PCMOD_AS_ATTRIB | PCMOD_CBSZ;
546 t->current_space = as_attr;
548 mode = 0; /* common memory */
549 t->current_space = as_comm;
551 pcc_set(sock, PCMOD, mode);
556 addr = t->mapaddr + (mem->card_start & M32R_PCC_MAPMASK);
557 pcc_set(sock, PCADR, addr);
559 mem->static_start = addr + mem->card_start;
564 pcc_set(sock, PCCR, 1);
566 #ifdef CHAOS_PCC_DEBUG
568 if (last != as_attr) {
572 dummy_readbuf = *(u_char *)(addr + KSEG1);
580 #if 0 /* driver model ordering issue */
581 /*======================================================================
583 Routines for accessing socket information and register dumps via
586 ======================================================================*/
588 static ssize_t show_info(struct class_device *class_dev, char *buf)
590 pcc_socket_t *s = container_of(class_dev, struct pcc_socket,
593 return sprintf(buf, "type: %s\nbase addr: 0x%08lx\n",
594 pcc[s->type].name, s->base);
597 static ssize_t show_exca(struct class_device *class_dev, char *buf)
604 static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL);
605 static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL);
608 /*====================================================================*/
610 /* this is horribly ugly... proper locking needs to be done here at
612 #define LOCKED(x) do { \
614 unsigned long flags; \
615 spin_lock_irqsave(&pcc_lock, flags); \
617 spin_unlock_irqrestore(&pcc_lock, flags); \
622 static int pcc_get_status(struct pcmcia_socket *s, u_int *value)
624 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
626 if (socket[sock].flags & IS_ALIVE) {
630 LOCKED(_pcc_get_status(sock, value));
633 static int pcc_set_socket(struct pcmcia_socket *s, socket_state_t *state)
635 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
637 if (socket[sock].flags & IS_ALIVE)
640 LOCKED(_pcc_set_socket(sock, state));
643 static int pcc_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
645 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
647 if (socket[sock].flags & IS_ALIVE)
649 LOCKED(_pcc_set_io_map(sock, io));
652 static int pcc_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
654 unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
656 if (socket[sock].flags & IS_ALIVE)
658 LOCKED(_pcc_set_mem_map(sock, mem));
661 static int pcc_init(struct pcmcia_socket *s)
663 debug(4, "m32r-pcc: init call\n");
667 static struct pccard_operations pcc_operations = {
669 .get_status = pcc_get_status,
670 .set_socket = pcc_set_socket,
671 .set_io_map = pcc_set_io_map,
672 .set_mem_map = pcc_set_mem_map,
675 static int pcc_drv_pcmcia_suspend(struct platform_device *dev,
678 return pcmcia_socket_dev_suspend(&dev->dev, state);
681 static int pcc_drv_pcmcia_resume(struct platform_device *dev)
683 return pcmcia_socket_dev_resume(&dev->dev);
685 /*====================================================================*/
687 static struct platform_driver pcc_driver = {
690 .owner = THIS_MODULE,
692 .suspend = pcc_drv_pcmcia_suspend,
693 .resume = pcc_drv_pcmcia_resume,
696 static struct platform_device pcc_device = {
701 /*====================================================================*/
703 static int __init init_m32r_pcc(void)
707 ret = platform_driver_register(&pcc_driver);
711 ret = platform_device_register(&pcc_device);
713 platform_driver_unregister(&pcc_driver);
717 printk(KERN_INFO "m32r PCC probe:\n");
721 add_pcc_socket(M32R_PCC0_BASE, PCC0_IRQ, M32R_PCC0_MAPBASE, 0x1000);
723 #ifdef CONFIG_M32RPCC_SLOT2
724 add_pcc_socket(M32R_PCC1_BASE, PCC1_IRQ, M32R_PCC1_MAPBASE, 0x2000);
727 if (pcc_sockets == 0) {
728 printk("socket is not found.\n");
729 platform_device_unregister(&pcc_device);
730 platform_driver_unregister(&pcc_driver);
734 /* Set up interrupt handler(s) */
736 for (i = 0 ; i < pcc_sockets ; i++) {
737 socket[i].socket.dev.parent = &pcc_device.dev;
738 socket[i].socket.ops = &pcc_operations;
739 socket[i].socket.resource_ops = &pccard_static_ops;
740 socket[i].socket.owner = THIS_MODULE;
741 socket[i].number = i;
742 ret = pcmcia_register_socket(&socket[i].socket);
744 socket[i].flags |= IS_REGISTERED;
746 #if 0 /* driver model ordering issue */
747 class_device_create_file(&socket[i].socket.dev,
748 &class_device_attr_info);
749 class_device_create_file(&socket[i].socket.dev,
750 &class_device_attr_exca);
754 /* Finally, schedule a polling interrupt */
755 if (poll_interval != 0) {
756 poll_timer.function = pcc_interrupt_wrapper;
758 init_timer(&poll_timer);
759 poll_timer.expires = jiffies + poll_interval;
760 add_timer(&poll_timer);
764 } /* init_m32r_pcc */
766 static void __exit exit_m32r_pcc(void)
770 for (i = 0; i < pcc_sockets; i++)
771 if (socket[i].flags & IS_REGISTERED)
772 pcmcia_unregister_socket(&socket[i].socket);
774 platform_device_unregister(&pcc_device);
775 if (poll_interval != 0)
776 del_timer_sync(&poll_timer);
778 platform_driver_unregister(&pcc_driver);
779 } /* exit_m32r_pcc */
781 module_init(init_m32r_pcc);
782 module_exit(exit_m32r_pcc);
783 MODULE_LICENSE("Dual MPL/GPL");
784 /*====================================================================*/