2 * Modifications by Matt Porter (mporter@mvista.com) to support
3 * PPC44x Book E processors.
5 * This file contains the routines for initializing the MMU
6 * on the 4xx series of chips.
9 * Derived from arch/ppc/mm/init.c:
10 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
12 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
13 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
14 * Copyright (C) 1996 Paul Mackerras
15 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
17 * Derived from "arch/i386/mm/init.c"
18 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License
22 * as published by the Free Software Foundation; either version
23 * 2 of the License, or (at your option) any later version.
27 #include <linux/signal.h>
28 #include <linux/sched.h>
29 #include <linux/kernel.h>
30 #include <linux/errno.h>
31 #include <linux/string.h>
32 #include <linux/types.h>
33 #include <linux/ptrace.h>
34 #include <linux/mman.h>
36 #include <linux/swap.h>
37 #include <linux/stddef.h>
38 #include <linux/vmalloc.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <linux/highmem.h>
43 #include <asm/pgalloc.h>
46 #include <asm/mmu_context.h>
47 #include <asm/pgtable.h>
49 #include <asm/uaccess.h>
51 #include <asm/bootx.h>
52 #include <asm/machdep.h>
53 #include <asm/setup.h>
57 extern char etext[], _stext[];
59 /* Used by the 44x TLB replacement exception handler.
60 * Just needed it declared someplace.
62 unsigned int tlb_44x_index = 0;
63 unsigned int tlb_44x_hwater = 62;
66 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
69 ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
71 unsigned long attrib = 0;
73 __asm__ __volatile__("\
83 : "r" (attrib), "r" (phys), "r" (virt), "r" (slot),
84 "i" (PPC44x_TLB_VALID | PPC44x_TLB_256M),
85 "i" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
86 "i" (PPC44x_TLB_PAGEID),
87 "i" (PPC44x_TLB_XLAT),
88 "i" (PPC44x_TLB_ATTRIB));
92 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
94 void __init MMU_init_hw(void)
96 flush_instruction_cache();
99 unsigned long __init mmu_mapin_ram(void)
101 unsigned int pinned_tlbs = 1;
104 /* Determine number of entries necessary to cover lowmem */
105 pinned_tlbs = (unsigned int)
106 (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT);
108 /* Write upper watermark to save location */
109 tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
111 /* If necessary, set additional pinned TLBs */
113 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
114 unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE;
115 ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);