2 * arch/ppc/platforms/prpmc750_setup.c
4 * Board setup routines for Motorola PrPMC750
6 * Author: Matt Porter <mporter@mvista.com>
8 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
14 #include <linux/config.h>
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/errno.h>
19 #include <linux/reboot.h>
20 #include <linux/pci.h>
21 #include <linux/kdev_t.h>
22 #include <linux/types.h>
23 #include <linux/major.h>
24 #include <linux/initrd.h>
25 #include <linux/console.h>
26 #include <linux/delay.h>
27 #include <linux/irq.h>
28 #include <linux/seq_file.h>
29 #include <linux/ide.h>
30 #include <linux/root_dev.h>
31 #include <linux/slab.h>
32 #include <linux/serial_reg.h>
34 #include <asm/byteorder.h>
35 #include <asm/system.h>
36 #include <asm/pgtable.h>
41 #include <asm/machdep.h>
42 #include <asm/pci-bridge.h>
43 #include <asm/uaccess.h>
45 #include <asm/open_pic.h>
46 #include <asm/bootinfo.h>
51 extern unsigned long loops_per_jiffy;
53 extern void gen550_progress(char *, unsigned short);
55 static u_char prpmc750_openpic_initsenses[] __initdata =
57 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT0 */
58 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UART */
59 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_DEBUGINT */
60 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HAWK_WDT */
61 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
62 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_ABORT */
63 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT1 */
64 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT2 */
65 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT3 */
66 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTA */
67 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTB */
68 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTC */
69 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTD */
70 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
71 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
72 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
76 * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
77 * Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22.
80 prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
82 static char pci_irq_table[][4] =
84 * PCI IDSEL/INTPIN->INTLINE
88 {12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */
89 {0, 0, 0, 0}, /* IDSEL 15 - unused */
90 {10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */
91 {10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */
92 {11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
93 {0, 0, 0, 0}, /* IDSEL 19 - unused */
94 {9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */
95 {11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */
96 {12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */
98 const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
99 return PCI_IRQ_TABLE_LOOKUP;
102 static void __init prpmc750_pcibios_fixup(void)
108 * Kludge to clean up after PPC6BUG which doesn't
109 * configure the CL5446 VGA card. Also the
110 * resource subsystem doesn't fixup the
111 * PCI mem resources on the CL5446.
113 if ((dev = pci_get_device(PCI_VENDOR_ID_CIRRUS,
114 PCI_DEVICE_ID_CIRRUS_5446, 0))) {
115 dev->resource[0].start += PRPMC750_PCI_PHY_MEM_OFFSET;
116 dev->resource[0].end += PRPMC750_PCI_PHY_MEM_OFFSET;
117 pci_read_config_word(dev, PCI_COMMAND, &wtmp);
118 pci_write_config_word(dev, PCI_COMMAND, wtmp | 3);
119 /* Enable Color mode in MISC reg */
121 /* Select DRAM config reg */
123 /* Set proper DRAM config */
129 void __init prpmc750_find_bridges(void)
131 struct pci_controller *hose;
133 hose = pcibios_alloc_controller();
137 hose->first_busno = 0;
138 hose->last_busno = 0xff;
139 hose->io_base_virt = (void *)PRPMC750_ISA_IO_BASE;
140 hose->pci_mem_offset = PRPMC750_PCI_PHY_MEM_OFFSET;
142 pci_init_resource(&hose->io_resource,
143 PRPMC750_PCI_IO_START,
145 IORESOURCE_IO, "PCI host bridge");
147 pci_init_resource(&hose->mem_resources[0],
148 PRPMC750_PROC_PCI_MEM_START,
149 PRPMC750_PROC_PCI_MEM_END,
150 IORESOURCE_MEM, "PCI host bridge");
152 hose->io_space.start = PRPMC750_PCI_IO_START;
153 hose->io_space.end = PRPMC750_PCI_IO_END;
154 hose->mem_space.start = PRPMC750_PCI_MEM_START;
155 hose->mem_space.end = PRPMC750_PCI_MEM_END - HAWK_MPIC_SIZE;
157 if (hawk_init(hose, PRPMC750_HAWK_PPC_REG_BASE,
158 PRPMC750_PROC_PCI_MEM_START,
159 PRPMC750_PROC_PCI_MEM_END - HAWK_MPIC_SIZE,
160 PRPMC750_PROC_PCI_IO_START, PRPMC750_PROC_PCI_IO_END,
161 PRPMC750_PROC_PCI_MEM_END - HAWK_MPIC_SIZE + 1)
163 printk(KERN_CRIT "Could not initialize host bridge\n");
166 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
168 ppc_md.pcibios_fixup = prpmc750_pcibios_fixup;
169 ppc_md.pci_swizzle = common_swizzle;
170 ppc_md.pci_map_irq = prpmc_map_irq;
172 static int prpmc750_show_cpuinfo(struct seq_file *m)
174 seq_printf(m, "machine\t\t: PrPMC750\n");
179 static void __init prpmc750_setup_arch(void)
181 /* init to some ~sane value until calibrate_delay() runs */
182 loops_per_jiffy = 50000000 / HZ;
184 /* Lookup PCI host bridges */
185 prpmc750_find_bridges();
187 #ifdef CONFIG_BLK_DEV_INITRD
189 ROOT_DEV = Root_RAM0;
192 #ifdef CONFIG_ROOT_NFS
195 ROOT_DEV = Root_SDA2;
198 OpenPIC_InitSenses = prpmc750_openpic_initsenses;
199 OpenPIC_NumInitSenses = sizeof(prpmc750_openpic_initsenses);
201 printk(KERN_INFO "Port by MontaVista Software, Inc. "
202 "(source@mvista.com)\n");
206 * Compute the PrPMC750's bus speed using the baud clock as a
209 static unsigned long __init prpmc750_get_bus_speed(void)
211 unsigned long tbl_start, tbl_end;
212 unsigned long current_state, old_state, bus_speed;
213 unsigned char lcr, dll, dlm;
214 int baud_divisor, count;
216 /* Read the UART's baud clock divisor */
217 lcr = readb(PRPMC750_SERIAL_0_LCR);
218 writeb(lcr | UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
219 dll = readb(PRPMC750_SERIAL_0_DLL);
220 dlm = readb(PRPMC750_SERIAL_0_DLM);
221 writeb(lcr & ~UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
222 baud_divisor = (dlm << 8) | dll;
225 * Use the baud clock divisor and base baud clock
226 * to determine the baud rate and use that as
227 * the number of baud clock edges we use for
228 * the time base sample. Make it half the baud
231 count = PRPMC750_BASE_BAUD / (baud_divisor * 16);
233 /* Find the first edge of the baud clock */
234 old_state = readb(PRPMC750_STATUS_REG) & PRPMC750_BAUDOUT_MASK;
236 current_state = readb(PRPMC750_STATUS_REG) &
237 PRPMC750_BAUDOUT_MASK;
238 } while (old_state == current_state);
240 old_state = current_state;
242 /* Get the starting time base value */
243 tbl_start = get_tbl();
246 * Loop until we have found a number of edges equal
247 * to half the count (half the baud rate)
251 current_state = readb(PRPMC750_STATUS_REG) &
252 PRPMC750_BAUDOUT_MASK;
253 } while (old_state == current_state);
254 old_state = current_state;
257 /* Get the ending time base value */
260 /* Compute bus speed */
261 bus_speed = (tbl_end - tbl_start) * 128;
266 static void __init prpmc750_calibrate_decr(void)
271 freq = prpmc750_get_bus_speed();
273 tb_ticks_per_jiffy = freq / (HZ * divisor);
274 tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
277 static void prpmc750_restart(char *cmd)
280 writeb(PRPMC750_MODRST_MASK, PRPMC750_MODRST_REG);
284 static void prpmc750_halt(void)
290 static void prpmc750_power_off(void)
295 static void __init prpmc750_init_IRQ(void)
301 * Set BAT 3 to map 0xf0000000 to end of physical memory space.
303 static __inline__ void prpmc750_set_bat(void)
306 mtspr(SPRN_DBAT1U, 0xf0001ffe);
307 mtspr(SPRN_DBAT1L, 0xf000002a);
312 * We need to read the Falcon/Hawk memory controller
313 * to properly determine this value
315 static unsigned long __init prpmc750_find_end_of_memory(void)
317 /* Read the memory size from the Hawk SMC */
318 return hawk_get_mem_size(PRPMC750_HAWK_SMC_BASE);
321 static void __init prpmc750_map_io(void)
323 io_block_mapping(PRPMC750_ISA_IO_BASE, PRPMC750_ISA_IO_BASE,
324 0x10000000, _PAGE_IO);
326 io_block_mapping(0xf0000000, 0xc0000000, 0x08000000, _PAGE_IO);
328 io_block_mapping(0xf8000000, 0xf8000000, 0x08000000, _PAGE_IO);
332 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
333 unsigned long r6, unsigned long r7)
335 parse_bootinfo(find_bootinfo());
337 /* Cover the Hawk registers with a BAT */
340 isa_io_base = PRPMC750_ISA_IO_BASE;
341 isa_mem_base = PRPMC750_ISA_MEM_BASE;
342 pci_dram_offset = PRPMC750_PCI_DRAM_OFFSET;
344 ppc_md.setup_arch = prpmc750_setup_arch;
345 ppc_md.show_cpuinfo = prpmc750_show_cpuinfo;
346 ppc_md.init_IRQ = prpmc750_init_IRQ;
347 ppc_md.get_irq = openpic_get_irq;
349 ppc_md.find_end_of_memory = prpmc750_find_end_of_memory;
350 ppc_md.setup_io_mappings = prpmc750_map_io;
352 ppc_md.restart = prpmc750_restart;
353 ppc_md.power_off = prpmc750_power_off;
354 ppc_md.halt = prpmc750_halt;
356 /* PrPMC750 has no timekeeper part */
357 ppc_md.time_init = NULL;
358 ppc_md.get_rtc_time = NULL;
359 ppc_md.set_rtc_time = NULL;
360 ppc_md.calibrate_decr = prpmc750_calibrate_decr;
362 #ifdef CONFIG_SERIAL_TEXT_DEBUG
363 ppc_md.progress = gen550_progress;
364 #endif /* CONFIG_SERIAL_TEXT_DEBUG */