git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/p54/p54common.c

   1 /*
   2  * Common code for mac80211 Prism54 drivers
   3  *
   4  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   5  * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
   6  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
   7  *
   8  * Based on the islsm (softmac prism54) driver, which is:
   9  * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/firmware.h>
  18 #include <linux/etherdevice.h>
  19
  20 #include <net/mac80211.h>
  21
  22 #include "p54.h"
  23 #include "p54common.h"
  24
  25 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  26 MODULE_DESCRIPTION("Softmac Prism54 common code");
  27 MODULE_LICENSE("GPL");
  28 MODULE_ALIAS("prism54common");
  29
  30 static struct ieee80211_rate p54_bgrates[] = {
  31         { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  32         { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  33         { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  34         { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  35         { .bitrate = 60, .hw_value = 4, },
  36         { .bitrate = 90, .hw_value = 5, },
  37         { .bitrate = 120, .hw_value = 6, },
  38         { .bitrate = 180, .hw_value = 7, },
  39         { .bitrate = 240, .hw_value = 8, },
  40         { .bitrate = 360, .hw_value = 9, },
  41         { .bitrate = 480, .hw_value = 10, },
  42         { .bitrate = 540, .hw_value = 11, },
  43 };
  44
  45 static struct ieee80211_channel p54_bgchannels[] = {
  46         { .center_freq = 2412, .hw_value = 1, },
  47         { .center_freq = 2417, .hw_value = 2, },
  48         { .center_freq = 2422, .hw_value = 3, },
  49         { .center_freq = 2427, .hw_value = 4, },
  50         { .center_freq = 2432, .hw_value = 5, },
  51         { .center_freq = 2437, .hw_value = 6, },
  52         { .center_freq = 2442, .hw_value = 7, },
  53         { .center_freq = 2447, .hw_value = 8, },
  54         { .center_freq = 2452, .hw_value = 9, },
  55         { .center_freq = 2457, .hw_value = 10, },
  56         { .center_freq = 2462, .hw_value = 11, },
  57         { .center_freq = 2467, .hw_value = 12, },
  58         { .center_freq = 2472, .hw_value = 13, },
  59         { .center_freq = 2484, .hw_value = 14, },
  60 };
  61
  62 static struct ieee80211_supported_band band_2GHz = {
  63         .channels = p54_bgchannels,
  64         .n_channels = ARRAY_SIZE(p54_bgchannels),
  65         .bitrates = p54_bgrates,
  66         .n_bitrates = ARRAY_SIZE(p54_bgrates),
  67 };
  68
  69 static struct ieee80211_rate p54_arates[] = {
  70         { .bitrate = 60, .hw_value = 4, },
  71         { .bitrate = 90, .hw_value = 5, },
  72         { .bitrate = 120, .hw_value = 6, },
  73         { .bitrate = 180, .hw_value = 7, },
  74         { .bitrate = 240, .hw_value = 8, },
  75         { .bitrate = 360, .hw_value = 9, },
  76         { .bitrate = 480, .hw_value = 10, },
  77         { .bitrate = 540, .hw_value = 11, },
  78 };
  79
  80 static struct ieee80211_channel p54_achannels[] = {
  81         { .center_freq = 4920 },
  82         { .center_freq = 4940 },
  83         { .center_freq = 4960 },
  84         { .center_freq = 4980 },
  85         { .center_freq = 5040 },
  86         { .center_freq = 5060 },
  87         { .center_freq = 5080 },
  88         { .center_freq = 5170 },
  89         { .center_freq = 5180 },
  90         { .center_freq = 5190 },
  91         { .center_freq = 5200 },
  92         { .center_freq = 5210 },
  93         { .center_freq = 5220 },
  94         { .center_freq = 5230 },
  95         { .center_freq = 5240 },
  96         { .center_freq = 5260 },
  97         { .center_freq = 5280 },
  98         { .center_freq = 5300 },
  99         { .center_freq = 5320 },
 100         { .center_freq = 5500 },
 101         { .center_freq = 5520 },
 102         { .center_freq = 5540 },
 103         { .center_freq = 5560 },
 104         { .center_freq = 5580 },
 105         { .center_freq = 5600 },
 106         { .center_freq = 5620 },
 107         { .center_freq = 5640 },
 108         { .center_freq = 5660 },
 109         { .center_freq = 5680 },
 110         { .center_freq = 5700 },
 111         { .center_freq = 5745 },
 112         { .center_freq = 5765 },
 113         { .center_freq = 5785 },
 114         { .center_freq = 5805 },
 115         { .center_freq = 5825 },
 116 };
 117
 118 static struct ieee80211_supported_band band_5GHz = {
 119         .channels = p54_achannels,
 120         .n_channels = ARRAY_SIZE(p54_achannels),
 121         .bitrates = p54_arates,
 122         .n_bitrates = ARRAY_SIZE(p54_arates),
 123 };
 124
 125 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
 126 {
 127         struct p54_common *priv = dev->priv;
 128         struct bootrec_exp_if *exp_if;
 129         struct bootrec *bootrec;
 130         u32 *data = (u32 *)fw->data;
 131         u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
 132         u8 *fw_version = NULL;
 133         size_t len;
 134         int i;
 135
 136         if (priv->rx_start)
 137                 return 0;
 138
 139         while (data < end_data && *data)
 140                 data++;
 141
 142         while (data < end_data && !*data)
 143                 data++;
 144
 145         bootrec = (struct bootrec *) data;
 146
 147         while (bootrec->data <= end_data &&
 148                (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
 149                 u32 code = le32_to_cpu(bootrec->code);
 150                 switch (code) {
 151                 case BR_CODE_COMPONENT_ID:
 152                         priv->fw_interface = be32_to_cpup((__be32 *)
 153                                              bootrec->data);
 154                         switch (priv->fw_interface) {
 155                         case FW_FMAC:
 156                                 printk(KERN_INFO "p54: FreeMAC firmware\n");
 157                                 break;
 158                         case FW_LM20:
 159                                 printk(KERN_INFO "p54: LM20 firmware\n");
 160                                 break;
 161                         case FW_LM86:
 162                                 printk(KERN_INFO "p54: LM86 firmware\n");
 163                                 break;
 164                         case FW_LM87:
 165                                 printk(KERN_INFO "p54: LM87 firmware\n");
 166                                 break;
 167                         default:
 168                                 printk(KERN_INFO "p54: unknown firmware\n");
 169                                 break;
 170                         }
 171                         break;
 172                 case BR_CODE_COMPONENT_VERSION:
 173                         /* 24 bytes should be enough for all firmwares */
 174                         if (strnlen((unsigned char*)bootrec->data, 24) < 24)
 175                                 fw_version = (unsigned char*)bootrec->data;
 176                         break;
 177                 case BR_CODE_DESCR: {
 178                         struct bootrec_desc *desc =
 179                                 (struct bootrec_desc *)bootrec->data;
 180                         priv->rx_start = le32_to_cpu(desc->rx_start);
 181                         /* FIXME add sanity checking */
 182                         priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
 183                         priv->headroom = desc->headroom;
 184                         priv->tailroom = desc->tailroom;
 185                         if (le32_to_cpu(bootrec->len) == 11)
 186                                 priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
 187                         else
 188                                 priv->rx_mtu = (size_t)
 189                                         0x620 - priv->tx_hdr_len;
 190                         break;
 191                         }
 192                 case BR_CODE_EXPOSED_IF:
 193                         exp_if = (struct bootrec_exp_if *) bootrec->data;
 194                         for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
 195                                 if (exp_if[i].if_id == cpu_to_le16(0x1a))
 196                                         priv->fw_var = le16_to_cpu(exp_if[i].variant);
 197                         break;
 198                 case BR_CODE_DEPENDENT_IF:
 199                         break;
 200                 case BR_CODE_END_OF_BRA:
 201                 case LEGACY_BR_CODE_END_OF_BRA:
 202                         end_data = NULL;
 203                         break;
 204                 default:
 205                         break;
 206                 }
 207                 bootrec = (struct bootrec *)&bootrec->data[len];
 208         }
 209
 210         if (fw_version)
 211                 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
 212                         fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
 213
 214         if (priv->fw_var >= 0x300) {
 215                 /* Firmware supports QoS, use it! */
 216                 priv->tx_stats[4].limit = 3;
 217                 priv->tx_stats[5].limit = 4;
 218                 priv->tx_stats[6].limit = 3;
 219                 priv->tx_stats[7].limit = 1;
 220                 dev->queues = 4;
 221         }
 222
 223         return 0;
 224 }
 225 EXPORT_SYMBOL_GPL(p54_parse_firmware);
 226
 227 static int p54_convert_rev0(struct ieee80211_hw *dev,
 228                             struct pda_pa_curve_data *curve_data)
 229 {
 230         struct p54_common *priv = dev->priv;
 231         struct p54_pa_curve_data_sample *dst;
 232         struct pda_pa_curve_data_sample_rev0 *src;
 233         size_t cd_len = sizeof(*curve_data) +
 234                 (curve_data->points_per_channel*sizeof(*dst) + 2) *
 235                  curve_data->channels;
 236         unsigned int i, j;
 237         void *source, *target;
 238
 239         priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
 240         if (!priv->curve_data)
 241                 return -ENOMEM;
 242
 243         memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
 244         source = curve_data->data;
 245         target = priv->curve_data->data;
 246         for (i = 0; i < curve_data->channels; i++) {
 247                 __le16 *freq = source;
 248                 source += sizeof(__le16);
 249                 *((__le16 *)target) = *freq;
 250                 target += sizeof(__le16);
 251                 for (j = 0; j < curve_data->points_per_channel; j++) {
 252                         dst = target;
 253                         src = source;
 254
 255                         dst->rf_power = src->rf_power;
 256                         dst->pa_detector = src->pa_detector;
 257                         dst->data_64qam = src->pcv;
 258                         /* "invent" the points for the other modulations */
 259 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
 260                         dst->data_16qam = SUB(src->pcv, 12);
 261                         dst->data_qpsk = SUB(dst->data_16qam, 12);
 262                         dst->data_bpsk = SUB(dst->data_qpsk, 12);
 263                         dst->data_barker = SUB(dst->data_bpsk, 14);
 264 #undef SUB
 265                         target += sizeof(*dst);
 266                         source += sizeof(*src);
 267                 }
 268         }
 269
 270         return 0;
 271 }
 272
 273 static int p54_convert_rev1(struct ieee80211_hw *dev,
 274                             struct pda_pa_curve_data *curve_data)
 275 {
 276         struct p54_common *priv = dev->priv;
 277         struct p54_pa_curve_data_sample *dst;
 278         struct pda_pa_curve_data_sample_rev1 *src;
 279         size_t cd_len = sizeof(*curve_data) +
 280                 (curve_data->points_per_channel*sizeof(*dst) + 2) *
 281                  curve_data->channels;
 282         unsigned int i, j;
 283         void *source, *target;
 284
 285         priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
 286         if (!priv->curve_data)
 287                 return -ENOMEM;
 288
 289         memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
 290         source = curve_data->data;
 291         target = priv->curve_data->data;
 292         for (i = 0; i < curve_data->channels; i++) {
 293                 __le16 *freq = source;
 294                 source += sizeof(__le16);
 295                 *((__le16 *)target) = *freq;
 296                 target += sizeof(__le16);
 297                 for (j = 0; j < curve_data->points_per_channel; j++) {
 298                         memcpy(target, source, sizeof(*src));
 299
 300                         target += sizeof(*dst);
 301                         source += sizeof(*src);
 302                 }
 303                 source++;
 304         }
 305
 306         return 0;
 307 }
 308
 309 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
 310                               "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
 311 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
 312
 313 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
 314 {
 315         struct p54_common *priv = dev->priv;
 316         struct eeprom_pda_wrap *wrap = NULL;
 317         struct pda_entry *entry;
 318         unsigned int data_len, entry_len;
 319         void *tmp;
 320         int err;
 321         u8 *end = (u8 *)eeprom + len;
 322         u16 synth = 0;
 323
 324         wrap = (struct eeprom_pda_wrap *) eeprom;
 325         entry = (void *)wrap->data + le16_to_cpu(wrap->len);
 326
 327         /* verify that at least the entry length/code fits */
 328         while ((u8 *)entry <= end - sizeof(*entry)) {
 329                 entry_len = le16_to_cpu(entry->len);
 330                 data_len = ((entry_len - 1) << 1);
 331
 332                 /* abort if entry exceeds whole structure */
 333                 if ((u8 *)entry + sizeof(*entry) + data_len > end)
 334                         break;
 335
 336                 switch (le16_to_cpu(entry->code)) {
 337                 case PDR_MAC_ADDRESS:
 338                         SET_IEEE80211_PERM_ADDR(dev, entry->data);
 339                         break;
 340                 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
 341                         if (data_len < 2) {
 342                                 err = -EINVAL;
 343                                 goto err;
 344                         }
 345
 346                         if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
 347                                 err = -EINVAL;
 348                                 goto err;
 349                         }
 350
 351                         priv->output_limit = kmalloc(entry->data[1] *
 352                                 sizeof(*priv->output_limit), GFP_KERNEL);
 353
 354                         if (!priv->output_limit) {
 355                                 err = -ENOMEM;
 356                                 goto err;
 357                         }
 358
 359                         memcpy(priv->output_limit, &entry->data[2],
 360                                entry->data[1]*sizeof(*priv->output_limit));
 361                         priv->output_limit_len = entry->data[1];
 362                         break;
 363                 case PDR_PRISM_PA_CAL_CURVE_DATA: {
 364                         struct pda_pa_curve_data *curve_data =
 365                                 (struct pda_pa_curve_data *)entry->data;
 366                         if (data_len < sizeof(*curve_data)) {
 367                                 err = -EINVAL;
 368                                 goto err;
 369                         }
 370
 371                         switch (curve_data->cal_method_rev) {
 372                         case 0:
 373                                 err = p54_convert_rev0(dev, curve_data);
 374                                 break;
 375                         case 1:
 376                                 err = p54_convert_rev1(dev, curve_data);
 377                                 break;
 378                         default:
 379                                 printk(KERN_ERR "p54: unknown curve data "
 380                                                 "revision %d\n",
 381                                                 curve_data->cal_method_rev);
 382                                 err = -ENODEV;
 383                                 break;
 384                         }
 385                         if (err)
 386                                 goto err;
 387
 388                 }
 389                 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
 390                         priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
 391                         if (!priv->iq_autocal) {
 392                                 err = -ENOMEM;
 393                                 goto err;
 394                         }
 395
 396                         memcpy(priv->iq_autocal, entry->data, data_len);
 397                         priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
 398                         break;
 399                 case PDR_INTERFACE_LIST:
 400                         tmp = entry->data;
 401                         while ((u8 *)tmp < entry->data + data_len) {
 402                                 struct bootrec_exp_if *exp_if = tmp;
 403                                 if (le16_to_cpu(exp_if->if_id) == 0xf)
 404                                         synth = le16_to_cpu(exp_if->variant);
 405                                 tmp += sizeof(struct bootrec_exp_if);
 406                         }
 407                         break;
 408                 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
 409                         priv->version = *(u8 *)(entry->data + 1);
 410                         break;
 411                 case PDR_END:
 412                         /* make it overrun */
 413                         entry_len = len;
 414                         break;
 415                 default:
 416                         printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
 417                                 le16_to_cpu(entry->code));
 418                         break;
 419                 }
 420
 421                 entry = (void *)entry + (entry_len + 1)*2;
 422         }
 423
 424         if (!synth || !priv->iq_autocal || !priv->output_limit ||
 425             !priv->curve_data) {
 426                 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
 427                 err = -EINVAL;
 428                 goto err;
 429         }
 430
 431         priv->rxhw = synth & 0x07;
 432         if (priv->rxhw == 4)
 433                 p54_init_xbow_synth(dev);
 434         if (!(synth & 0x40))
 435                 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
 436         if (!(synth & 0x80))
 437                 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
 438
 439         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
 440                 u8 perm_addr[ETH_ALEN];
 441
 442                 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
 443                         wiphy_name(dev->wiphy));
 444                 random_ether_addr(perm_addr);
 445                 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
 446         }
 447
 448         printk(KERN_INFO "%s: hwaddr %pM, MAC:isl38%02x RF:%s\n",
 449                 wiphy_name(dev->wiphy),
 450                 dev->wiphy->perm_addr,
 451                 priv->version, p54_rf_chips[priv->rxhw]);
 452
 453         return 0;
 454
 455   err:
 456         if (priv->iq_autocal) {
 457                 kfree(priv->iq_autocal);
 458                 priv->iq_autocal = NULL;
 459         }
 460
 461         if (priv->output_limit) {
 462                 kfree(priv->output_limit);
 463                 priv->output_limit = NULL;
 464         }
 465
 466         if (priv->curve_data) {
 467                 kfree(priv->curve_data);
 468                 priv->curve_data = NULL;
 469         }
 470
 471         printk(KERN_ERR "p54: eeprom parse failed!\n");
 472         return err;
 473 }
 474
 475 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
 476 {
 477         /* TODO: get the rssi_add & rssi_mul data from the eeprom */
 478         return ((rssi * 0x83) / 64 - 400) / 4;
 479 }
 480
 481 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
 482 {
 483         struct p54_common *priv = dev->priv;
 484         struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
 485         struct ieee80211_rx_status rx_status = {0};
 486         u16 freq = le16_to_cpu(hdr->freq);
 487         size_t header_len = sizeof(*hdr);
 488         u32 tsf32;
 489
 490         if (!(hdr->magic & cpu_to_le16(0x0001))) {
 491                 if (priv->filter_flags & FIF_FCSFAIL)
 492                         rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 493                 else
 494                         return 0;
 495         }
 496
 497         rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
 498         rx_status.noise = priv->noise;
 499         /* XX correct? */
 500         rx_status.qual = (100 * hdr->rssi) / 127;
 501         rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
 502                         hdr->rate : (hdr->rate - 4)) & 0xf;
 503         rx_status.freq = freq;
 504         rx_status.band =  dev->conf.channel->band;
 505         rx_status.antenna = hdr->antenna;
 506
 507         tsf32 = le32_to_cpu(hdr->tsf32);
 508         if (tsf32 < priv->tsf_low32)
 509                 priv->tsf_high32++;
 510         rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
 511         priv->tsf_low32 = tsf32;
 512
 513         rx_status.flag |= RX_FLAG_TSFT;
 514
 515         if (hdr->magic & cpu_to_le16(0x4000))
 516                 header_len += hdr->align[0];
 517
 518         skb_pull(skb, header_len);
 519         skb_trim(skb, le16_to_cpu(hdr->len));
 520
 521         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 522
 523         return -1;
 524 }
 525
 526 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
 527 {
 528         struct p54_common *priv = dev->priv;
 529         int i;
 530
 531         for (i = 0; i < dev->queues; i++)
 532                 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
 533                         ieee80211_wake_queue(dev, i);
 534 }
 535
 536 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
 537 {
 538         struct p54_common *priv = dev->priv;
 539         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
 540         struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
 541         struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
 542         u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
 543         struct memrecord *range = NULL;
 544         u32 freed = 0;
 545         u32 last_addr = priv->rx_start;
 546         unsigned long flags;
 547         int count, idx;
 548
 549         spin_lock_irqsave(&priv->tx_queue.lock, flags);
 550         while (entry != (struct sk_buff *)&priv->tx_queue) {
 551                 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
 552                 range = (void *)info->rate_driver_data;
 553                 if (range->start_addr == addr) {
 554                         struct p54_control_hdr *entry_hdr;
 555                         struct p54_tx_control_allocdata *entry_data;
 556                         int pad = 0;
 557
 558                         if (entry->next != (struct sk_buff *)&priv->tx_queue) {
 559                                 struct ieee80211_tx_info *ni;
 560                                 struct memrecord *mr;
 561
 562                                 ni = IEEE80211_SKB_CB(entry->next);
 563                                 mr = (struct memrecord *)ni->rate_driver_data;
 564                                 freed = mr->start_addr - last_addr;
 565                         } else
 566                                 freed = priv->rx_end - last_addr;
 567
 568                         last_addr = range->end_addr;
 569                         __skb_unlink(entry, &priv->tx_queue);
 570                         spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
 571
 572                         /*
 573                          * Clear manually, ieee80211_tx_info_clear_status would
 574                          * clear the counts too and we need them.
 575                          */
 576                         memset(&info->status.ampdu_ack_len, 0,
 577                                sizeof(struct ieee80211_tx_info) -
 578                                offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
 579                         BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
 580                                               status.ampdu_ack_len) != 23);
 581
 582                         entry_hdr = (struct p54_control_hdr *) entry->data;
 583                         entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
 584                         if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
 585                                 pad = entry_data->align[0];
 586
 587                         /* walk through the rates array and adjust the counts */
 588                         count = payload->retries;
 589                         for (idx = 0; idx < 4; idx++) {
 590                                 if (count >= info->status.rates[idx].count) {
 591                                         count -= info->status.rates[idx].count;
 592                                 } else if (count > 0) {
 593                                         info->status.rates[idx].count = count;
 594                                         count = 0;
 595                                 } else {
 596                                         info->status.rates[idx].idx = -1;
 597                                         info->status.rates[idx].count = 0;
 598                                 }
 599                         }
 600
 601                         priv->tx_stats[entry_data->hw_queue].len--;
 602                         if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
 603                             !(payload->status & 0x01))
 604                                 info->flags |= IEEE80211_TX_STAT_ACK;
 605                         info->status.ack_signal = p54_rssi_to_dbm(dev,
 606                                         le16_to_cpu(payload->ack_rssi));
 607                         skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
 608                         ieee80211_tx_status_irqsafe(dev, entry);
 609                         goto out;
 610                 } else
 611                         last_addr = range->end_addr;
 612                 entry = entry->next;
 613         }
 614         spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
 615
 616 out:
 617         if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
 618             sizeof(struct p54_control_hdr))
 619                 p54_wake_free_queues(dev);
 620 }
 621
 622 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
 623                                    struct sk_buff *skb)
 624 {
 625         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
 626         struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
 627         struct p54_common *priv = dev->priv;
 628
 629         if (!priv->eeprom)
 630                 return ;
 631
 632         memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
 633
 634         complete(&priv->eeprom_comp);
 635 }
 636
 637 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
 638 {
 639         struct p54_common *priv = dev->priv;
 640         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
 641         struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
 642         u32 tsf32 = le32_to_cpu(stats->tsf32);
 643
 644         if (tsf32 < priv->tsf_low32)
 645                 priv->tsf_high32++;
 646         priv->tsf_low32 = tsf32;
 647
 648         priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
 649         priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
 650         priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
 651
 652         priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
 653         complete(&priv->stats_comp);
 654
 655         mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
 656 }
 657
 658 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
 659 {
 660         struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
 661
 662         switch (le16_to_cpu(hdr->type)) {
 663         case P54_CONTROL_TYPE_TXDONE:
 664                 p54_rx_frame_sent(dev, skb);
 665                 break;
 666         case P54_CONTROL_TYPE_BBP:
 667                 break;
 668         case P54_CONTROL_TYPE_STAT_READBACK:
 669                 p54_rx_stats(dev, skb);
 670                 break;
 671         case P54_CONTROL_TYPE_EEPROM_READBACK:
 672                 p54_rx_eeprom_readback(dev, skb);
 673                 break;
 674         default:
 675                 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
 676                        wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
 677                 break;
 678         }
 679
 680         return 0;
 681 }
 682
 683 /* returns zero if skb can be reused */
 684 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
 685 {
 686         u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
 687
 688         if (type == 0x80)
 689                 return p54_rx_control(dev, skb);
 690         else
 691                 return p54_rx_data(dev, skb);
 692 }
 693 EXPORT_SYMBOL_GPL(p54_rx);
 694
 695 /*
 696  * So, the firmware is somewhat stupid and doesn't know what places in its
 697  * memory incoming data should go to. By poking around in the firmware, we
 698  * can find some unused memory to upload our packets to. However, data that we
 699  * want the card to TX needs to stay intact until the card has told us that
 700  * it is done with it. This function finds empty places we can upload to and
 701  * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
 702  * allocated areas.
 703  */
 704 static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
 705                                struct p54_control_hdr *data, u32 len)
 706 {
 707         struct p54_common *priv = dev->priv;
 708         struct sk_buff *entry = priv->tx_queue.next;
 709         struct sk_buff *target_skb = NULL;
 710         u32 last_addr = priv->rx_start;
 711         u32 largest_hole = 0;
 712         u32 target_addr = priv->rx_start;
 713         unsigned long flags;
 714         unsigned int left;
 715         len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
 716
 717         spin_lock_irqsave(&priv->tx_queue.lock, flags);
 718         left = skb_queue_len(&priv->tx_queue);
 719         while (left--) {
 720                 u32 hole_size;
 721                 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
 722                 struct memrecord *range = (void *)info->rate_driver_data;
 723                 hole_size = range->start_addr - last_addr;
 724                 if (!target_skb && hole_size >= len) {
 725                         target_skb = entry->prev;
 726                         hole_size -= len;
 727                         target_addr = last_addr;
 728                 }
 729                 largest_hole = max(largest_hole, hole_size);
 730                 last_addr = range->end_addr;
 731                 entry = entry->next;
 732         }
 733         if (!target_skb && priv->rx_end - last_addr >= len) {
 734                 target_skb = priv->tx_queue.prev;
 735                 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
 736                 if (!skb_queue_empty(&priv->tx_queue)) {
 737                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
 738                         struct memrecord *range = (void *)info->rate_driver_data;
 739                         target_addr = range->end_addr;
 740                 }
 741         } else
 742                 largest_hole = max(largest_hole, priv->rx_end - last_addr);
 743
 744         if (skb) {
 745                 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 746                 struct memrecord *range = (void *)info->rate_driver_data;
 747                 range->start_addr = target_addr;
 748                 range->end_addr = target_addr + len;
 749                 __skb_queue_after(&priv->tx_queue, target_skb, skb);
 750                 if (largest_hole < priv->rx_mtu + priv->headroom +
 751                                    priv->tailroom +
 752                                    sizeof(struct p54_control_hdr))
 753                         ieee80211_stop_queues(dev);
 754         }
 755         spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
 756
 757         data->req_id = cpu_to_le32(target_addr + priv->headroom);
 758 }
 759
 760 int p54_read_eeprom(struct ieee80211_hw *dev)
 761 {
 762         struct p54_common *priv = dev->priv;
 763         struct p54_control_hdr *hdr = NULL;
 764         struct p54_eeprom_lm86 *eeprom_hdr;
 765         size_t eeprom_size = 0x2020, offset = 0, blocksize;
 766         int ret = -ENOMEM;
 767         void *eeprom = NULL;
 768
 769         hdr = (struct p54_control_hdr *)kzalloc(sizeof(*hdr) +
 770                 sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN, GFP_KERNEL);
 771         if (!hdr)
 772                 goto free;
 773
 774         priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
 775         if (!priv->eeprom)
 776                 goto free;
 777
 778         eeprom = kzalloc(eeprom_size, GFP_KERNEL);
 779         if (!eeprom)
 780                 goto free;
 781
 782         hdr->magic1 = cpu_to_le16(0x8000);
 783         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
 784         hdr->retry1 = hdr->retry2 = 0;
 785         eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
 786
 787         while (eeprom_size) {
 788                 blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
 789                 hdr->len = cpu_to_le16(blocksize + sizeof(*eeprom_hdr));
 790                 eeprom_hdr->offset = cpu_to_le16(offset);
 791                 eeprom_hdr->len = cpu_to_le16(blocksize);
 792                 p54_assign_address(dev, NULL, hdr, le16_to_cpu(hdr->len) +
 793                                    sizeof(*hdr));
 794                 priv->tx(dev, hdr, le16_to_cpu(hdr->len) + sizeof(*hdr), 0);
 795
 796                 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
 797                         printk(KERN_ERR "%s: device does not respond!\n",
 798                                 wiphy_name(dev->wiphy));
 799                         ret = -EBUSY;
 800                         goto free;
 801                 }
 802
 803                 memcpy(eeprom + offset, priv->eeprom, blocksize);
 804                 offset += blocksize;
 805                 eeprom_size -= blocksize;
 806         }
 807
 808         ret = p54_parse_eeprom(dev, eeprom, offset);
 809 free:
 810         kfree(priv->eeprom);
 811         priv->eeprom = NULL;
 812         kfree(hdr);
 813         kfree(eeprom);
 814
 815         return ret;
 816 }
 817 EXPORT_SYMBOL_GPL(p54_read_eeprom);
 818
 819 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 820 {
 821         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 822         struct ieee80211_tx_queue_stats *current_queue;
 823         struct p54_common *priv = dev->priv;
 824         struct p54_control_hdr *hdr;
 825         struct p54_tx_control_allocdata *txhdr;
 826         size_t padding, len;
 827         int i, j, ridx;
 828         u8 rate;
 829         u8 cts_rate = 0x20;
 830         u8 rc_flags;
 831         u8 calculated_tries[4];
 832         u8 nrates = 0, nremaining = 8;
 833
 834         current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
 835         if (unlikely(current_queue->len > current_queue->limit))
 836                 return NETDEV_TX_BUSY;
 837         current_queue->len++;
 838         current_queue->count++;
 839         if (current_queue->len == current_queue->limit)
 840                 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
 841
 842         padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
 843         len = skb->len;
 844
 845         txhdr = (struct p54_tx_control_allocdata *)
 846                         skb_push(skb, sizeof(*txhdr) + padding);
 847         hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
 848
 849         if (padding)
 850                 hdr->magic1 = cpu_to_le16(0x4010);
 851         else
 852                 hdr->magic1 = cpu_to_le16(0x0010);
 853         hdr->len = cpu_to_le16(len);
 854         hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
 855         hdr->retry1 = info->control.rates[0].count;
 856
 857         /*
 858          * we register the rates in perfect order, and
 859          * RTS/CTS won't happen on 5 GHz
 860          */
 861         cts_rate = info->control.rts_cts_rate_idx;
 862
 863         memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
 864
 865         /* see how many rates got used */
 866         for (i = 0; i < 4; i++) {
 867                 if (info->control.rates[i].idx < 0)
 868                         break;
 869                 nrates++;
 870         }
 871
 872         /* limit tries to 8/nrates per rate */
 873         for (i = 0; i < nrates; i++) {
 874                 /*
 875                  * The magic expression here is equivalent to 8/nrates for
 876                  * all values that matter, but avoids division and jumps.
 877                  * Note that nrates can only take the values 1 through 4.
 878                  */
 879                 calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
 880                                                  info->control.rates[i].count);
 881                 nremaining -= calculated_tries[i];
 882         }
 883
 884         /* if there are tries left, distribute from back to front */
 885         for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
 886                 int tmp = info->control.rates[i].count - calculated_tries[i];
 887
 888                 if (tmp <= 0)
 889                         continue;
 890                 /* RC requested more tries at this rate */
 891
 892                 tmp = min_t(int, tmp, nremaining);
 893                 calculated_tries[i] += tmp;
 894                 nremaining -= tmp;
 895         }
 896
 897         ridx = 0;
 898         for (i = 0; i < nrates && ridx < 8; i++) {
 899                 /* we register the rates in perfect order */
 900                 rate = info->control.rates[i].idx;
 901                 if (info->band == IEEE80211_BAND_5GHZ)
 902                         rate += 4;
 903
 904                 /* store the count we actually calculated for TX status */
 905                 info->control.rates[i].count = calculated_tries[i];
 906
 907                 rc_flags = info->control.rates[i].flags;
 908                 if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
 909                         rate |= 0x10;
 910                         cts_rate |= 0x10;
 911                 }
 912                 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
 913                         rate |= 0x40;
 914                 else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
 915                         rate |= 0x20;
 916                 for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
 917                         txhdr->rateset[ridx] = rate;
 918                         ridx++;
 919                 }
 920         }
 921         hdr->retry2 = ridx;
 922
 923         txhdr->key_type = 0;
 924         txhdr->key_len = 0;
 925         txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
 926         txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
 927                 2 : info->antenna_sel_tx - 1;
 928         txhdr->output_power = priv->output_power;
 929         txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
 930                           0 : cts_rate;
 931         if (padding)
 932                 txhdr->align[0] = padding;
 933
 934         /* modifies skb->cb and with it info, so must be last! */
 935         p54_assign_address(dev, skb, hdr, skb->len);
 936
 937         priv->tx(dev, hdr, skb->len, 0);
 938         return 0;
 939 }
 940
 941 static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
 942                           const u8 *bssid)
 943 {
 944         struct p54_common *priv = dev->priv;
 945         struct p54_control_hdr *hdr;
 946         struct p54_tx_control_filter *filter;
 947         size_t data_len;
 948
 949         hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
 950                       priv->tx_hdr_len, GFP_ATOMIC);
 951         if (!hdr)
 952                 return -ENOMEM;
 953
 954         hdr = (void *)hdr + priv->tx_hdr_len;
 955
 956         filter = (struct p54_tx_control_filter *) hdr->data;
 957         hdr->magic1 = cpu_to_le16(0x8001);
 958         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
 959
 960         priv->filter_type = filter->filter_type = cpu_to_le16(filter_type);
 961         memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
 962         if (!bssid)
 963                 memset(filter->bssid, ~0, ETH_ALEN);
 964         else
 965                 memcpy(filter->bssid, bssid, ETH_ALEN);
 966         filter->rx_antenna = priv->rx_antenna;
 967         if (priv->fw_var < 0x500) {
 968                 data_len = P54_TX_CONTROL_FILTER_V1_LEN;
 969                 filter->v1.basic_rate_mask = cpu_to_le32(0x15f);
 970                 filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
 971                 filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
 972                 filter->v1.rxhw = cpu_to_le16(priv->rxhw);
 973                 filter->v1.wakeup_timer = cpu_to_le16(500);
 974         } else {
 975                 data_len = P54_TX_CONTROL_FILTER_V2_LEN;
 976                 filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
 977                 filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
 978                 filter->v2.rxhw = cpu_to_le16(priv->rxhw);
 979                 filter->v2.timer = cpu_to_le16(1000);
 980         }
 981         hdr->len = cpu_to_le16(data_len);
 982         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
 983         priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
 984         return 0;
 985 }
 986
 987 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
 988 {
 989         struct p54_common *priv = dev->priv;
 990         struct p54_control_hdr *hdr;
 991         struct p54_tx_control_channel *chan;
 992         unsigned int i;
 993         size_t data_len;
 994         void *entry;
 995
 996         hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
 997                       priv->tx_hdr_len, GFP_KERNEL);
 998         if (!hdr)
 999                 return -ENOMEM;
1000
1001         hdr = (void *)hdr + priv->tx_hdr_len;
1002
1003         chan = (struct p54_tx_control_channel *) hdr->data;
1004
1005         hdr->magic1 = cpu_to_le16(0x8001);
1006
1007         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
1008
1009         chan->flags = cpu_to_le16(0x1);
1010         chan->dwell = cpu_to_le16(0x0);
1011
1012         for (i = 0; i < priv->iq_autocal_len; i++) {
1013                 if (priv->iq_autocal[i].freq != freq)
1014                         continue;
1015
1016                 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
1017                        sizeof(*priv->iq_autocal));
1018                 break;
1019         }
1020         if (i == priv->iq_autocal_len)
1021                 goto err;
1022
1023         for (i = 0; i < priv->output_limit_len; i++) {
1024                 if (priv->output_limit[i].freq != freq)
1025                         continue;
1026
1027                 chan->val_barker = 0x38;
1028                 chan->val_bpsk = chan->dup_bpsk =
1029                         priv->output_limit[i].val_bpsk;
1030                 chan->val_qpsk = chan->dup_qpsk =
1031                         priv->output_limit[i].val_qpsk;
1032                 chan->val_16qam = chan->dup_16qam =
1033                         priv->output_limit[i].val_16qam;
1034                 chan->val_64qam = chan->dup_64qam =
1035                         priv->output_limit[i].val_64qam;
1036                 break;
1037         }
1038         if (i == priv->output_limit_len)
1039                 goto err;
1040
1041         entry = priv->curve_data->data;
1042         for (i = 0; i < priv->curve_data->channels; i++) {
1043                 if (*((__le16 *)entry) != freq) {
1044                         entry += sizeof(__le16);
1045                         entry += sizeof(struct p54_pa_curve_data_sample) *
1046                                  priv->curve_data->points_per_channel;
1047                         continue;
1048                 }
1049
1050                 entry += sizeof(__le16);
1051                 chan->pa_points_per_curve =
1052                         min(priv->curve_data->points_per_channel, (u8) 8);
1053
1054                 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
1055                        chan->pa_points_per_curve);
1056                 break;
1057         }
1058
1059         if (priv->fw_var < 0x500) {
1060                 data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
1061                 chan->v1.rssical_mul = cpu_to_le16(130);
1062                 chan->v1.rssical_add = cpu_to_le16(0xfe70);
1063         } else {
1064                 data_len = P54_TX_CONTROL_CHANNEL_V2_LEN;
1065                 chan->v2.rssical_mul = cpu_to_le16(130);
1066                 chan->v2.rssical_add = cpu_to_le16(0xfe70);
1067                 chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
1068         }
1069
1070         hdr->len = cpu_to_le16(data_len);
1071         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
1072         priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
1073         return 0;
1074
1075  err:
1076         printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1077         kfree(hdr);
1078         return -EINVAL;
1079 }
1080
1081 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1082 {
1083         struct p54_common *priv = dev->priv;
1084         struct p54_control_hdr *hdr;
1085         struct p54_tx_control_led *led;
1086
1087         hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
1088                       priv->tx_hdr_len, GFP_KERNEL);
1089         if (!hdr)
1090                 return -ENOMEM;
1091
1092         hdr = (void *)hdr + priv->tx_hdr_len;
1093         hdr->magic1 = cpu_to_le16(0x8001);
1094         hdr->len = cpu_to_le16(sizeof(*led));
1095         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
1096         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
1097
1098         led = (struct p54_tx_control_led *) hdr->data;
1099         led->mode = cpu_to_le16(mode);
1100         led->led_permanent = cpu_to_le16(link);
1101         led->led_temporary = cpu_to_le16(act);
1102         led->duration = cpu_to_le16(1000);
1103
1104         priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
1105
1106         return 0;
1107 }
1108
1109 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop)      \
1110 do {                                                            \
1111         queue.aifs = cpu_to_le16(ai_fs);                        \
1112         queue.cwmin = cpu_to_le16(cw_min);                      \
1113         queue.cwmax = cpu_to_le16(cw_max);                      \
1114         queue.txop = cpu_to_le16(_txop);                        \
1115 } while(0)
1116
1117 static void p54_init_vdcf(struct ieee80211_hw *dev)
1118 {
1119         struct p54_common *priv = dev->priv;
1120         struct p54_control_hdr *hdr;
1121         struct p54_tx_control_vdcf *vdcf;
1122
1123         /* all USB V1 adapters need a extra headroom */
1124         hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
1125         hdr->magic1 = cpu_to_le16(0x8001);
1126         hdr->len = cpu_to_le16(sizeof(*vdcf));
1127         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
1128         hdr->req_id = cpu_to_le32(priv->rx_start);
1129
1130         vdcf = (struct p54_tx_control_vdcf *) hdr->data;
1131
1132         P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
1133         P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
1134         P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
1135         P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
1136 }
1137
1138 static void p54_set_vdcf(struct ieee80211_hw *dev)
1139 {
1140         struct p54_common *priv = dev->priv;
1141         struct p54_control_hdr *hdr;
1142         struct p54_tx_control_vdcf *vdcf;
1143
1144         hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
1145
1146         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
1147
1148         vdcf = (struct p54_tx_control_vdcf *) hdr->data;
1149
1150         if (priv->use_short_slot) {
1151                 vdcf->slottime = 9;
1152                 vdcf->magic1 = 0x10;
1153                 vdcf->magic2 = 0x00;
1154         } else {
1155                 vdcf->slottime = 20;
1156                 vdcf->magic1 = 0x0a;
1157                 vdcf->magic2 = 0x06;
1158         }
1159
1160         /* (see prism54/isl_oid.h for further details) */
1161         vdcf->frameburst = cpu_to_le16(0);
1162
1163         priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
1164 }
1165
1166 static int p54_start(struct ieee80211_hw *dev)
1167 {
1168         struct p54_common *priv = dev->priv;
1169         int err;
1170
1171         if (!priv->cached_vdcf) {
1172                 priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
1173                         priv->tx_hdr_len + sizeof(struct p54_control_hdr),
1174                         GFP_KERNEL);
1175
1176                 if (!priv->cached_vdcf)
1177                         return -ENOMEM;
1178         }
1179
1180         if (!priv->cached_stats) {
1181                 priv->cached_stats = kzalloc(sizeof(struct p54_statistics) +
1182                         priv->tx_hdr_len + sizeof(struct p54_control_hdr),
1183                         GFP_KERNEL);
1184
1185                 if (!priv->cached_stats) {
1186                         kfree(priv->cached_vdcf);
1187                         priv->cached_vdcf = NULL;
1188                         return -ENOMEM;
1189                 }
1190         }
1191
1192         err = priv->open(dev);
1193         if (!err)
1194                 priv->mode = NL80211_IFTYPE_MONITOR;
1195
1196         p54_init_vdcf(dev);
1197         mod_timer(&priv->stats_timer, jiffies + HZ);
1198         return err;
1199 }
1200
1201 static void p54_stop(struct ieee80211_hw *dev)
1202 {
1203         struct p54_common *priv = dev->priv;
1204         struct sk_buff *skb;
1205
1206         del_timer(&priv->stats_timer);
1207         while ((skb = skb_dequeue(&priv->tx_queue)))
1208                 kfree_skb(skb);
1209         priv->stop(dev);
1210         priv->tsf_high32 = priv->tsf_low32 = 0;
1211         priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1212 }
1213
1214 static int p54_add_interface(struct ieee80211_hw *dev,
1215                              struct ieee80211_if_init_conf *conf)
1216 {
1217         struct p54_common *priv = dev->priv;
1218
1219         if (priv->mode != NL80211_IFTYPE_MONITOR)
1220                 return -EOPNOTSUPP;
1221
1222         switch (conf->type) {
1223         case NL80211_IFTYPE_STATION:
1224                 priv->mode = conf->type;
1225                 break;
1226         default:
1227                 return -EOPNOTSUPP;
1228         }
1229
1230         memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1231
1232         p54_set_filter(dev, 0, NULL);
1233
1234         switch (conf->type) {
1235         case NL80211_IFTYPE_STATION:
1236                 p54_set_filter(dev, 1, NULL);
1237                 break;
1238         default:
1239                 BUG();  /* impossible */
1240                 break;
1241         }
1242
1243         p54_set_leds(dev, 1, 0, 0);
1244
1245         return 0;
1246 }
1247
1248 static void p54_remove_interface(struct ieee80211_hw *dev,
1249                                  struct ieee80211_if_init_conf *conf)
1250 {
1251         struct p54_common *priv = dev->priv;
1252         priv->mode = NL80211_IFTYPE_MONITOR;
1253         memset(priv->mac_addr, 0, ETH_ALEN);
1254         p54_set_filter(dev, 0, NULL);
1255 }
1256
1257 static int p54_config(struct ieee80211_hw *dev, u32 changed)
1258 {
1259         int ret;
1260         struct p54_common *priv = dev->priv;
1261         struct ieee80211_conf *conf = &dev->conf;
1262
1263         mutex_lock(&priv->conf_mutex);
1264         priv->rx_antenna = 2; /* automatic */
1265         priv->output_power = conf->power_level << 2;
1266         ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
1267         p54_set_vdcf(dev);
1268         mutex_unlock(&priv->conf_mutex);
1269         return ret;
1270 }
1271
1272 static int p54_config_interface(struct ieee80211_hw *dev,
1273                                 struct ieee80211_vif *vif,
1274                                 struct ieee80211_if_conf *conf)
1275 {
1276         struct p54_common *priv = dev->priv;
1277
1278         mutex_lock(&priv->conf_mutex);
1279         p54_set_filter(dev, 0, conf->bssid);
1280         p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
1281         memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1282         mutex_unlock(&priv->conf_mutex);
1283         return 0;
1284 }
1285
1286 static void p54_configure_filter(struct ieee80211_hw *dev,
1287                                  unsigned int changed_flags,
1288                                  unsigned int *total_flags,
1289                                  int mc_count, struct dev_mc_list *mclist)
1290 {
1291         struct p54_common *priv = dev->priv;
1292
1293         *total_flags &= FIF_BCN_PRBRESP_PROMISC |
1294                         FIF_PROMISC_IN_BSS |
1295                         FIF_FCSFAIL;
1296
1297         priv->filter_flags = *total_flags;
1298
1299         if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1300                 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1301                         p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1302                                  NULL);
1303                 else
1304                         p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1305                                  priv->bssid);
1306         }
1307
1308         if (changed_flags & FIF_PROMISC_IN_BSS) {
1309                 if (*total_flags & FIF_PROMISC_IN_BSS)
1310                         p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
1311                                 0x8, NULL);
1312                 else
1313                         p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
1314                                 ~0x8, priv->bssid);
1315         }
1316 }
1317
1318 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1319                        const struct ieee80211_tx_queue_params *params)
1320 {
1321         struct p54_common *priv = dev->priv;
1322         struct p54_tx_control_vdcf *vdcf;
1323
1324         vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
1325                 ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
1326
1327         if ((params) && !(queue > 4)) {
1328                 P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
1329                         params->cw_min, params->cw_max, params->txop);
1330         } else
1331                 return -EINVAL;
1332
1333         p54_set_vdcf(dev);
1334
1335         return 0;
1336 }
1337
1338 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1339 {
1340         struct p54_common *priv = dev->priv;
1341         struct p54_control_hdr *hdr;
1342         struct p54_tx_control_xbow_synth *xbow;
1343
1344         hdr = kzalloc(sizeof(*hdr) + sizeof(*xbow) +
1345                       priv->tx_hdr_len, GFP_KERNEL);
1346         if (!hdr)
1347                 return -ENOMEM;
1348
1349         hdr = (void *)hdr + priv->tx_hdr_len;
1350         hdr->magic1 = cpu_to_le16(0x8001);
1351         hdr->len = cpu_to_le16(sizeof(*xbow));
1352         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_XBOW_SYNTH_CFG);
1353         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*xbow));
1354
1355         xbow = (struct p54_tx_control_xbow_synth *) hdr->data;
1356         xbow->magic1 = cpu_to_le16(0x1);
1357         xbow->magic2 = cpu_to_le16(0x2);
1358         xbow->freq = cpu_to_le16(5390);
1359
1360         priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*xbow), 1);
1361
1362         return 0;
1363 }
1364
1365 static void p54_statistics_timer(unsigned long data)
1366 {
1367         struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
1368         struct p54_common *priv = dev->priv;
1369         struct p54_control_hdr *hdr;
1370         struct p54_statistics *stats;
1371
1372         BUG_ON(!priv->cached_stats);
1373
1374         hdr = (void *)priv->cached_stats + priv->tx_hdr_len;
1375         hdr->magic1 = cpu_to_le16(0x8000);
1376         hdr->len = cpu_to_le16(sizeof(*stats));
1377         hdr->type = cpu_to_le16(P54_CONTROL_TYPE_STAT_READBACK);
1378         p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*stats));
1379
1380         priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*stats), 0);
1381 }
1382
1383 static int p54_get_stats(struct ieee80211_hw *dev,
1384                          struct ieee80211_low_level_stats *stats)
1385 {
1386         struct p54_common *priv = dev->priv;
1387
1388         del_timer(&priv->stats_timer);
1389         p54_statistics_timer((unsigned long)dev);
1390
1391         if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
1392                 printk(KERN_ERR "%s: device does not respond!\n",
1393                         wiphy_name(dev->wiphy));
1394                 return -EBUSY;
1395         }
1396
1397         memcpy(stats, &priv->stats, sizeof(*stats));
1398
1399         return 0;
1400 }
1401
1402 static int p54_get_tx_stats(struct ieee80211_hw *dev,
1403                             struct ieee80211_tx_queue_stats *stats)
1404 {
1405         struct p54_common *priv = dev->priv;
1406
1407         memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
1408
1409         return 0;
1410 }
1411
1412 static void p54_bss_info_changed(struct ieee80211_hw *dev,
1413                                  struct ieee80211_vif *vif,
1414                                  struct ieee80211_bss_conf *info,
1415                                  u32 changed)
1416 {
1417         struct p54_common *priv = dev->priv;
1418
1419         if (changed & BSS_CHANGED_ERP_SLOT) {
1420                 priv->use_short_slot = info->use_short_slot;
1421                 p54_set_vdcf(dev);
1422         }
1423 }
1424
1425 static const struct ieee80211_ops p54_ops = {
1426         .tx                     = p54_tx,
1427         .start                  = p54_start,
1428         .stop                   = p54_stop,
1429         .add_interface          = p54_add_interface,
1430         .remove_interface       = p54_remove_interface,
1431         .config                 = p54_config,
1432         .config_interface       = p54_config_interface,
1433         .bss_info_changed       = p54_bss_info_changed,
1434         .configure_filter       = p54_configure_filter,
1435         .conf_tx                = p54_conf_tx,
1436         .get_stats              = p54_get_stats,
1437         .get_tx_stats           = p54_get_tx_stats
1438 };
1439
1440 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
1441 {
1442         struct ieee80211_hw *dev;
1443         struct p54_common *priv;
1444
1445         dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
1446         if (!dev)
1447                 return NULL;
1448
1449         priv = dev->priv;
1450         priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1451         skb_queue_head_init(&priv->tx_queue);
1452         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
1453                      IEEE80211_HW_RX_INCLUDES_FCS |
1454                      IEEE80211_HW_SIGNAL_DBM |
1455                      IEEE80211_HW_NOISE_DBM;
1456
1457         /*
1458          * XXX: when this driver gets support for any mode that
1459          *      requires beacons (AP, MESH, IBSS) then it must
1460          *      implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1461          */
1462         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1463
1464         dev->channel_change_time = 1000;        /* TODO: find actual value */
1465         priv->tx_stats[0].limit = 1;
1466         priv->tx_stats[1].limit = 1;
1467         priv->tx_stats[2].limit = 1;
1468         priv->tx_stats[3].limit = 1;
1469         priv->tx_stats[4].limit = 5;
1470         dev->queues = 1;
1471         priv->noise = -94;
1472         /*
1473          * We support at most 8 tries no matter which rate they're at,
1474          * we cannot support max_rates * max_rate_tries as we set it
1475          * here, but setting it correctly to 4/2 or so would limit us
1476          * artificially if the RC algorithm wants just two rates, so
1477          * let's say 4/7, we'll redistribute it at TX time, see the
1478          * comments there.
1479          */
1480         dev->max_rates = 4;
1481         dev->max_rate_tries = 7;
1482         dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1483                                  sizeof(struct p54_tx_control_allocdata);
1484
1485         mutex_init(&priv->conf_mutex);
1486         init_completion(&priv->eeprom_comp);
1487         init_completion(&priv->stats_comp);
1488         setup_timer(&priv->stats_timer, p54_statistics_timer,
1489                 (unsigned long)dev);
1490
1491         return dev;
1492 }
1493 EXPORT_SYMBOL_GPL(p54_init_common);
1494
1495 void p54_free_common(struct ieee80211_hw *dev)
1496 {
1497         struct p54_common *priv = dev->priv;
1498         kfree(priv->cached_stats);
1499         kfree(priv->iq_autocal);
1500         kfree(priv->output_limit);
1501         kfree(priv->curve_data);
1502         kfree(priv->cached_vdcf);
1503 }
1504 EXPORT_SYMBOL_GPL(p54_free_common);
1505
1506 static int __init p54_init(void)
1507 {
1508         return 0;
1509 }
1510
1511 static void __exit p54_exit(void)
1512 {
1513 }
1514
1515 module_init(p54_init);
1516 module_exit(p54_exit);