V4L/DVB (12241): mt9v011: Fix vstart
[linux-2.6] / drivers / media / video / mt9v011.c
1 /*
2  * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
3  *
4  * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
5  * This code is placed under the terms of the GNU General Public License v2
6  */
7
8 #include <linux/i2c.h>
9 #include <linux/videodev2.h>
10 #include <linux/delay.h>
11 #include <asm/div64.h>
12 #include <media/v4l2-device.h>
13 #include "mt9v011.h"
14 #include <media/v4l2-i2c-drv.h>
15 #include <media/v4l2-chip-ident.h>
16
17 MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
18 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
19 MODULE_LICENSE("GPL");
20
21
22 static int debug;
23 module_param(debug, int, 0);
24 MODULE_PARM_DESC(debug, "Debug level (0-2)");
25
26 /* supported controls */
27 static struct v4l2_queryctrl mt9v011_qctrl[] = {
28         {
29                 .id = V4L2_CID_GAIN,
30                 .type = V4L2_CTRL_TYPE_INTEGER,
31                 .name = "Gain",
32                 .minimum = 0,
33                 .maximum = (1 << 10) - 1,
34                 .step = 1,
35                 .default_value = 0x0020,
36                 .flags = 0,
37         }, {
38                 .id = V4L2_CID_RED_BALANCE,
39                 .type = V4L2_CTRL_TYPE_INTEGER,
40                 .name = "Red Balance",
41                 .minimum = -1 << 9,
42                 .maximum = (1 << 9) - 1,
43                 .step = 1,
44                 .default_value = 0,
45                 .flags = 0,
46         }, {
47                 .id = V4L2_CID_BLUE_BALANCE,
48                 .type = V4L2_CTRL_TYPE_INTEGER,
49                 .name = "Blue Balance",
50                 .minimum = -1 << 9,
51                 .maximum = (1 << 9) - 1,
52                 .step = 1,
53                 .default_value = 0,
54                 .flags = 0,
55         },
56 };
57
58 struct mt9v011 {
59         struct v4l2_subdev sd;
60         unsigned width, height;
61         unsigned xtal;
62
63         u16 global_gain, red_bal, blue_bal;
64 };
65
66 static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
67 {
68         return container_of(sd, struct mt9v011, sd);
69 }
70
71 static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
72 {
73         struct i2c_client *c = v4l2_get_subdevdata(sd);
74         __be16 buffer;
75         int rc, val;
76
77         rc = i2c_master_send(c, &addr, 1);
78         if (rc != 1)
79                 v4l2_dbg(0, debug, sd,
80                          "i2c i/o error: rc == %d (should be 1)\n", rc);
81
82         msleep(10);
83
84         rc = i2c_master_recv(c, (char *)&buffer, 2);
85         if (rc != 2)
86                 v4l2_dbg(0, debug, sd,
87                          "i2c i/o error: rc == %d (should be 2)\n", rc);
88
89         val = be16_to_cpu(buffer);
90
91         v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
92
93         return val;
94 }
95
96 static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
97                                  u16 value)
98 {
99         struct i2c_client *c = v4l2_get_subdevdata(sd);
100         unsigned char buffer[3];
101         int rc;
102
103         buffer[0] = addr;
104         buffer[1] = value >> 8;
105         buffer[2] = value & 0xff;
106
107         v4l2_dbg(2, debug, sd,
108                  "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
109         rc = i2c_master_send(c, buffer, 3);
110         if (rc != 3)
111                 v4l2_dbg(0, debug, sd,
112                          "i2c i/o error: rc == %d (should be 3)\n", rc);
113 }
114
115
116 struct i2c_reg_value {
117         unsigned char reg;
118         u16           value;
119 };
120
121 /*
122  * Values used at the original driver
123  * Some values are marked as Reserved at the datasheet
124  */
125 static const struct i2c_reg_value mt9v011_init_default[] = {
126                 { R0D_MT9V011_RESET, 0x0001 },
127                 { R0D_MT9V011_RESET, 0x0000 },
128
129                 { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
130                 { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
131
132                 { R0A_MT9V011_CLK_SPEED, 0x0000 },
133                 { R1E_MT9V011_DIGITAL_ZOOM,  0x0000 },
134                 { R20_MT9V011_READ_MODE, 0x1000 },
135
136                 { R07_MT9V011_OUT_CTRL, 0x0002 },       /* chip enable */
137 };
138
139 static void set_balance(struct v4l2_subdev *sd)
140 {
141         struct mt9v011 *core = to_mt9v011(sd);
142         u16 green1_gain, green2_gain, blue_gain, red_gain;
143
144         green1_gain = core->global_gain;
145         green2_gain = core->global_gain;
146
147         blue_gain = core->global_gain +
148                     core->global_gain * core->blue_bal / (1 << 9);
149
150         red_gain = core->global_gain +
151                    core->global_gain * core->blue_bal / (1 << 9);
152
153         mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
154         mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN,  green1_gain);
155         mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
156         mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
157 }
158
159 static void calc_fps(struct v4l2_subdev *sd)
160 {
161         struct mt9v011 *core = to_mt9v011(sd);
162         unsigned height, width, hblank, vblank, speed;
163         unsigned row_time, t_time;
164         u64 frames_per_ms;
165         unsigned tmp;
166
167         height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
168         width = mt9v011_read(sd, R04_MT9V011_WIDTH);
169         hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
170         vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
171         speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
172
173         row_time = (width + 113 + hblank) * (speed + 2);
174         t_time = row_time * (height + vblank + 1);
175
176         frames_per_ms = core->xtal * 1000l;
177         do_div(frames_per_ms, t_time);
178         tmp = frames_per_ms;
179
180         v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
181                 tmp / 1000, tmp % 1000, t_time);
182 }
183
184 static void set_res(struct v4l2_subdev *sd)
185 {
186         struct mt9v011 *core = to_mt9v011(sd);
187         unsigned vstart, hstart;
188
189         /*
190          * The mt9v011 doesn't have scaling. So, in order to select the desired
191          * resolution, we're cropping at the middle of the sensor.
192          * hblank and vblank should be adjusted, in order to warrant that
193          * we'll preserve the line timings for 30 fps, no matter what resolution
194          * is selected.
195          * NOTE: datasheet says that width (and height) should be filled with
196          * width-1. However, this doesn't work, since one pixel per line will
197          * be missing.
198          */
199
200         hstart = 14 + (640 - core->width) / 2;
201         mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
202         mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
203         mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
204
205         vstart = 8 + (480 - core->height) / 2;
206         mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
207         mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
208         mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
209
210         calc_fps(sd);
211 };
212
213 static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
214 {
215         int i;
216
217         for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
218                 mt9v011_write(sd, mt9v011_init_default[i].reg,
219                                mt9v011_init_default[i].value);
220
221         set_balance(sd);
222         set_res(sd);
223
224         return 0;
225 };
226
227 static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
228 {
229         struct mt9v011 *core = to_mt9v011(sd);
230
231         v4l2_dbg(1, debug, sd, "g_ctrl called\n");
232
233         switch (ctrl->id) {
234         case V4L2_CID_GAIN:
235                 ctrl->value = core->global_gain;
236                 return 0;
237         case V4L2_CID_RED_BALANCE:
238                 ctrl->value = core->red_bal;
239                 return 0;
240         case V4L2_CID_BLUE_BALANCE:
241                 ctrl->value = core->blue_bal;
242                 return 0;
243         }
244         return -EINVAL;
245 }
246
247 static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
248 {
249         int i;
250
251         v4l2_dbg(1, debug, sd, "queryctrl called\n");
252
253         for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
254                 if (qc->id && qc->id == mt9v011_qctrl[i].id) {
255                         memcpy(qc, &(mt9v011_qctrl[i]),
256                                sizeof(*qc));
257                         return 0;
258                 }
259
260         return -EINVAL;
261 }
262
263
264 static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
265 {
266         struct mt9v011 *core = to_mt9v011(sd);
267         u8 i, n;
268         n = ARRAY_SIZE(mt9v011_qctrl);
269
270         for (i = 0; i < n; i++) {
271                 if (ctrl->id != mt9v011_qctrl[i].id)
272                         continue;
273                 if (ctrl->value < mt9v011_qctrl[i].minimum ||
274                     ctrl->value > mt9v011_qctrl[i].maximum)
275                         return -ERANGE;
276                 v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
277                                         ctrl->id, ctrl->value);
278                 break;
279         }
280
281         switch (ctrl->id) {
282         case V4L2_CID_GAIN:
283                 core->global_gain = ctrl->value;
284                 break;
285         case V4L2_CID_RED_BALANCE:
286                 core->red_bal = ctrl->value;
287                 break;
288         case V4L2_CID_BLUE_BALANCE:
289                 core->blue_bal = ctrl->value;
290                 break;
291         default:
292                 return -EINVAL;
293         }
294
295         set_balance(sd);
296
297         return 0;
298 }
299
300 static int mt9v011_enum_fmt(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmt)
301 {
302         if (fmt->index > 0)
303                 return -EINVAL;
304
305         fmt->flags = 0;
306         strcpy(fmt->description, "8 bpp Bayer GRGR..BGBG");
307         fmt->pixelformat = V4L2_PIX_FMT_SGRBG8;
308
309         return 0;
310 }
311
312 static int mt9v011_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
313 {
314         struct v4l2_pix_format *pix = &fmt->fmt.pix;
315
316         if (pix->pixelformat != V4L2_PIX_FMT_SGRBG8)
317                 return -EINVAL;
318
319         v4l_bound_align_image(&pix->width, 48, 639, 1,
320                               &pix->height, 32, 480, 1, 0);
321
322         return 0;
323 }
324
325 static int mt9v011_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
326 {
327         struct v4l2_pix_format *pix = &fmt->fmt.pix;
328         struct mt9v011 *core = to_mt9v011(sd);
329         int rc;
330
331         rc = mt9v011_try_fmt(sd, fmt);
332         if (rc < 0)
333                 return -EINVAL;
334
335         core->width = pix->width;
336         core->height = pix->height;
337
338         set_res(sd);
339
340         return 0;
341 }
342
343
344 #ifdef CONFIG_VIDEO_ADV_DEBUG
345 static int mt9v011_g_register(struct v4l2_subdev *sd,
346                               struct v4l2_dbg_register *reg)
347 {
348         struct i2c_client *client = v4l2_get_subdevdata(sd);
349
350         if (!v4l2_chip_match_i2c_client(client, &reg->match))
351                 return -EINVAL;
352         if (!capable(CAP_SYS_ADMIN))
353                 return -EPERM;
354
355         reg->val = mt9v011_read(sd, reg->reg & 0xff);
356         reg->size = 2;
357
358         return 0;
359 }
360
361 static int mt9v011_s_register(struct v4l2_subdev *sd,
362                               struct v4l2_dbg_register *reg)
363 {
364         struct i2c_client *client = v4l2_get_subdevdata(sd);
365
366         if (!v4l2_chip_match_i2c_client(client, &reg->match))
367                 return -EINVAL;
368         if (!capable(CAP_SYS_ADMIN))
369                 return -EPERM;
370
371         mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
372
373         return 0;
374 }
375 #endif
376
377 static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
378                                 struct v4l2_dbg_chip_ident *chip)
379 {
380         struct i2c_client *client = v4l2_get_subdevdata(sd);
381
382         return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
383                                           MT9V011_VERSION);
384 }
385
386 static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
387         .queryctrl = mt9v011_queryctrl,
388         .g_ctrl = mt9v011_g_ctrl,
389         .s_ctrl = mt9v011_s_ctrl,
390         .reset = mt9v011_reset,
391         .g_chip_ident = mt9v011_g_chip_ident,
392 #ifdef CONFIG_VIDEO_ADV_DEBUG
393         .g_register = mt9v011_g_register,
394         .s_register = mt9v011_s_register,
395 #endif
396 };
397
398 static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
399         .enum_fmt = mt9v011_enum_fmt,
400         .try_fmt = mt9v011_try_fmt,
401         .s_fmt = mt9v011_s_fmt,
402 };
403
404 static const struct v4l2_subdev_ops mt9v011_ops = {
405         .core  = &mt9v011_core_ops,
406         .video = &mt9v011_video_ops,
407 };
408
409
410 /****************************************************************************
411                         I2C Client & Driver
412  ****************************************************************************/
413
414 static int mt9v011_probe(struct i2c_client *c,
415                          const struct i2c_device_id *id)
416 {
417         u16 version;
418         struct mt9v011 *core;
419         struct v4l2_subdev *sd;
420
421         /* Check if the adapter supports the needed features */
422         if (!i2c_check_functionality(c->adapter,
423              I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
424                 return -EIO;
425
426         core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
427         if (!core)
428                 return -ENOMEM;
429
430         sd = &core->sd;
431         v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
432
433         /* Check if the sensor is really a MT9V011 */
434         version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
435         if (version != MT9V011_VERSION) {
436                 v4l2_info(sd, "*** unknown micron chip detected (0x%04x.\n",
437                           version);
438                 kfree(core);
439                 return -EINVAL;
440         }
441
442         core->global_gain = 0x0024;
443         core->width  = 640;
444         core->height = 480;
445         core->xtal = 27000000;  /* Hz */
446
447         v4l_info(c, "chip found @ 0x%02x (%s)\n",
448                  c->addr << 1, c->adapter->name);
449
450         return 0;
451 }
452
453 static int mt9v011_remove(struct i2c_client *c)
454 {
455         struct v4l2_subdev *sd = i2c_get_clientdata(c);
456
457         v4l2_dbg(1, debug, sd,
458                 "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
459                 c->addr << 1);
460
461         v4l2_device_unregister_subdev(sd);
462         kfree(to_mt9v011(sd));
463         return 0;
464 }
465
466 /* ----------------------------------------------------------------------- */
467
468 static const struct i2c_device_id mt9v011_id[] = {
469         { "mt9v011", 0 },
470         { }
471 };
472 MODULE_DEVICE_TABLE(i2c, mt9v011_id);
473
474 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
475         .name = "mt9v011",
476         .probe = mt9v011_probe,
477         .remove = mt9v011_remove,
478         .id_table = mt9v011_id,
479 };