2 * (C) Dominik Brodowski <linux@brodo.de> 2003
4 * Driver to use the Power Management Timer (PMTMR) available in some
5 * southbridges as primary timing source for the Linux kernel.
7 * Based on parts of linux/drivers/acpi/hardware/hwtimer.c, timer_pit.c,
8 * timer_hpet.c, and on Arjan van de Ven's implementation for 2.4.
10 * This file is licensed under the GPL v2.
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/device.h>
17 #include <linux/init.h>
18 #include <asm/types.h>
19 #include <asm/timer.h>
22 #include <asm/arch_hooks.h>
24 #include <linux/timex.h>
25 #include "mach_timer.h"
27 /* Number of PMTMR ticks expected during calibration run */
28 #define PMTMR_TICKS_PER_SEC 3579545
29 #define PMTMR_EXPECTED_RATE \
30 ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (CLOCK_TICK_RATE>>10))
33 /* The I/O port the PMTMR resides at.
34 * The location is detected during setup_arch(),
35 * in arch/i386/acpi/boot.c */
39 /* value of the Power timer at last timer interrupt */
40 static u32 offset_tick;
41 static u32 offset_delay;
43 static unsigned long long monotonic_base;
44 static seqlock_t monotonic_lock = SEQLOCK_UNLOCKED;
46 #define ACPI_PM_MASK 0xFFFFFF /* limit it to 24 bits */
48 /*helper function to safely read acpi pm timesource*/
49 static inline u32 read_pmtmr(void)
52 /* It has been reported that because of various broken
53 * chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM time
54 * source is not latched, so you must read it multiple
55 * times to insure a safe value is read.
58 v1 = inl(pmtmr_ioport);
59 v2 = inl(pmtmr_ioport);
60 v3 = inl(pmtmr_ioport);
61 } while ((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1)
62 || (v3 > v1 && v3 < v2));
64 /* mask the output to 24 bits */
65 return v2 & ACPI_PM_MASK;
70 * Some boards have the PMTMR running way too fast. We check
71 * the PMTMR rate against PIT channel 2 to catch these cases.
73 static int verify_pmtmr_rate(void)
76 unsigned long count, delta;
78 mach_prepare_counter();
79 value1 = read_pmtmr();
81 value2 = read_pmtmr();
82 delta = (value2 - value1) & ACPI_PM_MASK;
84 /* Check that the PMTMR delta is within 5% of what we expect */
85 if (delta < (PMTMR_EXPECTED_RATE * 19) / 20 ||
86 delta > (PMTMR_EXPECTED_RATE * 21) / 20) {
87 printk(KERN_INFO "PM-Timer running at invalid rate: %lu%% of normal - aborting.\n", 100UL * delta / PMTMR_EXPECTED_RATE);
95 static int init_pmtmr(char* override)
100 if (override[0] && strncmp(override,"pmtmr",5))
106 /* we use the TSC for delay_pmtmr, so make sure it exists */
110 /* "verify" this timing source */
111 value1 = read_pmtmr();
112 for (i = 0; i < 10000; i++) {
113 value2 = read_pmtmr();
114 if (value2 == value1)
118 if ((value2 < value1) && ((value2) < 0xFFF))
120 printk(KERN_INFO "PM-Timer had inconsistent results: 0x%#x, 0x%#x - aborting.\n", value1, value2);
123 printk(KERN_INFO "PM-Timer had no reasonable result: 0x%#x - aborting.\n", value1);
127 if (verify_pmtmr_rate() != 0)
134 static inline u32 cyc2us(u32 cycles)
136 /* The Power Management Timer ticks at 3.579545 ticks per microsecond.
137 * 1 / PM_TIMER_FREQUENCY == 0.27936511 =~ 286/1024 [error: 0.024%]
139 * Even with HZ = 100, delta is at maximum 35796 ticks, so it can
140 * easily be multiplied with 286 (=0x11E) without having to fear
144 return (cycles >> 10);
148 * this gets called during each timer interrupt
149 * - Called while holding the writer xtime_lock
151 static void mark_offset_pmtmr(void)
153 u32 lost, delta, last_offset;
154 static int first_run = 1;
155 last_offset = offset_tick;
157 write_seqlock(&monotonic_lock);
159 offset_tick = read_pmtmr();
161 /* calculate tick interval */
162 delta = (offset_tick - last_offset) & ACPI_PM_MASK;
164 /* convert to usecs */
165 delta = cyc2us(delta);
167 /* update the monotonic base value */
168 monotonic_base += delta * NSEC_PER_USEC;
169 write_sequnlock(&monotonic_lock);
171 /* convert to ticks */
172 delta += offset_delay;
173 lost = delta / (USEC_PER_SEC / HZ);
174 offset_delay = delta % (USEC_PER_SEC / HZ);
177 /* compensate for lost ticks */
179 jiffies_64 += lost - 1;
181 /* don't calculate delay for first run,
182 or if we've got less then a tick */
183 if (first_run || (lost < 1)) {
190 static unsigned long long monotonic_clock_pmtmr(void)
192 u32 last_offset, this_offset;
193 unsigned long long base, ret;
197 /* atomically read monotonic base & last_offset */
199 seq = read_seqbegin(&monotonic_lock);
200 last_offset = offset_tick;
201 base = monotonic_base;
202 } while (read_seqretry(&monotonic_lock, seq));
205 this_offset = read_pmtmr();
207 /* convert to nanoseconds */
208 ret = (this_offset - last_offset) & ACPI_PM_MASK;
209 ret = base + (cyc2us(ret) * NSEC_PER_USEC);
213 static void delay_pmtmr(unsigned long loops)
215 unsigned long bclock, now;
222 } while ((now-bclock) < loops);
227 * get the offset (in microseconds) from the last call to mark_offset()
228 * - Called holding a reader xtime_lock
230 static unsigned long get_offset_pmtmr(void)
232 u32 now, offset, delta = 0;
234 offset = offset_tick;
236 delta = (now - offset)&ACPI_PM_MASK;
238 return (unsigned long) offset_delay + cyc2us(delta);
242 /* acpi timer_opts struct */
243 static struct timer_opts timer_pmtmr = {
245 .mark_offset = mark_offset_pmtmr,
246 .get_offset = get_offset_pmtmr,
247 .monotonic_clock = monotonic_clock_pmtmr,
248 .delay = delay_pmtmr,
249 .read_timer = read_timer_tsc,
252 struct init_timer_opts __initdata timer_pmtmr_init = {
254 .opts = &timer_pmtmr,
257 MODULE_LICENSE("GPL");
258 MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
259 MODULE_DESCRIPTION("Power Management Timer (PMTMR) as primary timing source for x86");