2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 2003 by Ralf Baechle
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/sched.h>
14 #include <asm/cacheflush.h>
15 #include <asm/processor.h>
17 #include <asm/cpu-features.h>
19 /* Cache operations. */
20 void (*flush_cache_all)(void);
21 void (*__flush_cache_all)(void);
22 void (*flush_cache_mm)(struct mm_struct *mm);
23 void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
25 void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
27 void (*flush_icache_range)(unsigned long start, unsigned long end);
29 /* MIPS specific cache operations */
30 void (*flush_cache_sigtramp)(unsigned long addr);
31 void (*local_flush_data_cache_page)(void * addr);
32 void (*flush_data_cache_page)(unsigned long addr);
33 void (*flush_icache_all)(void);
35 EXPORT_SYMBOL(flush_data_cache_page);
37 #ifdef CONFIG_DMA_NONCOHERENT
39 /* DMA cache operations. */
40 void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
41 void (*_dma_cache_wback)(unsigned long start, unsigned long size);
42 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
44 EXPORT_SYMBOL(_dma_cache_wback_inv);
45 EXPORT_SYMBOL(_dma_cache_wback);
46 EXPORT_SYMBOL(_dma_cache_inv);
48 #endif /* CONFIG_DMA_NONCOHERENT */
51 * We could optimize the case where the cache argument is not BCACHE but
52 * that seems very atypical use ...
54 asmlinkage int sys_cacheflush(unsigned long addr,
55 unsigned long bytes, unsigned int cache)
59 if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
62 flush_icache_range(addr, addr + bytes);
67 void __flush_dcache_page(struct page *page)
69 struct address_space *mapping = page_mapping(page);
72 if (PageHighMem(page))
74 if (mapping && !mapping_mapped(mapping)) {
75 SetPageDcacheDirty(page);
80 * We could delay the flush for the !page_mapping case too. But that
81 * case is for exec env/arg pages and those are %99 certainly going to
82 * get faulted into the tlb (and thus flushed) anyways.
84 addr = (unsigned long) page_address(page);
85 flush_data_cache_page(addr);
88 EXPORT_SYMBOL(__flush_dcache_page);
90 void __update_cache(struct vm_area_struct *vma, unsigned long address,
94 unsigned long pfn, addr;
95 int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
98 if (unlikely(!pfn_valid(pfn)))
100 page = pfn_to_page(pfn);
101 if (page_mapping(page) && Page_dcache_dirty(page)) {
102 addr = (unsigned long) page_address(page);
103 if (exec || pages_do_alias(addr, address & PAGE_MASK))
104 flush_data_cache_page(addr);
105 ClearPageDcacheDirty(page);
109 #define __weak __attribute__((weak))
111 static char cache_panic[] __initdata = "Yeee, unsupported cache architecture.";
113 void __init cpu_cache_init(void)
115 if (cpu_has_3k_cache) {
116 extern void __weak r3k_cache_init(void);
121 if (cpu_has_6k_cache) {
122 extern void __weak r6k_cache_init(void);
127 if (cpu_has_4k_cache) {
128 extern void __weak r4k_cache_init(void);
133 if (cpu_has_8k_cache) {
134 extern void __weak r8k_cache_init(void);
139 if (cpu_has_tx39_cache) {
140 extern void __weak tx39_cache_init(void);
145 if (cpu_has_sb1_cache) {
146 extern void __weak sb1_cache_init(void);