Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
[linux-2.6] / arch / ia64 / sn / kernel / irq.c
1 /*
2  * Platform dependent support for SGI SN
3  *
4  * This file is subject to the terms and conditions of the GNU General Public
5  * License.  See the file "COPYING" in the main directory of this archive
6  * for more details.
7  *
8  * Copyright (c) 2000-2007 Silicon Graphics, Inc.  All Rights Reserved.
9  */
10
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <asm/sn/addrs.h>
15 #include <asm/sn/arch.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibr_provider.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/shub_mmr.h>
21 #include <asm/sn/sn_sal.h>
22 #include <asm/sn/sn_feature_sets.h>
23
24 static void force_interrupt(int irq);
25 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
26 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
27
28 int sn_force_interrupt_flag = 1;
29 extern int sn_ioif_inited;
30 struct list_head **sn_irq_lh;
31 static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
32
33 u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
34                                      struct sn_irq_info *sn_irq_info,
35                                      int req_irq, nasid_t req_nasid,
36                                      int req_slice)
37 {
38         struct ia64_sal_retval ret_stuff;
39         ret_stuff.status = 0;
40         ret_stuff.v0 = 0;
41
42         SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
43                         (u64) SAL_INTR_ALLOC, (u64) local_nasid,
44                         (u64) local_widget, __pa(sn_irq_info), (u64) req_irq,
45                         (u64) req_nasid, (u64) req_slice);
46
47         return ret_stuff.status;
48 }
49
50 void sn_intr_free(nasid_t local_nasid, int local_widget,
51                                 struct sn_irq_info *sn_irq_info)
52 {
53         struct ia64_sal_retval ret_stuff;
54         ret_stuff.status = 0;
55         ret_stuff.v0 = 0;
56
57         SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
58                         (u64) SAL_INTR_FREE, (u64) local_nasid,
59                         (u64) local_widget, (u64) sn_irq_info->irq_irq,
60                         (u64) sn_irq_info->irq_cookie, 0, 0);
61 }
62
63 u64 sn_intr_redirect(nasid_t local_nasid, int local_widget,
64                       struct sn_irq_info *sn_irq_info,
65                       nasid_t req_nasid, int req_slice)
66 {
67         struct ia64_sal_retval ret_stuff;
68         ret_stuff.status = 0;
69         ret_stuff.v0 = 0;
70
71         SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
72                         (u64) SAL_INTR_REDIRECT, (u64) local_nasid,
73                         (u64) local_widget, __pa(sn_irq_info),
74                         (u64) req_nasid, (u64) req_slice, 0);
75
76         return ret_stuff.status;
77 }
78
79 static unsigned int sn_startup_irq(unsigned int irq)
80 {
81         return 0;
82 }
83
84 static void sn_shutdown_irq(unsigned int irq)
85 {
86 }
87
88 extern void ia64_mca_register_cpev(int);
89
90 static void sn_disable_irq(unsigned int irq)
91 {
92         if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
93                 ia64_mca_register_cpev(0);
94 }
95
96 static void sn_enable_irq(unsigned int irq)
97 {
98         if (irq == local_vector_to_irq(IA64_CPE_VECTOR))
99                 ia64_mca_register_cpev(irq);
100 }
101
102 static void sn_ack_irq(unsigned int irq)
103 {
104         u64 event_occurred, mask;
105
106         irq = irq & 0xff;
107         event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
108         mask = event_occurred & SH_ALL_INT_MASK;
109         HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
110         __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
111
112         move_native_irq(irq);
113 }
114
115 static void sn_end_irq(unsigned int irq)
116 {
117         int ivec;
118         u64 event_occurred;
119
120         ivec = irq & 0xff;
121         if (ivec == SGI_UART_VECTOR) {
122                 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
123                 /* If the UART bit is set here, we may have received an
124                  * interrupt from the UART that the driver missed.  To
125                  * make sure, we IPI ourselves to force us to look again.
126                  */
127                 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
128                         platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
129                                           IA64_IPI_DM_INT, 0);
130                 }
131         }
132         __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
133         if (sn_force_interrupt_flag)
134                 force_interrupt(irq);
135 }
136
137 static void sn_irq_info_free(struct rcu_head *head);
138
139 struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info,
140                                        nasid_t nasid, int slice)
141 {
142         int vector;
143         int cpuid;
144 #ifdef CONFIG_SMP
145         int cpuphys;
146 #endif
147         int64_t bridge;
148         int local_widget, status;
149         nasid_t local_nasid;
150         struct sn_irq_info *new_irq_info;
151         struct sn_pcibus_provider *pci_provider;
152
153         bridge = (u64) sn_irq_info->irq_bridge;
154         if (!bridge) {
155                 return NULL; /* irq is not a device interrupt */
156         }
157
158         local_nasid = NASID_GET(bridge);
159
160         if (local_nasid & 1)
161                 local_widget = TIO_SWIN_WIDGETNUM(bridge);
162         else
163                 local_widget = SWIN_WIDGETNUM(bridge);
164         vector = sn_irq_info->irq_irq;
165
166         /* Make use of SAL_INTR_REDIRECT if PROM supports it */
167         status = sn_intr_redirect(local_nasid, local_widget, sn_irq_info, nasid, slice);
168         if (!status) {
169                 new_irq_info = sn_irq_info;
170                 goto finish_up;
171         }
172
173         /*
174          * PROM does not support SAL_INTR_REDIRECT, or it failed.
175          * Revert to old method.
176          */
177         new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
178         if (new_irq_info == NULL)
179                 return NULL;
180
181         memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
182
183         /* Free the old PROM new_irq_info structure */
184         sn_intr_free(local_nasid, local_widget, new_irq_info);
185         unregister_intr_pda(new_irq_info);
186
187         /* allocate a new PROM new_irq_info struct */
188         status = sn_intr_alloc(local_nasid, local_widget,
189                                new_irq_info, vector,
190                                nasid, slice);
191
192         /* SAL call failed */
193         if (status) {
194                 kfree(new_irq_info);
195                 return NULL;
196         }
197
198         register_intr_pda(new_irq_info);
199         spin_lock(&sn_irq_info_lock);
200         list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
201         spin_unlock(&sn_irq_info_lock);
202         call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
203
204
205 finish_up:
206         /* Update kernels new_irq_info with new target info */
207         cpuid = nasid_slice_to_cpuid(new_irq_info->irq_nasid,
208                                      new_irq_info->irq_slice);
209         new_irq_info->irq_cpuid = cpuid;
210
211         pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
212
213         /*
214          * If this represents a line interrupt, target it.  If it's
215          * an msi (irq_int_bit < 0), it's already targeted.
216          */
217         if (new_irq_info->irq_int_bit >= 0 &&
218             pci_provider && pci_provider->target_interrupt)
219                 (pci_provider->target_interrupt)(new_irq_info);
220
221 #ifdef CONFIG_SMP
222         cpuphys = cpu_physical_id(cpuid);
223         set_irq_affinity_info((vector & 0xff), cpuphys, 0);
224 #endif
225
226         return new_irq_info;
227 }
228
229 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
230 {
231         struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
232         nasid_t nasid;
233         int slice;
234
235         nasid = cpuid_to_nasid(first_cpu(mask));
236         slice = cpuid_to_slice(first_cpu(mask));
237
238         list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
239                                  sn_irq_lh[irq], list)
240                 (void)sn_retarget_vector(sn_irq_info, nasid, slice);
241 }
242
243 #ifdef CONFIG_SMP
244 void sn_set_err_irq_affinity(unsigned int irq)
245 {
246         /*
247          * On systems which support CPU disabling (SHub2), all error interrupts
248          * are targetted at the boot CPU.
249          */
250         if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT))
251                 set_irq_affinity_info(irq, cpu_physical_id(0), 0);
252 }
253 #else
254 void sn_set_err_irq_affinity(unsigned int irq) { }
255 #endif
256
257 static void
258 sn_mask_irq(unsigned int irq)
259 {
260 }
261
262 static void
263 sn_unmask_irq(unsigned int irq)
264 {
265 }
266
267 struct irq_chip irq_type_sn = {
268         .name           = "SN hub",
269         .startup        = sn_startup_irq,
270         .shutdown       = sn_shutdown_irq,
271         .enable         = sn_enable_irq,
272         .disable        = sn_disable_irq,
273         .ack            = sn_ack_irq,
274         .end            = sn_end_irq,
275         .mask           = sn_mask_irq,
276         .unmask         = sn_unmask_irq,
277         .set_affinity   = sn_set_affinity_irq
278 };
279
280 ia64_vector sn_irq_to_vector(int irq)
281 {
282         if (irq >= IA64_NUM_VECTORS)
283                 return 0;
284         return (ia64_vector)irq;
285 }
286
287 unsigned int sn_local_vector_to_irq(u8 vector)
288 {
289         return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
290 }
291
292 void sn_irq_init(void)
293 {
294         int i;
295         irq_desc_t *base_desc = irq_desc;
296
297         ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
298         ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
299
300         for (i = 0; i < NR_IRQS; i++) {
301                 if (base_desc[i].chip == &no_irq_type) {
302                         base_desc[i].chip = &irq_type_sn;
303                 }
304         }
305 }
306
307 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
308 {
309         int irq = sn_irq_info->irq_irq;
310         int cpu = sn_irq_info->irq_cpuid;
311
312         if (pdacpu(cpu)->sn_last_irq < irq) {
313                 pdacpu(cpu)->sn_last_irq = irq;
314         }
315
316         if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq)
317                 pdacpu(cpu)->sn_first_irq = irq;
318 }
319
320 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
321 {
322         int irq = sn_irq_info->irq_irq;
323         int cpu = sn_irq_info->irq_cpuid;
324         struct sn_irq_info *tmp_irq_info;
325         int i, foundmatch;
326
327         rcu_read_lock();
328         if (pdacpu(cpu)->sn_last_irq == irq) {
329                 foundmatch = 0;
330                 for (i = pdacpu(cpu)->sn_last_irq - 1;
331                      i && !foundmatch; i--) {
332                         list_for_each_entry_rcu(tmp_irq_info,
333                                                 sn_irq_lh[i],
334                                                 list) {
335                                 if (tmp_irq_info->irq_cpuid == cpu) {
336                                         foundmatch = 1;
337                                         break;
338                                 }
339                         }
340                 }
341                 pdacpu(cpu)->sn_last_irq = i;
342         }
343
344         if (pdacpu(cpu)->sn_first_irq == irq) {
345                 foundmatch = 0;
346                 for (i = pdacpu(cpu)->sn_first_irq + 1;
347                      i < NR_IRQS && !foundmatch; i++) {
348                         list_for_each_entry_rcu(tmp_irq_info,
349                                                 sn_irq_lh[i],
350                                                 list) {
351                                 if (tmp_irq_info->irq_cpuid == cpu) {
352                                         foundmatch = 1;
353                                         break;
354                                 }
355                         }
356                 }
357                 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
358         }
359         rcu_read_unlock();
360 }
361
362 static void sn_irq_info_free(struct rcu_head *head)
363 {
364         struct sn_irq_info *sn_irq_info;
365
366         sn_irq_info = container_of(head, struct sn_irq_info, rcu);
367         kfree(sn_irq_info);
368 }
369
370 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
371 {
372         nasid_t nasid = sn_irq_info->irq_nasid;
373         int slice = sn_irq_info->irq_slice;
374         int cpu = nasid_slice_to_cpuid(nasid, slice);
375 #ifdef CONFIG_SMP
376         int cpuphys;
377 #endif
378
379         pci_dev_get(pci_dev);
380         sn_irq_info->irq_cpuid = cpu;
381         sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
382
383         /* link it into the sn_irq[irq] list */
384         spin_lock(&sn_irq_info_lock);
385         list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
386         reserve_irq_vector(sn_irq_info->irq_irq);
387         spin_unlock(&sn_irq_info_lock);
388
389         register_intr_pda(sn_irq_info);
390 #ifdef CONFIG_SMP
391         cpuphys = cpu_physical_id(cpu);
392         set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
393 #endif
394 }
395
396 void sn_irq_unfixup(struct pci_dev *pci_dev)
397 {
398         struct sn_irq_info *sn_irq_info;
399
400         /* Only cleanup IRQ stuff if this device has a host bus context */
401         if (!SN_PCIDEV_BUSSOFT(pci_dev))
402                 return;
403
404         sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
405         if (!sn_irq_info)
406                 return;
407         if (!sn_irq_info->irq_irq) {
408                 kfree(sn_irq_info);
409                 return;
410         }
411
412         unregister_intr_pda(sn_irq_info);
413         spin_lock(&sn_irq_info_lock);
414         list_del_rcu(&sn_irq_info->list);
415         spin_unlock(&sn_irq_info_lock);
416         if (list_empty(sn_irq_lh[sn_irq_info->irq_irq]))
417                 free_irq_vector(sn_irq_info->irq_irq);
418         call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
419         pci_dev_put(pci_dev);
420
421 }
422
423 static inline void
424 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
425 {
426         struct sn_pcibus_provider *pci_provider;
427
428         pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
429
430         /* Don't force an interrupt if the irq has been disabled */
431         if (!(irq_desc[sn_irq_info->irq_irq].status & IRQ_DISABLED) &&
432             pci_provider && pci_provider->force_interrupt)
433                 (*pci_provider->force_interrupt)(sn_irq_info);
434 }
435
436 static void force_interrupt(int irq)
437 {
438         struct sn_irq_info *sn_irq_info;
439
440         if (!sn_ioif_inited)
441                 return;
442
443         rcu_read_lock();
444         list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
445                 sn_call_force_intr_provider(sn_irq_info);
446
447         rcu_read_unlock();
448 }
449
450 /*
451  * Check for lost interrupts.  If the PIC int_status reg. says that
452  * an interrupt has been sent, but not handled, and the interrupt
453  * is not pending in either the cpu irr regs or in the soft irr regs,
454  * and the interrupt is not in service, then the interrupt may have
455  * been lost.  Force an interrupt on that pin.  It is possible that
456  * the interrupt is in flight, so we may generate a spurious interrupt,
457  * but we should never miss a real lost interrupt.
458  */
459 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
460 {
461         u64 regval;
462         struct pcidev_info *pcidev_info;
463         struct pcibus_info *pcibus_info;
464
465         /*
466          * Bridge types attached to TIO (anything but PIC) do not need this WAR
467          * since they do not target Shub II interrupt registers.  If that
468          * ever changes, this check needs to accomodate.
469          */
470         if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
471                 return;
472
473         pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
474         if (!pcidev_info)
475                 return;
476
477         pcibus_info =
478             (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
479             pdi_pcibus_info;
480         regval = pcireg_intr_status_get(pcibus_info);
481
482         if (!ia64_get_irr(irq_to_vector(irq))) {
483                 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
484                         regval &= 0xff;
485                         if (sn_irq_info->irq_int_bit & regval &
486                             sn_irq_info->irq_last_intr) {
487                                 regval &= ~(sn_irq_info->irq_int_bit & regval);
488                                 sn_call_force_intr_provider(sn_irq_info);
489                         }
490                 }
491         }
492         sn_irq_info->irq_last_intr = regval;
493 }
494
495 void sn_lb_int_war_check(void)
496 {
497         struct sn_irq_info *sn_irq_info;
498         int i;
499
500         if (!sn_ioif_inited || pda->sn_first_irq == 0)
501                 return;
502
503         rcu_read_lock();
504         for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
505                 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
506                         sn_check_intr(i, sn_irq_info);
507                 }
508         }
509         rcu_read_unlock();
510 }
511
512 void __init sn_irq_lh_init(void)
513 {
514         int i;
515
516         sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
517         if (!sn_irq_lh)
518                 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
519
520         for (i = 0; i < NR_IRQS; i++) {
521                 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
522                 if (!sn_irq_lh[i])
523                         panic("SN PCI INIT: Failed IRQ memory allocation\n");
524
525                 INIT_LIST_HEAD(sn_irq_lh[i]);
526         }
527 }