2 * drivers/serial/sh-sci.c
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
6 * Copyright (C) 2002 - 2006 Paul Mundt
8 * based off of the old drivers/char/sh-sci.c by:
10 * Copyright (C) 1999, 2000 Niibe Yutaka
11 * Copyright (C) 2000 Sugioka Toshinobu
12 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
13 * Modified to support SecureEdge. David McCullough (2002)
14 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
15 * Removed SH7300 support (Jul 2007).
17 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive
21 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
27 #include <linux/module.h>
28 #include <linux/errno.h>
29 #include <linux/timer.h>
30 #include <linux/interrupt.h>
31 #include <linux/tty.h>
32 #include <linux/tty_flip.h>
33 #include <linux/serial.h>
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/sysrq.h>
37 #include <linux/ioport.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <linux/console.h>
42 #include <linux/platform_device.h>
44 #ifdef CONFIG_CPU_FREQ
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
49 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
50 #include <linux/ctype.h>
51 #include <asm/clock.h>
52 #include <asm/sh_bios.h>
60 struct uart_port port;
65 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
66 unsigned int irqs[SCIx_NR_IRQS];
68 /* Port pin configuration */
69 void (*init_pins)(struct uart_port *port,
72 /* Port enable callback */
73 void (*enable)(struct uart_port *port);
75 /* Port disable callback */
76 void (*disable)(struct uart_port *port);
79 struct timer_list break_timer;
82 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
89 static struct sci_port *kgdb_sci_port;
92 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
93 static struct sci_port *serial_console_port;
96 /* Function prototypes */
97 static void sci_stop_tx(struct uart_port *port);
99 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
101 static struct sci_port sci_ports[SCI_NPORTS];
102 static struct uart_driver sci_uart_driver;
104 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
105 defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
106 static inline void handle_error(struct uart_port *port)
108 /* Clear error flags */
109 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
112 static int get_char(struct uart_port *port)
115 unsigned short status;
118 spin_lock_irqsave(&port->lock, flags);
120 status = sci_in(port, SCxSR);
121 if (status & SCxSR_ERRORS(port)) {
125 } while (!(status & SCxSR_RDxF(port)));
126 c = sci_in(port, SCxRDR);
127 sci_in(port, SCxSR); /* Dummy read */
128 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
129 spin_unlock_irqrestore(&port->lock, flags);
133 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
135 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
136 static void put_char(struct uart_port *port, char c)
139 unsigned short status;
141 spin_lock_irqsave(&port->lock, flags);
144 status = sci_in(port, SCxSR);
145 } while (!(status & SCxSR_TDxE(port)));
147 sci_out(port, SCxTDR, c);
148 sci_in(port, SCxSR); /* Dummy read */
149 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
151 spin_unlock_irqrestore(&port->lock, flags);
155 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
156 static void put_string(struct sci_port *sci_port, const char *buffer, int count)
158 struct uart_port *port = &sci_port->port;
159 const unsigned char *p = buffer;
162 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
166 #ifdef CONFIG_SH_STANDARD_BIOS
167 /* This call only does a trap the first time it is
168 * called, and so is safe to do here unconditionally
170 usegdb |= sh_bios_in_gdb_mode();
172 #ifdef CONFIG_SH_KGDB
173 usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
177 /* $<packet info>#<checksum>. */
181 put_char(port, 'O'); /* 'O'utput to console */
184 for (i=0; i<count; i++) { /* Don't use run length encoding */
195 put_char(port, highhex(checksum));
196 put_char(port, lowhex(checksum));
197 } while (get_char(port) != '+');
199 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
200 for (i=0; i<count; i++) {
202 put_char(port, '\r');
203 put_char(port, *p++);
206 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
208 #ifdef CONFIG_SH_KGDB
209 static int kgdb_sci_getchar(void)
213 /* Keep trying to read a character, this could be neater */
214 while ((c = get_char(&kgdb_sci_port->port)) < 0)
220 static inline void kgdb_sci_putchar(int c)
222 put_char(&kgdb_sci_port->port, c);
224 #endif /* CONFIG_SH_KGDB */
226 #if defined(__H8300S__)
227 enum { sci_disable, sci_enable };
229 static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
231 volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
232 int ch = (port->mapbase - SMR0) >> 3;
233 unsigned char mask = 1 << (ch+1);
235 if (ctrl == sci_disable) {
242 static inline void h8300_sci_enable(struct uart_port *port)
244 h8300_sci_config(port, sci_enable);
247 static inline void h8300_sci_disable(struct uart_port *port)
249 h8300_sci_config(port, sci_disable);
253 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
254 defined(__H8300H__) || defined(__H8300S__)
255 static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
257 int ch = (port->mapbase - SMR0) >> 3;
260 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
261 h8300_sci_pins[ch].rx,
263 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
264 h8300_sci_pins[ch].tx,
268 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
271 #define sci_init_pins_sci NULL
274 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
275 static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
277 unsigned int fcr_val = 0;
280 fcr_val |= SCFCR_MCE;
282 sci_out(port, SCFCR, fcr_val);
285 #define sci_init_pins_irda NULL
289 #define sci_init_pins_scif NULL
292 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
293 #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
294 static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
296 unsigned int fcr_val = 0;
298 set_sh771x_scif_pfc(port);
299 if (cflag & CRTSCTS) {
300 fcr_val |= SCFCR_MCE;
302 sci_out(port, SCFCR, fcr_val);
304 #elif defined(CONFIG_CPU_SH3)
305 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
306 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
308 unsigned int fcr_val = 0;
311 /* We need to set SCPCR to enable RTS/CTS */
312 data = ctrl_inw(SCPCR);
313 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
314 ctrl_outw(data & 0x0fcf, SCPCR);
317 fcr_val |= SCFCR_MCE;
319 /* We need to set SCPCR to enable RTS/CTS */
320 data = ctrl_inw(SCPCR);
321 /* Clear out SCP7MD1,0, SCP4MD1,0,
322 Set SCP6MD1,0 = {01} (output) */
323 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
325 data = ctrl_inb(SCPDR);
326 /* Set /RTS2 (bit6) = 0 */
327 ctrl_outb(data & 0xbf, SCPDR);
330 sci_out(port, SCFCR, fcr_val);
332 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
333 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
335 unsigned int fcr_val = 0;
337 if (cflag & CRTSCTS) {
338 fcr_val |= SCFCR_MCE;
340 ctrl_outw(0x0000, PORT_PSCR);
344 data = ctrl_inw(PORT_PSCR);
347 ctrl_outw(data, PORT_PSCR);
349 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
352 sci_out(port, SCFCR, fcr_val);
356 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
358 unsigned int fcr_val = 0;
360 if (cflag & CRTSCTS) {
361 fcr_val |= SCFCR_MCE;
363 #ifdef CONFIG_CPU_SUBTYPE_SH7343
365 #elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \
366 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
367 defined(CONFIG_CPU_SUBTYPE_SHX3)
368 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
370 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
373 sci_out(port, SCFCR, fcr_val);
377 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
378 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
379 defined(CONFIG_CPU_SUBTYPE_SH7785)
380 static inline int scif_txroom(struct uart_port *port)
382 return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
385 static inline int scif_rxroom(struct uart_port *port)
387 return sci_in(port, SCRFDR) & 0x7f;
390 static inline int scif_txroom(struct uart_port *port)
392 return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
395 static inline int scif_rxroom(struct uart_port *port)
397 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
400 #endif /* SCIF_ONLY || SCI_AND_SCIF */
402 static inline int sci_txroom(struct uart_port *port)
404 return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
407 static inline int sci_rxroom(struct uart_port *port)
409 return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
412 /* ********************************************************************** *
413 * the interrupt related routines *
414 * ********************************************************************** */
416 static void sci_transmit_chars(struct uart_port *port)
418 struct circ_buf *xmit = &port->info->xmit;
419 unsigned int stopped = uart_tx_stopped(port);
420 unsigned short status;
424 status = sci_in(port, SCxSR);
425 if (!(status & SCxSR_TDxE(port))) {
426 ctrl = sci_in(port, SCSCR);
427 if (uart_circ_empty(xmit)) {
428 ctrl &= ~SCI_CTRL_FLAGS_TIE;
430 ctrl |= SCI_CTRL_FLAGS_TIE;
432 sci_out(port, SCSCR, ctrl);
437 if (port->type == PORT_SCIF)
438 count = scif_txroom(port);
441 count = sci_txroom(port);
449 } else if (!uart_circ_empty(xmit) && !stopped) {
450 c = xmit->buf[xmit->tail];
451 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
456 sci_out(port, SCxTDR, c);
459 } while (--count > 0);
461 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
463 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
464 uart_write_wakeup(port);
465 if (uart_circ_empty(xmit)) {
468 ctrl = sci_in(port, SCSCR);
470 #if !defined(SCI_ONLY)
471 if (port->type == PORT_SCIF) {
472 sci_in(port, SCxSR); /* Dummy read */
473 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
477 ctrl |= SCI_CTRL_FLAGS_TIE;
478 sci_out(port, SCSCR, ctrl);
482 /* On SH3, SCIF may read end-of-break as a space->mark char */
483 #define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
485 static inline void sci_receive_chars(struct uart_port *port)
487 struct sci_port *sci_port = (struct sci_port *)port;
488 struct tty_struct *tty = port->info->tty;
489 int i, count, copied = 0;
490 unsigned short status;
493 status = sci_in(port, SCxSR);
494 if (!(status & SCxSR_RDxF(port)))
498 #if !defined(SCI_ONLY)
499 if (port->type == PORT_SCIF)
500 count = scif_rxroom(port);
503 count = sci_rxroom(port);
505 /* Don't copy more bytes than there is room for in the buffer */
506 count = tty_buffer_request_room(tty, count);
508 /* If for any reason we can't copy more data, we're done! */
512 if (port->type == PORT_SCI) {
513 char c = sci_in(port, SCxRDR);
514 if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
517 tty_insert_flip_char(tty, c, TTY_NORMAL);
520 for (i=0; i<count; i++) {
521 char c = sci_in(port, SCxRDR);
522 status = sci_in(port, SCxSR);
523 #if defined(CONFIG_CPU_SH3)
524 /* Skip "chars" during break */
525 if (sci_port->break_flag) {
527 (status & SCxSR_FER(port))) {
532 /* Nonzero => end-of-break */
533 pr_debug("scif: debounce<%02x>\n", c);
534 sci_port->break_flag = 0;
541 #endif /* CONFIG_CPU_SH3 */
542 if (uart_handle_sysrq_char(port, c)) {
547 /* Store data and status */
548 if (status&SCxSR_FER(port)) {
550 pr_debug("sci: frame error\n");
551 } else if (status&SCxSR_PER(port)) {
553 pr_debug("sci: parity error\n");
556 tty_insert_flip_char(tty, c, flag);
560 sci_in(port, SCxSR); /* dummy read */
561 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
564 port->icount.rx += count;
568 /* Tell the rest of the system the news. New characters! */
569 tty_flip_buffer_push(tty);
571 sci_in(port, SCxSR); /* dummy read */
572 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
576 #define SCI_BREAK_JIFFIES (HZ/20)
577 /* The sci generates interrupts during the break,
578 * 1 per millisecond or so during the break period, for 9600 baud.
579 * So dont bother disabling interrupts.
580 * But dont want more than 1 break event.
581 * Use a kernel timer to periodically poll the rx line until
582 * the break is finished.
584 static void sci_schedule_break_timer(struct sci_port *port)
586 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
587 add_timer(&port->break_timer);
589 /* Ensure that two consecutive samples find the break over. */
590 static void sci_break_timer(unsigned long data)
592 struct sci_port *port = (struct sci_port *)data;
594 if (sci_rxd_in(&port->port) == 0) {
595 port->break_flag = 1;
596 sci_schedule_break_timer(port);
597 } else if (port->break_flag == 1) {
599 port->break_flag = 2;
600 sci_schedule_break_timer(port);
602 port->break_flag = 0;
605 static inline int sci_handle_errors(struct uart_port *port)
608 unsigned short status = sci_in(port, SCxSR);
609 struct tty_struct *tty = port->info->tty;
611 if (status & SCxSR_ORER(port)) {
613 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
615 pr_debug("sci: overrun error\n");
618 if (status & SCxSR_FER(port)) {
619 if (sci_rxd_in(port) == 0) {
620 /* Notify of BREAK */
621 struct sci_port *sci_port = (struct sci_port *)port;
623 if (!sci_port->break_flag) {
624 sci_port->break_flag = 1;
625 sci_schedule_break_timer(sci_port);
627 /* Do sysrq handling. */
628 if (uart_handle_break(port))
630 pr_debug("sci: BREAK detected\n");
631 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
636 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
638 pr_debug("sci: frame error\n");
642 if (status & SCxSR_PER(port)) {
644 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
646 pr_debug("sci: parity error\n");
650 tty_flip_buffer_push(tty);
655 static inline int sci_handle_breaks(struct uart_port *port)
658 unsigned short status = sci_in(port, SCxSR);
659 struct tty_struct *tty = port->info->tty;
660 struct sci_port *s = &sci_ports[port->line];
662 if (uart_handle_break(port))
665 if (!s->break_flag && status & SCxSR_BRK(port)) {
666 #if defined(CONFIG_CPU_SH3)
670 /* Notify of BREAK */
671 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
673 pr_debug("sci: BREAK detected\n");
676 #if defined(SCIF_ORER)
677 /* XXX: Handle SCIF overrun error */
678 if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
679 sci_out(port, SCLSR, 0);
680 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
682 pr_debug("sci: overrun error\n");
688 tty_flip_buffer_push(tty);
693 static irqreturn_t sci_rx_interrupt(int irq, void *port)
695 /* I think sci_receive_chars has to be called irrespective
696 * of whether the I_IXOFF is set, otherwise, how is the interrupt
699 sci_receive_chars(port);
704 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
706 struct uart_port *port = ptr;
708 spin_lock_irq(&port->lock);
709 sci_transmit_chars(port);
710 spin_unlock_irq(&port->lock);
715 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
717 struct uart_port *port = ptr;
720 if (port->type == PORT_SCI) {
721 if (sci_handle_errors(port)) {
722 /* discard character in rx buffer */
724 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
727 #if defined(SCIF_ORER)
728 if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
729 struct tty_struct *tty = port->info->tty;
731 sci_out(port, SCLSR, 0);
732 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
733 tty_flip_buffer_push(tty);
734 pr_debug("scif: overrun error\n");
737 sci_rx_interrupt(irq, ptr);
740 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
742 /* Kick the transmission */
743 sci_tx_interrupt(irq, ptr);
748 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
750 struct uart_port *port = ptr;
753 sci_handle_breaks(port);
754 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
759 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
761 unsigned short ssr_status, scr_status;
762 struct uart_port *port = ptr;
764 ssr_status = sci_in(port,SCxSR);
765 scr_status = sci_in(port,SCSCR);
768 if ((ssr_status & 0x0020) && (scr_status & 0x0080))
769 sci_tx_interrupt(irq, ptr);
771 if ((ssr_status & 0x0002) && (scr_status & 0x0040))
772 sci_rx_interrupt(irq, ptr);
773 /* Error Interrupt */
774 if ((ssr_status & 0x0080) && (scr_status & 0x0400))
775 sci_er_interrupt(irq, ptr);
776 /* Break Interrupt */
777 if ((ssr_status & 0x0010) && (scr_status & 0x0200))
778 sci_br_interrupt(irq, ptr);
783 #ifdef CONFIG_CPU_FREQ
785 * Here we define a transistion notifier so that we can update all of our
786 * ports' baud rate when the peripheral clock changes.
788 static int sci_notifier(struct notifier_block *self,
789 unsigned long phase, void *p)
791 struct cpufreq_freqs *freqs = p;
794 if ((phase == CPUFREQ_POSTCHANGE) ||
795 (phase == CPUFREQ_RESUMECHANGE)){
796 for (i = 0; i < SCI_NPORTS; i++) {
797 struct uart_port *port = &sci_ports[i].port;
801 * Update the uartclk per-port if frequency has
802 * changed, since it will no longer necessarily be
803 * consistent with the old frequency.
805 * Really we want to be able to do something like
806 * uart_change_speed() or something along those lines
807 * here to implicitly reset the per-port baud rate..
809 * Clean this up later..
811 clk = clk_get(NULL, "module_clk");
812 port->uartclk = clk_get_rate(clk) * 16;
816 printk(KERN_INFO "%s: got a postchange notification "
817 "for cpu %d (old %d, new %d)\n",
818 __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
824 static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
825 #endif /* CONFIG_CPU_FREQ */
827 static int sci_request_irq(struct sci_port *port)
830 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
831 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
834 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
835 "SCI Transmit Data Empty", "SCI Break" };
837 if (port->irqs[0] == port->irqs[1]) {
838 if (!port->irqs[0]) {
839 printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
843 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
844 IRQF_DISABLED, "sci", port)) {
845 printk(KERN_ERR "sci: Cannot allocate irq.\n");
849 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
852 if (request_irq(port->irqs[i], handlers[i],
853 IRQF_DISABLED, desc[i], port)) {
854 printk(KERN_ERR "sci: Cannot allocate irq.\n");
863 static void sci_free_irq(struct sci_port *port)
867 if (port->irqs[0] == port->irqs[1]) {
869 printk("sci: sci_free_irq error\n");
871 free_irq(port->irqs[0], port);
873 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
877 free_irq(port->irqs[i], port);
882 static unsigned int sci_tx_empty(struct uart_port *port)
888 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
890 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
891 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
892 /* If you have signals for DTR and DCD, please implement here. */
895 static unsigned int sci_get_mctrl(struct uart_port *port)
897 /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
900 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
903 static void sci_start_tx(struct uart_port *port)
907 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
908 ctrl = sci_in(port, SCSCR);
909 ctrl |= SCI_CTRL_FLAGS_TIE;
910 sci_out(port, SCSCR, ctrl);
913 static void sci_stop_tx(struct uart_port *port)
917 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
918 ctrl = sci_in(port, SCSCR);
919 ctrl &= ~SCI_CTRL_FLAGS_TIE;
920 sci_out(port, SCSCR, ctrl);
923 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
927 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
928 ctrl = sci_in(port, SCSCR);
929 ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
930 sci_out(port, SCSCR, ctrl);
933 static void sci_stop_rx(struct uart_port *port)
937 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
938 ctrl = sci_in(port, SCSCR);
939 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
940 sci_out(port, SCSCR, ctrl);
943 static void sci_enable_ms(struct uart_port *port)
945 /* Nothing here yet .. */
948 static void sci_break_ctl(struct uart_port *port, int break_state)
950 /* Nothing here yet .. */
953 static int sci_startup(struct uart_port *port)
955 struct sci_port *s = &sci_ports[port->line];
960 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
961 s->clk = clk_get(NULL, "module_clk");
966 sci_start_rx(port, 1);
971 static void sci_shutdown(struct uart_port *port)
973 struct sci_port *s = &sci_ports[port->line];
982 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
988 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
989 struct ktermios *old)
991 struct sci_port *s = &sci_ports[port->line];
992 unsigned int status, baud, smr_val;
995 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1003 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1004 t = SCBRR_VALUE(baud, clk_get_rate(s->clk));
1006 t = SCBRR_VALUE(baud);
1013 status = sci_in(port, SCxSR);
1014 } while (!(status & SCxSR_TEND(port)));
1016 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1018 #if !defined(SCI_ONLY)
1019 if (port->type == PORT_SCIF)
1020 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1023 smr_val = sci_in(port, SCSMR) & 3;
1024 if ((termios->c_cflag & CSIZE) == CS7)
1026 if (termios->c_cflag & PARENB)
1028 if (termios->c_cflag & PARODD)
1030 if (termios->c_cflag & CSTOPB)
1033 uart_update_timeout(port, termios->c_cflag, baud);
1035 sci_out(port, SCSMR, smr_val);
1039 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1042 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1044 sci_out(port, SCBRR, t);
1045 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1048 if (likely(s->init_pins))
1049 s->init_pins(port, termios->c_cflag);
1051 sci_out(port, SCSCR, SCSCR_INIT(port));
1053 if ((termios->c_cflag & CREAD) != 0)
1054 sci_start_rx(port,0);
1057 static const char *sci_type(struct uart_port *port)
1059 switch (port->type) {
1060 case PORT_SCI: return "sci";
1061 case PORT_SCIF: return "scif";
1062 case PORT_IRDA: return "irda";
1068 static void sci_release_port(struct uart_port *port)
1070 /* Nothing here yet .. */
1073 static int sci_request_port(struct uart_port *port)
1075 /* Nothing here yet .. */
1079 static void sci_config_port(struct uart_port *port, int flags)
1081 struct sci_port *s = &sci_ports[port->line];
1083 port->type = s->type;
1085 switch (port->type) {
1087 s->init_pins = sci_init_pins_sci;
1090 s->init_pins = sci_init_pins_scif;
1093 s->init_pins = sci_init_pins_irda;
1097 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1098 if (port->mapbase == 0)
1099 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1101 port->membase = (void __iomem *)port->mapbase;
1105 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1107 struct sci_port *s = &sci_ports[port->line];
1109 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
1111 if (ser->baud_base < 2400)
1112 /* No paper tape reader for Mitch.. */
1118 static struct uart_ops sci_uart_ops = {
1119 .tx_empty = sci_tx_empty,
1120 .set_mctrl = sci_set_mctrl,
1121 .get_mctrl = sci_get_mctrl,
1122 .start_tx = sci_start_tx,
1123 .stop_tx = sci_stop_tx,
1124 .stop_rx = sci_stop_rx,
1125 .enable_ms = sci_enable_ms,
1126 .break_ctl = sci_break_ctl,
1127 .startup = sci_startup,
1128 .shutdown = sci_shutdown,
1129 .set_termios = sci_set_termios,
1131 .release_port = sci_release_port,
1132 .request_port = sci_request_port,
1133 .config_port = sci_config_port,
1134 .verify_port = sci_verify_port,
1137 static void __init sci_init_ports(void)
1139 static int first = 1;
1147 for (i = 0; i < SCI_NPORTS; i++) {
1148 sci_ports[i].port.ops = &sci_uart_ops;
1149 sci_ports[i].port.iotype = UPIO_MEM;
1150 sci_ports[i].port.line = i;
1151 sci_ports[i].port.fifosize = 1;
1153 #if defined(__H8300H__) || defined(__H8300S__)
1155 sci_ports[i].enable = h8300_sci_enable;
1156 sci_ports[i].disable = h8300_sci_disable;
1158 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1159 #elif defined(CONFIG_SUPERH64)
1160 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1163 * XXX: We should use a proper SCI/SCIF clock
1166 struct clk *clk = clk_get(NULL, "module_clk");
1167 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1172 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1173 sci_ports[i].break_timer.function = sci_break_timer;
1175 init_timer(&sci_ports[i].break_timer);
1179 int __init early_sci_setup(struct uart_port *port)
1181 if (unlikely(port->line > SCI_NPORTS))
1186 sci_ports[port->line].port.membase = port->membase;
1187 sci_ports[port->line].port.mapbase = port->mapbase;
1188 sci_ports[port->line].port.type = port->type;
1193 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1195 * Print a string to the serial port trying not to disturb
1196 * any possible real use of the port...
1198 static void serial_console_write(struct console *co, const char *s,
1201 put_string(serial_console_port, s, count);
1204 static int __init serial_console_setup(struct console *co, char *options)
1206 struct uart_port *port;
1214 * Check whether an invalid uart number has been specified, and
1215 * if so, search for the first available port that does have
1218 if (co->index >= SCI_NPORTS)
1221 serial_console_port = &sci_ports[co->index];
1222 port = &serial_console_port->port;
1225 * Also need to check port->type, we don't actually have any
1226 * UPIO_PORT ports, but uart_report_port() handily misreports
1227 * it anyways if we don't have a port available by the time this is
1232 if (!port->membase || !port->mapbase)
1235 port->type = serial_console_port->type;
1237 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1238 if (!serial_console_port->clk)
1239 serial_console_port->clk = clk_get(NULL, "module_clk");
1242 if (port->flags & UPF_IOREMAP)
1243 sci_config_port(port, 0);
1245 if (serial_console_port->enable)
1246 serial_console_port->enable(port);
1249 uart_parse_options(options, &baud, &parity, &bits, &flow);
1251 ret = uart_set_options(port, co, baud, parity, bits, flow);
1252 #if defined(__H8300H__) || defined(__H8300S__)
1253 /* disable rx interrupt */
1260 static struct console serial_console = {
1262 .device = uart_console_device,
1263 .write = serial_console_write,
1264 .setup = serial_console_setup,
1265 .flags = CON_PRINTBUFFER,
1267 .data = &sci_uart_driver,
1270 static int __init sci_console_init(void)
1273 register_console(&serial_console);
1276 console_initcall(sci_console_init);
1277 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1279 #ifdef CONFIG_SH_KGDB
1281 * FIXME: Most of this can go away.. at the moment, we rely on
1282 * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1283 * most of that can easily be done here instead.
1285 * For the time being, just accept the values that were parsed earlier..
1287 static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1288 int *parity, int *bits)
1291 *parity = tolower(kgdb_parity);
1292 *bits = kgdb_bits - '0';
1296 * The naming here is somewhat misleading, since kgdb_console_setup() takes
1297 * care of the early-on initialization for kgdb, regardless of whether we
1298 * actually use kgdb as a console or not.
1300 * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1302 int __init kgdb_console_setup(struct console *co, char *options)
1304 struct uart_port *port = &sci_ports[kgdb_portnum].port;
1310 if (co->index != kgdb_portnum)
1311 co->index = kgdb_portnum;
1313 kgdb_sci_port = &sci_ports[co->index];
1314 port = &kgdb_sci_port->port;
1317 * Also need to check port->type, we don't actually have any
1318 * UPIO_PORT ports, but uart_report_port() handily misreports
1319 * it anyways if we don't have a port available by the time this is
1324 if (!port->membase || !port->mapbase)
1328 uart_parse_options(options, &baud, &parity, &bits, &flow);
1330 kgdb_console_get_options(port, &baud, &parity, &bits);
1332 kgdb_getchar = kgdb_sci_getchar;
1333 kgdb_putchar = kgdb_sci_putchar;
1335 return uart_set_options(port, co, baud, parity, bits, flow);
1337 #endif /* CONFIG_SH_KGDB */
1339 #ifdef CONFIG_SH_KGDB_CONSOLE
1340 static struct console kgdb_console = {
1342 .device = uart_console_device,
1343 .write = kgdb_console_write,
1344 .setup = kgdb_console_setup,
1345 .flags = CON_PRINTBUFFER,
1347 .data = &sci_uart_driver,
1350 /* Register the KGDB console so we get messages (d'oh!) */
1351 static int __init kgdb_console_init(void)
1354 register_console(&kgdb_console);
1357 console_initcall(kgdb_console_init);
1358 #endif /* CONFIG_SH_KGDB_CONSOLE */
1360 #if defined(CONFIG_SH_KGDB_CONSOLE)
1361 #define SCI_CONSOLE &kgdb_console
1362 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1363 #define SCI_CONSOLE &serial_console
1365 #define SCI_CONSOLE 0
1368 static char banner[] __initdata =
1369 KERN_INFO "SuperH SCI(F) driver initialized\n";
1371 static struct uart_driver sci_uart_driver = {
1372 .owner = THIS_MODULE,
1373 .driver_name = "sci",
1374 .dev_name = "ttySC",
1376 .minor = SCI_MINOR_START,
1378 .cons = SCI_CONSOLE,
1382 * Register a set of serial devices attached to a platform device. The
1383 * list is terminated with a zero flags entry, which means we expect
1384 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1385 * remapping (such as sh64) should also set UPF_IOREMAP.
1387 static int __devinit sci_probe(struct platform_device *dev)
1389 struct plat_sci_port *p = dev->dev.platform_data;
1392 for (i = 0; p && p->flags != 0; p++, i++) {
1393 struct sci_port *sciport = &sci_ports[i];
1396 if (unlikely(i == SCI_NPORTS)) {
1397 dev_notice(&dev->dev, "Attempting to register port "
1398 "%d when only %d are available.\n",
1400 dev_notice(&dev->dev, "Consider bumping "
1401 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1405 sciport->port.mapbase = p->mapbase;
1408 * For the simple (and majority of) cases where we don't need
1409 * to do any remapping, just cast the cookie directly.
1411 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1412 p->membase = (void __iomem *)p->mapbase;
1414 sciport->port.membase = p->membase;
1416 sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
1417 sciport->port.flags = p->flags;
1418 sciport->port.dev = &dev->dev;
1420 sciport->type = sciport->port.type = p->type;
1422 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1424 uart_add_one_port(&sci_uart_driver, &sciport->port);
1427 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1428 kgdb_sci_port = &sci_ports[kgdb_portnum];
1429 kgdb_getchar = kgdb_sci_getchar;
1430 kgdb_putchar = kgdb_sci_putchar;
1433 #ifdef CONFIG_CPU_FREQ
1434 cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1435 dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
1438 #ifdef CONFIG_SH_STANDARD_BIOS
1439 sh_bios_gdb_detach();
1445 static int __devexit sci_remove(struct platform_device *dev)
1449 for (i = 0; i < SCI_NPORTS; i++)
1450 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1455 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1459 for (i = 0; i < SCI_NPORTS; i++) {
1460 struct sci_port *p = &sci_ports[i];
1462 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1463 uart_suspend_port(&sci_uart_driver, &p->port);
1469 static int sci_resume(struct platform_device *dev)
1473 for (i = 0; i < SCI_NPORTS; i++) {
1474 struct sci_port *p = &sci_ports[i];
1476 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1477 uart_resume_port(&sci_uart_driver, &p->port);
1483 static struct platform_driver sci_driver = {
1485 .remove = __devexit_p(sci_remove),
1486 .suspend = sci_suspend,
1487 .resume = sci_resume,
1490 .owner = THIS_MODULE,
1494 static int __init sci_init(void)
1502 ret = uart_register_driver(&sci_uart_driver);
1503 if (likely(ret == 0)) {
1504 ret = platform_driver_register(&sci_driver);
1506 uart_unregister_driver(&sci_uart_driver);
1512 static void __exit sci_exit(void)
1514 platform_driver_unregister(&sci_driver);
1515 uart_unregister_driver(&sci_uart_driver);
1518 module_init(sci_init);
1519 module_exit(sci_exit);
1521 MODULE_LICENSE("GPL");