git.oblomov.eu Git - linux-2.6/blob - sound/sparc/cs4231.c

   1 /*
   2  * Driver for CS4231 sound chips found on Sparcs.
   3  * Copyright (C) 2002 David S. Miller <davem@redhat.com>
   4  *
   5  * Based entirely upon drivers/sbus/audio/cs4231.c which is:
   6  * Copyright (C) 1996, 1997, 1998, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
   7  * and also sound/isa/cs423x/cs4231_lib.c which is:
   8  * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/kernel.h>
  13 #include <linux/slab.h>
  14 #include <linux/delay.h>
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/moduleparam.h>
  18
  19 #include <sound/driver.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/info.h>
  23 #include <sound/control.h>
  24 #include <sound/timer.h>
  25 #include <sound/initval.h>
  26 #include <sound/pcm_params.h>
  27
  28 #include <asm/io.h>
  29 #include <asm/irq.h>
  30
  31 #ifdef CONFIG_SBUS
  32 #define SBUS_SUPPORT
  33 #endif
  34
  35 #ifdef SBUS_SUPPORT
  36 #include <asm/sbus.h>
  37 #endif
  38
  39 #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  40 #define EBUS_SUPPORT
  41 #endif
  42
  43 #ifdef EBUS_SUPPORT
  44 #include <linux/pci.h>
  45 #include <asm/ebus.h>
  46 #endif
  47
  48 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  49 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  50 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  51
  52 module_param_array(index, int, NULL, 0444);
  53 MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  54 module_param_array(id, charp, NULL, 0444);
  55 MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  56 module_param_array(enable, bool, NULL, 0444);
  57 MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  58 MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  59 MODULE_DESCRIPTION("Sun CS4231");
  60 MODULE_LICENSE("GPL");
  61 MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  62
  63 #ifdef SBUS_SUPPORT
  64 struct sbus_dma_info {
  65        spinlock_t      lock;
  66        int             dir;
  67        void __iomem    *regs;
  68 };
  69 #endif
  70
  71 struct snd_cs4231;
  72 struct cs4231_dma_control {
  73         void            (*prepare)(struct cs4231_dma_control *dma_cont, int dir);
  74         void            (*enable)(struct cs4231_dma_control *dma_cont, int on);
  75         int             (*request)(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len);
  76         unsigned int    (*address)(struct cs4231_dma_control *dma_cont);
  77         void            (*preallocate)(struct snd_cs4231 *chip, struct snd_pcm *pcm);
  78 #ifdef EBUS_SUPPORT
  79         struct          ebus_dma_info   ebus_info;
  80 #endif
  81 #ifdef SBUS_SUPPORT
  82         struct          sbus_dma_info   sbus_info;
  83 #endif
  84 };
  85
  86 struct snd_cs4231 {
  87         spinlock_t              lock;
  88         void __iomem            *port;
  89
  90         struct cs4231_dma_control       p_dma;
  91         struct cs4231_dma_control       c_dma;
  92
  93         u32                     flags;
  94 #define CS4231_FLAG_EBUS        0x00000001
  95 #define CS4231_FLAG_PLAYBACK    0x00000002
  96 #define CS4231_FLAG_CAPTURE     0x00000004
  97
  98         struct snd_card         *card;
  99         struct snd_pcm          *pcm;
 100         struct snd_pcm_substream        *playback_substream;
 101         unsigned int            p_periods_sent;
 102         struct snd_pcm_substream        *capture_substream;
 103         unsigned int            c_periods_sent;
 104         struct snd_timer        *timer;
 105
 106         unsigned short mode;
 107 #define CS4231_MODE_NONE        0x0000
 108 #define CS4231_MODE_PLAY        0x0001
 109 #define CS4231_MODE_RECORD      0x0002
 110 #define CS4231_MODE_TIMER       0x0004
 111 #define CS4231_MODE_OPEN        (CS4231_MODE_PLAY|CS4231_MODE_RECORD|CS4231_MODE_TIMER)
 112
 113         unsigned char           image[32];      /* registers image */
 114         int                     mce_bit;
 115         int                     calibrate_mute;
 116         struct mutex            mce_mutex;
 117         struct mutex            open_mutex;
 118
 119         union {
 120 #ifdef SBUS_SUPPORT
 121                 struct sbus_dev         *sdev;
 122 #endif
 123 #ifdef EBUS_SUPPORT
 124                 struct pci_dev          *pdev;
 125 #endif
 126         } dev_u;
 127         unsigned int            irq[2];
 128         unsigned int            regs_size;
 129         struct snd_cs4231       *next;
 130 };
 131
 132 static struct snd_cs4231 *cs4231_list;
 133
 134 /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
 135  * now....  -DaveM
 136  */
 137
 138 /* IO ports */
 139
 140 #define CS4231P(chip, x)        ((chip)->port + c_d_c_CS4231##x)
 141
 142 /* XXX offsets are different than PC ISA chips... */
 143 #define c_d_c_CS4231REGSEL      0x0
 144 #define c_d_c_CS4231REG         0x4
 145 #define c_d_c_CS4231STATUS      0x8
 146 #define c_d_c_CS4231PIO         0xc
 147
 148 /* codec registers */
 149
 150 #define CS4231_LEFT_INPUT       0x00    /* left input control */
 151 #define CS4231_RIGHT_INPUT      0x01    /* right input control */
 152 #define CS4231_AUX1_LEFT_INPUT  0x02    /* left AUX1 input control */
 153 #define CS4231_AUX1_RIGHT_INPUT 0x03    /* right AUX1 input control */
 154 #define CS4231_AUX2_LEFT_INPUT  0x04    /* left AUX2 input control */
 155 #define CS4231_AUX2_RIGHT_INPUT 0x05    /* right AUX2 input control */
 156 #define CS4231_LEFT_OUTPUT      0x06    /* left output control register */
 157 #define CS4231_RIGHT_OUTPUT     0x07    /* right output control register */
 158 #define CS4231_PLAYBK_FORMAT    0x08    /* clock and data format - playback - bits 7-0 MCE */
 159 #define CS4231_IFACE_CTRL       0x09    /* interface control - bits 7-2 MCE */
 160 #define CS4231_PIN_CTRL         0x0a    /* pin control */
 161 #define CS4231_TEST_INIT        0x0b    /* test and initialization */
 162 #define CS4231_MISC_INFO        0x0c    /* miscellaneaous information */
 163 #define CS4231_LOOPBACK         0x0d    /* loopback control */
 164 #define CS4231_PLY_UPR_CNT      0x0e    /* playback upper base count */
 165 #define CS4231_PLY_LWR_CNT      0x0f    /* playback lower base count */
 166 #define CS4231_ALT_FEATURE_1    0x10    /* alternate #1 feature enable */
 167 #define CS4231_ALT_FEATURE_2    0x11    /* alternate #2 feature enable */
 168 #define CS4231_LEFT_LINE_IN     0x12    /* left line input control */
 169 #define CS4231_RIGHT_LINE_IN    0x13    /* right line input control */
 170 #define CS4231_TIMER_LOW        0x14    /* timer low byte */
 171 #define CS4231_TIMER_HIGH       0x15    /* timer high byte */
 172 #define CS4231_LEFT_MIC_INPUT   0x16    /* left MIC input control register (InterWave only) */
 173 #define CS4231_RIGHT_MIC_INPUT  0x17    /* right MIC input control register (InterWave only) */
 174 #define CS4236_EXT_REG          0x17    /* extended register access */
 175 #define CS4231_IRQ_STATUS       0x18    /* irq status register */
 176 #define CS4231_LINE_LEFT_OUTPUT 0x19    /* left line output control register (InterWave only) */
 177 #define CS4231_VERSION          0x19    /* CS4231(A) - version values */
 178 #define CS4231_MONO_CTRL        0x1a    /* mono input/output control */
 179 #define CS4231_LINE_RIGHT_OUTPUT 0x1b   /* right line output control register (InterWave only) */
 180 #define CS4235_LEFT_MASTER      0x1b    /* left master output control */
 181 #define CS4231_REC_FORMAT       0x1c    /* clock and data format - record - bits 7-0 MCE */
 182 #define CS4231_PLY_VAR_FREQ     0x1d    /* playback variable frequency */
 183 #define CS4235_RIGHT_MASTER     0x1d    /* right master output control */
 184 #define CS4231_REC_UPR_CNT      0x1e    /* record upper count */
 185 #define CS4231_REC_LWR_CNT      0x1f    /* record lower count */
 186
 187 /* definitions for codec register select port - CODECP( REGSEL ) */
 188
 189 #define CS4231_INIT             0x80    /* CODEC is initializing */
 190 #define CS4231_MCE              0x40    /* mode change enable */
 191 #define CS4231_TRD              0x20    /* transfer request disable */
 192
 193 /* definitions for codec status register - CODECP( STATUS ) */
 194
 195 #define CS4231_GLOBALIRQ        0x01    /* IRQ is active */
 196
 197 /* definitions for codec irq status - CS4231_IRQ_STATUS */
 198
 199 #define CS4231_PLAYBACK_IRQ     0x10
 200 #define CS4231_RECORD_IRQ       0x20
 201 #define CS4231_TIMER_IRQ        0x40
 202 #define CS4231_ALL_IRQS         0x70
 203 #define CS4231_REC_UNDERRUN     0x08
 204 #define CS4231_REC_OVERRUN      0x04
 205 #define CS4231_PLY_OVERRUN      0x02
 206 #define CS4231_PLY_UNDERRUN     0x01
 207
 208 /* definitions for CS4231_LEFT_INPUT and CS4231_RIGHT_INPUT registers */
 209
 210 #define CS4231_ENABLE_MIC_GAIN  0x20
 211
 212 #define CS4231_MIXS_LINE        0x00
 213 #define CS4231_MIXS_AUX1        0x40
 214 #define CS4231_MIXS_MIC         0x80
 215 #define CS4231_MIXS_ALL         0xc0
 216
 217 /* definitions for clock and data format register - CS4231_PLAYBK_FORMAT */
 218
 219 #define CS4231_LINEAR_8         0x00    /* 8-bit unsigned data */
 220 #define CS4231_ALAW_8           0x60    /* 8-bit A-law companded */
 221 #define CS4231_ULAW_8           0x20    /* 8-bit U-law companded */
 222 #define CS4231_LINEAR_16        0x40    /* 16-bit twos complement data - little endian */
 223 #define CS4231_LINEAR_16_BIG    0xc0    /* 16-bit twos complement data - big endian */
 224 #define CS4231_ADPCM_16         0xa0    /* 16-bit ADPCM */
 225 #define CS4231_STEREO           0x10    /* stereo mode */
 226 /* bits 3-1 define frequency divisor */
 227 #define CS4231_XTAL1            0x00    /* 24.576 crystal */
 228 #define CS4231_XTAL2            0x01    /* 16.9344 crystal */
 229
 230 /* definitions for interface control register - CS4231_IFACE_CTRL */
 231
 232 #define CS4231_RECORD_PIO       0x80    /* record PIO enable */
 233 #define CS4231_PLAYBACK_PIO     0x40    /* playback PIO enable */
 234 #define CS4231_CALIB_MODE       0x18    /* calibration mode bits */
 235 #define CS4231_AUTOCALIB        0x08    /* auto calibrate */
 236 #define CS4231_SINGLE_DMA       0x04    /* use single DMA channel */
 237 #define CS4231_RECORD_ENABLE    0x02    /* record enable */
 238 #define CS4231_PLAYBACK_ENABLE  0x01    /* playback enable */
 239
 240 /* definitions for pin control register - CS4231_PIN_CTRL */
 241
 242 #define CS4231_IRQ_ENABLE       0x02    /* enable IRQ */
 243 #define CS4231_XCTL1            0x40    /* external control #1 */
 244 #define CS4231_XCTL0            0x80    /* external control #0 */
 245
 246 /* definitions for test and init register - CS4231_TEST_INIT */
 247
 248 #define CS4231_CALIB_IN_PROGRESS 0x20   /* auto calibrate in progress */
 249 #define CS4231_DMA_REQUEST      0x10    /* DMA request in progress */
 250
 251 /* definitions for misc control register - CS4231_MISC_INFO */
 252
 253 #define CS4231_MODE2            0x40    /* MODE 2 */
 254 #define CS4231_IW_MODE3         0x6c    /* MODE 3 - InterWave enhanced mode */
 255 #define CS4231_4236_MODE3       0xe0    /* MODE 3 - CS4236+ enhanced mode */
 256
 257 /* definitions for alternate feature 1 register - CS4231_ALT_FEATURE_1 */
 258
 259 #define CS4231_DACZ             0x01    /* zero DAC when underrun */
 260 #define CS4231_TIMER_ENABLE     0x40    /* codec timer enable */
 261 #define CS4231_OLB              0x80    /* output level bit */
 262
 263 /* SBUS DMA register defines.  */
 264
 265 #define APCCSR  0x10UL  /* APC DMA CSR */
 266 #define APCCVA  0x20UL  /* APC Capture DMA Address */
 267 #define APCCC   0x24UL  /* APC Capture Count */
 268 #define APCCNVA 0x28UL  /* APC Capture DMA Next Address */
 269 #define APCCNC  0x2cUL  /* APC Capture Next Count */
 270 #define APCPVA  0x30UL  /* APC Play DMA Address */
 271 #define APCPC   0x34UL  /* APC Play Count */
 272 #define APCPNVA 0x38UL  /* APC Play DMA Next Address */
 273 #define APCPNC  0x3cUL  /* APC Play Next Count */
 274
 275 /* Defines for SBUS DMA-routines */
 276
 277 #define APCVA  0x0UL    /* APC DMA Address */
 278 #define APCC   0x4UL    /* APC Count */
 279 #define APCNVA 0x8UL    /* APC DMA Next Address */
 280 #define APCNC  0xcUL    /* APC Next Count */
 281 #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
 282 #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
 283
 284 /* APCCSR bits */
 285
 286 #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
 287 #define APC_PLAY_INT    0x400000 /* Playback interrupt */
 288 #define APC_CAPT_INT    0x200000 /* Capture interrupt */
 289 #define APC_GENL_INT    0x100000 /* General interrupt */
 290 #define APC_XINT_ENA    0x80000  /* General ext int. enable */
 291 #define APC_XINT_PLAY   0x40000  /* Playback ext intr */
 292 #define APC_XINT_CAPT   0x20000  /* Capture ext intr */
 293 #define APC_XINT_GENL   0x10000  /* Error ext intr */
 294 #define APC_XINT_EMPT   0x8000   /* Pipe empty interrupt (0 write to pva) */
 295 #define APC_XINT_PEMP   0x4000   /* Play pipe empty (pva and pnva not set) */
 296 #define APC_XINT_PNVA   0x2000   /* Playback NVA dirty */
 297 #define APC_XINT_PENA   0x1000   /* play pipe empty Int enable */
 298 #define APC_XINT_COVF   0x800    /* Cap data dropped on floor */
 299 #define APC_XINT_CNVA   0x400    /* Capture NVA dirty */
 300 #define APC_XINT_CEMP   0x200    /* Capture pipe empty (cva and cnva not set) */
 301 #define APC_XINT_CENA   0x100    /* Cap. pipe empty int enable */
 302 #define APC_PPAUSE      0x80     /* Pause the play DMA */
 303 #define APC_CPAUSE      0x40     /* Pause the capture DMA */
 304 #define APC_CDC_RESET   0x20     /* CODEC RESET */
 305 #define APC_PDMA_READY  0x08     /* Play DMA Go */
 306 #define APC_CDMA_READY  0x04     /* Capture DMA Go */
 307 #define APC_CHIP_RESET  0x01     /* Reset the chip */
 308
 309 /* EBUS DMA register offsets  */
 310
 311 #define EBDMA_CSR       0x00UL  /* Control/Status */
 312 #define EBDMA_ADDR      0x04UL  /* DMA Address */
 313 #define EBDMA_COUNT     0x08UL  /* DMA Count */
 314
 315 /*
 316  *  Some variables
 317  */
 318
 319 static unsigned char freq_bits[14] = {
 320         /* 5510 */      0x00 | CS4231_XTAL2,
 321         /* 6620 */      0x0E | CS4231_XTAL2,
 322         /* 8000 */      0x00 | CS4231_XTAL1,
 323         /* 9600 */      0x0E | CS4231_XTAL1,
 324         /* 11025 */     0x02 | CS4231_XTAL2,
 325         /* 16000 */     0x02 | CS4231_XTAL1,
 326         /* 18900 */     0x04 | CS4231_XTAL2,
 327         /* 22050 */     0x06 | CS4231_XTAL2,
 328         /* 27042 */     0x04 | CS4231_XTAL1,
 329         /* 32000 */     0x06 | CS4231_XTAL1,
 330         /* 33075 */     0x0C | CS4231_XTAL2,
 331         /* 37800 */     0x08 | CS4231_XTAL2,
 332         /* 44100 */     0x0A | CS4231_XTAL2,
 333         /* 48000 */     0x0C | CS4231_XTAL1
 334 };
 335
 336 static unsigned int rates[14] = {
 337         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
 338         27042, 32000, 33075, 37800, 44100, 48000
 339 };
 340
 341 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
 342         .count  = 14,
 343         .list   = rates,
 344 };
 345
 346 static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
 347 {
 348         return snd_pcm_hw_constraint_list(runtime, 0,
 349                                           SNDRV_PCM_HW_PARAM_RATE,
 350                                           &hw_constraints_rates);
 351 }
 352
 353 static unsigned char snd_cs4231_original_image[32] =
 354 {
 355         0x00,                   /* 00/00 - lic */
 356         0x00,                   /* 01/01 - ric */
 357         0x9f,                   /* 02/02 - la1ic */
 358         0x9f,                   /* 03/03 - ra1ic */
 359         0x9f,                   /* 04/04 - la2ic */
 360         0x9f,                   /* 05/05 - ra2ic */
 361         0xbf,                   /* 06/06 - loc */
 362         0xbf,                   /* 07/07 - roc */
 363         0x20,                   /* 08/08 - pdfr */
 364         CS4231_AUTOCALIB,       /* 09/09 - ic */
 365         0x00,                   /* 0a/10 - pc */
 366         0x00,                   /* 0b/11 - ti */
 367         CS4231_MODE2,           /* 0c/12 - mi */
 368         0x00,                   /* 0d/13 - lbc */
 369         0x00,                   /* 0e/14 - pbru */
 370         0x00,                   /* 0f/15 - pbrl */
 371         0x80,                   /* 10/16 - afei */
 372         0x01,                   /* 11/17 - afeii */
 373         0x9f,                   /* 12/18 - llic */
 374         0x9f,                   /* 13/19 - rlic */
 375         0x00,                   /* 14/20 - tlb */
 376         0x00,                   /* 15/21 - thb */
 377         0x00,                   /* 16/22 - la3mic/reserved */
 378         0x00,                   /* 17/23 - ra3mic/reserved */
 379         0x00,                   /* 18/24 - afs */
 380         0x00,                   /* 19/25 - lamoc/version */
 381         0x00,                   /* 1a/26 - mioc */
 382         0x00,                   /* 1b/27 - ramoc/reserved */
 383         0x20,                   /* 1c/28 - cdfr */
 384         0x00,                   /* 1d/29 - res4 */
 385         0x00,                   /* 1e/30 - cbru */
 386         0x00,                   /* 1f/31 - cbrl */
 387 };
 388
 389 static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
 390 {
 391 #ifdef EBUS_SUPPORT
 392         if (cp->flags & CS4231_FLAG_EBUS) {
 393                 return readb(reg_addr);
 394         } else {
 395 #endif
 396 #ifdef SBUS_SUPPORT
 397                 return sbus_readb(reg_addr);
 398 #endif
 399 #ifdef EBUS_SUPPORT
 400         }
 401 #endif
 402 }
 403
 404 static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val, void __iomem *reg_addr)
 405 {
 406 #ifdef EBUS_SUPPORT
 407         if (cp->flags & CS4231_FLAG_EBUS) {
 408                 return writeb(val, reg_addr);
 409         } else {
 410 #endif
 411 #ifdef SBUS_SUPPORT
 412                 return sbus_writeb(val, reg_addr);
 413 #endif
 414 #ifdef EBUS_SUPPORT
 415         }
 416 #endif
 417 }
 418
 419 /*
 420  *  Basic I/O functions
 421  */
 422
 423 static void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
 424                      unsigned char mask, unsigned char value)
 425 {
 426         int timeout;
 427         unsigned char tmp;
 428
 429         for (timeout = 250;
 430              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 431              timeout--)
 432                 udelay(100);
 433 #ifdef CONFIG_SND_DEBUG
 434         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 435                 snd_printdd("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 436 #endif
 437         if (chip->calibrate_mute) {
 438                 chip->image[reg] &= mask;
 439                 chip->image[reg] |= value;
 440         } else {
 441                 __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 442                 mb();
 443                 tmp = (chip->image[reg] & mask) | value;
 444                 __cs4231_writeb(chip, tmp, CS4231P(chip, REG));
 445                 chip->image[reg] = tmp;
 446                 mb();
 447         }
 448 }
 449
 450 static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
 451 {
 452         int timeout;
 453
 454         for (timeout = 250;
 455              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 456              timeout--)
 457                 udelay(100);
 458 #ifdef CONFIG_SND_DEBUG
 459         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 460                 snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 461 #endif
 462         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 463         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 464         mb();
 465 }
 466
 467 static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg, unsigned char value)
 468 {
 469         int timeout;
 470
 471         for (timeout = 250;
 472              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 473              timeout--)
 474                 udelay(100);
 475 #ifdef CONFIG_SND_DEBUG
 476         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 477                 snd_printdd("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
 478 #endif
 479         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 480         __cs4231_writeb(chip, value, CS4231P(chip, REG));
 481         chip->image[reg] = value;
 482         mb();
 483 }
 484
 485 static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
 486 {
 487         int timeout;
 488         unsigned char ret;
 489
 490         for (timeout = 250;
 491              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 492              timeout--)
 493                 udelay(100);
 494 #ifdef CONFIG_SND_DEBUG
 495         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 496                 snd_printdd("in: auto calibration time out - reg = 0x%x\n", reg);
 497 #endif
 498         __cs4231_writeb(chip, chip->mce_bit | reg, CS4231P(chip, REGSEL));
 499         mb();
 500         ret = __cs4231_readb(chip, CS4231P(chip, REG));
 501         return ret;
 502 }
 503
 504 /*
 505  *  CS4231 detection / MCE routines
 506  */
 507
 508 static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
 509 {
 510         int timeout;
 511
 512         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
 513         for (timeout = 5; timeout > 0; timeout--)
 514                 __cs4231_readb(chip, CS4231P(chip, REGSEL));
 515
 516         /* end of cleanup sequence */
 517         for (timeout = 500;
 518              timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT);
 519              timeout--)
 520                 udelay(1000);
 521 }
 522
 523 static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
 524 {
 525         unsigned long flags;
 526         int timeout;
 527
 528         spin_lock_irqsave(&chip->lock, flags);
 529         for (timeout = 250; timeout > 0 && (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT); timeout--)
 530                 udelay(100);
 531 #ifdef CONFIG_SND_DEBUG
 532         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 533                 snd_printdd("mce_up - auto calibration time out (0)\n");
 534 #endif
 535         chip->mce_bit |= CS4231_MCE;
 536         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 537         if (timeout == 0x80)
 538                 snd_printdd("mce_up [%p]: serious init problem - codec still busy\n", chip->port);
 539         if (!(timeout & CS4231_MCE))
 540                 __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 541         spin_unlock_irqrestore(&chip->lock, flags);
 542 }
 543
 544 static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
 545 {
 546         unsigned long flags;
 547         int timeout;
 548
 549         spin_lock_irqsave(&chip->lock, flags);
 550         snd_cs4231_busy_wait(chip);
 551 #ifdef CONFIG_SND_DEBUG
 552         if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
 553                 snd_printdd("mce_down [%p] - auto calibration time out (0)\n", CS4231P(chip, REGSEL));
 554 #endif
 555         chip->mce_bit &= ~CS4231_MCE;
 556         timeout = __cs4231_readb(chip, CS4231P(chip, REGSEL));
 557         __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f), CS4231P(chip, REGSEL));
 558         if (timeout == 0x80)
 559                 snd_printdd("mce_down [%p]: serious init problem - codec still busy\n", chip->port);
 560         if ((timeout & CS4231_MCE) == 0) {
 561                 spin_unlock_irqrestore(&chip->lock, flags);
 562                 return;
 563         }
 564         snd_cs4231_busy_wait(chip);
 565
 566         /* calibration process */
 567
 568         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
 569                 udelay(100);
 570         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
 571                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
 572                 spin_unlock_irqrestore(&chip->lock, flags);
 573                 return;
 574         }
 575
 576         /* in 10ms increments, check condition, up to 250ms */
 577         timeout = 25;
 578         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
 579                 spin_unlock_irqrestore(&chip->lock, flags);
 580                 if (--timeout < 0) {
 581                         snd_printk("mce_down - auto calibration time out (2)\n");
 582                         return;
 583                 }
 584                 msleep(10);
 585                 spin_lock_irqsave(&chip->lock, flags);
 586         }
 587
 588         /* in 10ms increments, check condition, up to 100ms */
 589         timeout = 10;
 590         while (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT) {
 591                 spin_unlock_irqrestore(&chip->lock, flags);
 592                 if (--timeout < 0) {
 593                         snd_printk("mce_down - auto calibration time out (3)\n");
 594                         return;
 595                 }
 596                 msleep(10);
 597                 spin_lock_irqsave(&chip->lock, flags);
 598         }
 599         spin_unlock_irqrestore(&chip->lock, flags);
 600 }
 601
 602 static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
 603                                    struct snd_pcm_substream *substream,
 604                                    unsigned int *periods_sent)
 605 {
 606         struct snd_pcm_runtime *runtime = substream->runtime;
 607
 608         while (1) {
 609                 unsigned int period_size = snd_pcm_lib_period_bytes(substream);
 610                 unsigned int offset = period_size * (*periods_sent);
 611
 612                 BUG_ON(period_size >= (1 << 24));
 613
 614                 if (dma_cont->request(dma_cont, runtime->dma_addr + offset, period_size))
 615                         return;
 616                 (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
 617         }
 618 }
 619
 620 static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
 621                                unsigned int what, int on)
 622 {
 623         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
 624         struct cs4231_dma_control *dma_cont;
 625
 626         if (what & CS4231_PLAYBACK_ENABLE) {
 627                 dma_cont = &chip->p_dma;
 628                 if (on) {
 629                         dma_cont->prepare(dma_cont, 0);
 630                         dma_cont->enable(dma_cont, 1);
 631                         snd_cs4231_advance_dma(dma_cont,
 632                                 chip->playback_substream,
 633                                 &chip->p_periods_sent);
 634                 } else {
 635                         dma_cont->enable(dma_cont, 0);
 636                 }
 637         }
 638         if (what & CS4231_RECORD_ENABLE) {
 639                 dma_cont = &chip->c_dma;
 640                 if (on) {
 641                         dma_cont->prepare(dma_cont, 1);
 642                         dma_cont->enable(dma_cont, 1);
 643                         snd_cs4231_advance_dma(dma_cont,
 644                                 chip->capture_substream,
 645                                 &chip->c_periods_sent);
 646                 } else {
 647                         dma_cont->enable(dma_cont, 0);
 648                 }
 649         }
 650 }
 651
 652 static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
 653 {
 654         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
 655         int result = 0;
 656
 657         switch (cmd) {
 658         case SNDRV_PCM_TRIGGER_START:
 659         case SNDRV_PCM_TRIGGER_STOP:
 660         {
 661                 unsigned int what = 0;
 662                 struct snd_pcm_substream *s;
 663                 unsigned long flags;
 664
 665                 snd_pcm_group_for_each_entry(s, substream) {
 666                         if (s == chip->playback_substream) {
 667                                 what |= CS4231_PLAYBACK_ENABLE;
 668                                 snd_pcm_trigger_done(s, substream);
 669                         } else if (s == chip->capture_substream) {
 670                                 what |= CS4231_RECORD_ENABLE;
 671                                 snd_pcm_trigger_done(s, substream);
 672                         }
 673                 }
 674
 675                 spin_lock_irqsave(&chip->lock, flags);
 676                 if (cmd == SNDRV_PCM_TRIGGER_START) {
 677                         cs4231_dma_trigger(substream, what, 1);
 678                         chip->image[CS4231_IFACE_CTRL] |= what;
 679                 } else {
 680                         cs4231_dma_trigger(substream, what, 0);
 681                         chip->image[CS4231_IFACE_CTRL] &= ~what;
 682                 }
 683                 snd_cs4231_out(chip, CS4231_IFACE_CTRL,
 684                                chip->image[CS4231_IFACE_CTRL]);
 685                 spin_unlock_irqrestore(&chip->lock, flags);
 686                 break;
 687         }
 688         default:
 689                 result = -EINVAL;
 690                 break;
 691         }
 692
 693         return result;
 694 }
 695
 696 /*
 697  *  CODEC I/O
 698  */
 699
 700 static unsigned char snd_cs4231_get_rate(unsigned int rate)
 701 {
 702         int i;
 703
 704         for (i = 0; i < 14; i++)
 705                 if (rate == rates[i])
 706                         return freq_bits[i];
 707         // snd_BUG();
 708         return freq_bits[13];
 709 }
 710
 711 static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format, int channels)
 712 {
 713         unsigned char rformat;
 714
 715         rformat = CS4231_LINEAR_8;
 716         switch (format) {
 717         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
 718         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
 719         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
 720         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
 721         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
 722         }
 723         if (channels > 1)
 724                 rformat |= CS4231_STEREO;
 725         return rformat;
 726 }
 727
 728 static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
 729 {
 730         unsigned long flags;
 731
 732         mute = mute ? 1 : 0;
 733         spin_lock_irqsave(&chip->lock, flags);
 734         if (chip->calibrate_mute == mute) {
 735                 spin_unlock_irqrestore(&chip->lock, flags);
 736                 return;
 737         }
 738         if (!mute) {
 739                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
 740                                 chip->image[CS4231_LEFT_INPUT]);
 741                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
 742                                 chip->image[CS4231_RIGHT_INPUT]);
 743                 snd_cs4231_dout(chip, CS4231_LOOPBACK,
 744                                 chip->image[CS4231_LOOPBACK]);
 745         }
 746         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
 747                         mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
 748         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
 749                         mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
 750         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
 751                         mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
 752         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
 753                         mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
 754         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
 755                         mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
 756         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
 757                         mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
 758         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
 759                         mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
 760         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
 761                         mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
 762         snd_cs4231_dout(chip, CS4231_MONO_CTRL,
 763                         mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
 764         chip->calibrate_mute = mute;
 765         spin_unlock_irqrestore(&chip->lock, flags);
 766 }
 767
 768 static void snd_cs4231_playback_format(struct snd_cs4231 *chip, struct snd_pcm_hw_params *params,
 769                                        unsigned char pdfr)
 770 {
 771         unsigned long flags;
 772
 773         mutex_lock(&chip->mce_mutex);
 774         snd_cs4231_calibrate_mute(chip, 1);
 775
 776         snd_cs4231_mce_up(chip);
 777
 778         spin_lock_irqsave(&chip->lock, flags);
 779         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 780                        (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
 781                        (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
 782                        pdfr);
 783         spin_unlock_irqrestore(&chip->lock, flags);
 784
 785         snd_cs4231_mce_down(chip);
 786
 787         snd_cs4231_calibrate_mute(chip, 0);
 788         mutex_unlock(&chip->mce_mutex);
 789 }
 790
 791 static void snd_cs4231_capture_format(struct snd_cs4231 *chip, struct snd_pcm_hw_params *params,
 792                                       unsigned char cdfr)
 793 {
 794         unsigned long flags;
 795
 796         mutex_lock(&chip->mce_mutex);
 797         snd_cs4231_calibrate_mute(chip, 1);
 798
 799         snd_cs4231_mce_up(chip);
 800
 801         spin_lock_irqsave(&chip->lock, flags);
 802         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
 803                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
 804                                ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
 805                                (cdfr & 0x0f));
 806                 spin_unlock_irqrestore(&chip->lock, flags);
 807                 snd_cs4231_mce_down(chip);
 808                 snd_cs4231_mce_up(chip);
 809                 spin_lock_irqsave(&chip->lock, flags);
 810         }
 811         snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
 812         spin_unlock_irqrestore(&chip->lock, flags);
 813
 814         snd_cs4231_mce_down(chip);
 815
 816         snd_cs4231_calibrate_mute(chip, 0);
 817         mutex_unlock(&chip->mce_mutex);
 818 }
 819
 820 /*
 821  *  Timer interface
 822  */
 823
 824 static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
 825 {
 826         struct snd_cs4231 *chip = snd_timer_chip(timer);
 827
 828         return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
 829 }
 830
 831 static int snd_cs4231_timer_start(struct snd_timer *timer)
 832 {
 833         unsigned long flags;
 834         unsigned int ticks;
 835         struct snd_cs4231 *chip = snd_timer_chip(timer);
 836
 837         spin_lock_irqsave(&chip->lock, flags);
 838         ticks = timer->sticks;
 839         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
 840             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
 841             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
 842                 snd_cs4231_out(chip, CS4231_TIMER_HIGH,
 843                                chip->image[CS4231_TIMER_HIGH] =
 844                                (unsigned char) (ticks >> 8));
 845                 snd_cs4231_out(chip, CS4231_TIMER_LOW,
 846                                chip->image[CS4231_TIMER_LOW] =
 847                                (unsigned char) ticks);
 848                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 849                                chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
 850         }
 851         spin_unlock_irqrestore(&chip->lock, flags);
 852
 853         return 0;
 854 }
 855
 856 static int snd_cs4231_timer_stop(struct snd_timer *timer)
 857 {
 858         unsigned long flags;
 859         struct snd_cs4231 *chip = snd_timer_chip(timer);
 860
 861         spin_lock_irqsave(&chip->lock, flags);
 862         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
 863                        chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
 864         spin_unlock_irqrestore(&chip->lock, flags);
 865
 866         return 0;
 867 }
 868
 869 static void __init snd_cs4231_init(struct snd_cs4231 *chip)
 870 {
 871         unsigned long flags;
 872
 873         snd_cs4231_mce_down(chip);
 874
 875 #ifdef SNDRV_DEBUG_MCE
 876         snd_printdd("init: (1)\n");
 877 #endif
 878         snd_cs4231_mce_up(chip);
 879         spin_lock_irqsave(&chip->lock, flags);
 880         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 881                                             CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
 882                                             CS4231_CALIB_MODE);
 883         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
 884         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 885         spin_unlock_irqrestore(&chip->lock, flags);
 886         snd_cs4231_mce_down(chip);
 887
 888 #ifdef SNDRV_DEBUG_MCE
 889         snd_printdd("init: (2)\n");
 890 #endif
 891
 892         snd_cs4231_mce_up(chip);
 893         spin_lock_irqsave(&chip->lock, flags);
 894         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
 895         spin_unlock_irqrestore(&chip->lock, flags);
 896         snd_cs4231_mce_down(chip);
 897
 898 #ifdef SNDRV_DEBUG_MCE
 899         snd_printdd("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
 900 #endif
 901
 902         spin_lock_irqsave(&chip->lock, flags);
 903         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
 904         spin_unlock_irqrestore(&chip->lock, flags);
 905
 906         snd_cs4231_mce_up(chip);
 907         spin_lock_irqsave(&chip->lock, flags);
 908         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
 909         spin_unlock_irqrestore(&chip->lock, flags);
 910         snd_cs4231_mce_down(chip);
 911
 912 #ifdef SNDRV_DEBUG_MCE
 913         snd_printdd("init: (4)\n");
 914 #endif
 915
 916         snd_cs4231_mce_up(chip);
 917         spin_lock_irqsave(&chip->lock, flags);
 918         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
 919         spin_unlock_irqrestore(&chip->lock, flags);
 920         snd_cs4231_mce_down(chip);
 921
 922 #ifdef SNDRV_DEBUG_MCE
 923         snd_printdd("init: (5)\n");
 924 #endif
 925 }
 926
 927 static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
 928 {
 929         unsigned long flags;
 930
 931         mutex_lock(&chip->open_mutex);
 932         if ((chip->mode & mode)) {
 933                 mutex_unlock(&chip->open_mutex);
 934                 return -EAGAIN;
 935         }
 936         if (chip->mode & CS4231_MODE_OPEN) {
 937                 chip->mode |= mode;
 938                 mutex_unlock(&chip->open_mutex);
 939                 return 0;
 940         }
 941         /* ok. now enable and ack CODEC IRQ */
 942         spin_lock_irqsave(&chip->lock, flags);
 943         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
 944                        CS4231_RECORD_IRQ |
 945                        CS4231_TIMER_IRQ);
 946         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 947         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 948         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 949
 950         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
 951                        CS4231_RECORD_IRQ |
 952                        CS4231_TIMER_IRQ);
 953         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 954
 955         spin_unlock_irqrestore(&chip->lock, flags);
 956
 957         chip->mode = mode;
 958         mutex_unlock(&chip->open_mutex);
 959         return 0;
 960 }
 961
 962 static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
 963 {
 964         unsigned long flags;
 965
 966         mutex_lock(&chip->open_mutex);
 967         chip->mode &= ~mode;
 968         if (chip->mode & CS4231_MODE_OPEN) {
 969                 mutex_unlock(&chip->open_mutex);
 970                 return;
 971         }
 972         snd_cs4231_calibrate_mute(chip, 1);
 973
 974         /* disable IRQ */
 975         spin_lock_irqsave(&chip->lock, flags);
 976         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 977         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 978         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
 979
 980         /* now disable record & playback */
 981
 982         if (chip->image[CS4231_IFACE_CTRL] &
 983             (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 984              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
 985                 spin_unlock_irqrestore(&chip->lock, flags);
 986                 snd_cs4231_mce_up(chip);
 987                 spin_lock_irqsave(&chip->lock, flags);
 988                 chip->image[CS4231_IFACE_CTRL] &=
 989                         ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
 990                           CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
 991                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
 992                 spin_unlock_irqrestore(&chip->lock, flags);
 993                 snd_cs4231_mce_down(chip);
 994                 spin_lock_irqsave(&chip->lock, flags);
 995         }
 996
 997         /* clear IRQ again */
 998         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
 999         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1000         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));        /* clear IRQ */
1001         spin_unlock_irqrestore(&chip->lock, flags);
1002
1003         snd_cs4231_calibrate_mute(chip, 0);
1004
1005         chip->mode = 0;
1006         mutex_unlock(&chip->open_mutex);
1007 }
1008
1009 /*
1010  *  timer open/close
1011  */
1012
1013 static int snd_cs4231_timer_open(struct snd_timer *timer)
1014 {
1015         struct snd_cs4231 *chip = snd_timer_chip(timer);
1016         snd_cs4231_open(chip, CS4231_MODE_TIMER);
1017         return 0;
1018 }
1019
1020 static int snd_cs4231_timer_close(struct snd_timer * timer)
1021 {
1022         struct snd_cs4231 *chip = snd_timer_chip(timer);
1023         snd_cs4231_close(chip, CS4231_MODE_TIMER);
1024         return 0;
1025 }
1026
1027 static struct snd_timer_hardware snd_cs4231_timer_table =
1028 {
1029         .flags          =       SNDRV_TIMER_HW_AUTO,
1030         .resolution     =       9945,
1031         .ticks          =       65535,
1032         .open           =       snd_cs4231_timer_open,
1033         .close          =       snd_cs4231_timer_close,
1034         .c_resolution   =       snd_cs4231_timer_resolution,
1035         .start          =       snd_cs4231_timer_start,
1036         .stop           =       snd_cs4231_timer_stop,
1037 };
1038
1039 /*
1040  *  ok.. exported functions..
1041  */
1042
1043 static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
1044                                          struct snd_pcm_hw_params *hw_params)
1045 {
1046         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1047         unsigned char new_pdfr;
1048         int err;
1049
1050         if ((err = snd_pcm_lib_malloc_pages(substream,
1051                                             params_buffer_bytes(hw_params))) < 0)
1052                 return err;
1053         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1054                                          params_channels(hw_params)) |
1055                 snd_cs4231_get_rate(params_rate(hw_params));
1056         snd_cs4231_playback_format(chip, hw_params, new_pdfr);
1057
1058         return 0;
1059 }
1060
1061 static int snd_cs4231_playback_hw_free(struct snd_pcm_substream *substream)
1062 {
1063         return snd_pcm_lib_free_pages(substream);
1064 }
1065
1066 static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
1067 {
1068         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1069         struct snd_pcm_runtime *runtime = substream->runtime;
1070         unsigned long flags;
1071
1072         spin_lock_irqsave(&chip->lock, flags);
1073
1074         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
1075                                             CS4231_PLAYBACK_PIO);
1076
1077         BUG_ON(runtime->period_size > 0xffff + 1);
1078
1079         chip->p_periods_sent = 0;
1080         spin_unlock_irqrestore(&chip->lock, flags);
1081
1082         return 0;
1083 }
1084
1085 static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
1086                                         struct snd_pcm_hw_params *hw_params)
1087 {
1088         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1089         unsigned char new_cdfr;
1090         int err;
1091
1092         if ((err = snd_pcm_lib_malloc_pages(substream,
1093                                             params_buffer_bytes(hw_params))) < 0)
1094                 return err;
1095         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
1096                                          params_channels(hw_params)) |
1097                 snd_cs4231_get_rate(params_rate(hw_params));
1098         snd_cs4231_capture_format(chip, hw_params, new_cdfr);
1099
1100         return 0;
1101 }
1102
1103 static int snd_cs4231_capture_hw_free(struct snd_pcm_substream *substream)
1104 {
1105         return snd_pcm_lib_free_pages(substream);
1106 }
1107
1108 static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
1109 {
1110         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1111         unsigned long flags;
1112
1113         spin_lock_irqsave(&chip->lock, flags);
1114         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
1115                                             CS4231_RECORD_PIO);
1116
1117
1118         chip->c_periods_sent = 0;
1119         spin_unlock_irqrestore(&chip->lock, flags);
1120
1121         return 0;
1122 }
1123
1124 static void snd_cs4231_overrange(struct snd_cs4231 *chip)
1125 {
1126         unsigned long flags;
1127         unsigned char res;
1128
1129         spin_lock_irqsave(&chip->lock, flags);
1130         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
1131         spin_unlock_irqrestore(&chip->lock, flags);
1132
1133         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
1134                 chip->capture_substream->runtime->overrange++;
1135 }
1136
1137 static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
1138 {
1139         if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
1140                 snd_pcm_period_elapsed(chip->playback_substream);
1141                 snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
1142                                             &chip->p_periods_sent);
1143         }
1144 }
1145
1146 static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
1147 {
1148         if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
1149                 snd_pcm_period_elapsed(chip->capture_substream);
1150                 snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
1151                                             &chip->c_periods_sent);
1152         }
1153 }
1154
1155 static snd_pcm_uframes_t snd_cs4231_playback_pointer(struct snd_pcm_substream *substream)
1156 {
1157         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1158         struct cs4231_dma_control *dma_cont = &chip->p_dma;
1159         size_t ptr;
1160
1161         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1162                 return 0;
1163         ptr = dma_cont->address(dma_cont);
1164         if (ptr != 0)
1165                 ptr -= substream->runtime->dma_addr;
1166
1167         return bytes_to_frames(substream->runtime, ptr);
1168 }
1169
1170 static snd_pcm_uframes_t snd_cs4231_capture_pointer(struct snd_pcm_substream *substream)
1171 {
1172         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1173         struct cs4231_dma_control *dma_cont = &chip->c_dma;
1174         size_t ptr;
1175
1176         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1177                 return 0;
1178         ptr = dma_cont->address(dma_cont);
1179         if (ptr != 0)
1180                 ptr -= substream->runtime->dma_addr;
1181
1182         return bytes_to_frames(substream->runtime, ptr);
1183 }
1184
1185 /*
1186
1187  */
1188
1189 static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
1190 {
1191         unsigned long flags;
1192         int i, id, vers;
1193         unsigned char *ptr;
1194
1195         id = vers = 0;
1196         for (i = 0; i < 50; i++) {
1197                 mb();
1198                 if (__cs4231_readb(chip, CS4231P(chip, REGSEL)) & CS4231_INIT)
1199                         udelay(2000);
1200                 else {
1201                         spin_lock_irqsave(&chip->lock, flags);
1202                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1203                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1204                         vers = snd_cs4231_in(chip, CS4231_VERSION);
1205                         spin_unlock_irqrestore(&chip->lock, flags);
1206                         if (id == 0x0a)
1207                                 break;  /* this is valid value */
1208                 }
1209         }
1210         snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1211         if (id != 0x0a)
1212                 return -ENODEV; /* no valid device found */
1213
1214         spin_lock_irqsave(&chip->lock, flags);
1215
1216         __cs4231_readb(chip, CS4231P(chip, STATUS));    /* clear any pendings IRQ */
1217         __cs4231_writeb(chip, 0, CS4231P(chip, STATUS));
1218         mb();
1219
1220         spin_unlock_irqrestore(&chip->lock, flags);
1221
1222         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1223         chip->image[CS4231_IFACE_CTRL] =
1224                 chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1225         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1226         chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1227         if (vers & 0x20)
1228                 chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1229
1230         ptr = (unsigned char *) &chip->image;
1231
1232         snd_cs4231_mce_down(chip);
1233
1234         spin_lock_irqsave(&chip->lock, flags);
1235
1236         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1237                 snd_cs4231_out(chip, i, *ptr++);
1238
1239         spin_unlock_irqrestore(&chip->lock, flags);
1240
1241         snd_cs4231_mce_up(chip);
1242
1243         snd_cs4231_mce_down(chip);
1244
1245         mdelay(2);
1246
1247         return 0;               /* all things are ok.. */
1248 }
1249
1250 static struct snd_pcm_hardware snd_cs4231_playback =
1251 {
1252         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1253                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1254         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1255                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1256                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1257                                  SNDRV_PCM_FMTBIT_S16_BE),
1258         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1259         .rate_min               = 5510,
1260         .rate_max               = 48000,
1261         .channels_min           = 1,
1262         .channels_max           = 2,
1263         .buffer_bytes_max       = (32*1024),
1264         .period_bytes_min       = 64,
1265         .period_bytes_max       = (32*1024),
1266         .periods_min            = 1,
1267         .periods_max            = 1024,
1268 };
1269
1270 static struct snd_pcm_hardware snd_cs4231_capture =
1271 {
1272         .info                   = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1273                                  SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START),
1274         .formats                = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
1275                                  SNDRV_PCM_FMTBIT_IMA_ADPCM |
1276                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
1277                                  SNDRV_PCM_FMTBIT_S16_BE),
1278         .rates                  = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1279         .rate_min               = 5510,
1280         .rate_max               = 48000,
1281         .channels_min           = 1,
1282         .channels_max           = 2,
1283         .buffer_bytes_max       = (32*1024),
1284         .period_bytes_min       = 64,
1285         .period_bytes_max       = (32*1024),
1286         .periods_min            = 1,
1287         .periods_max            = 1024,
1288 };
1289
1290 static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1291 {
1292         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1293         struct snd_pcm_runtime *runtime = substream->runtime;
1294         int err;
1295
1296         runtime->hw = snd_cs4231_playback;
1297
1298         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1299                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1300                 return err;
1301         }
1302         chip->playback_substream = substream;
1303         chip->p_periods_sent = 0;
1304         snd_pcm_set_sync(substream);
1305         snd_cs4231_xrate(runtime);
1306
1307         return 0;
1308 }
1309
1310 static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1311 {
1312         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1313         struct snd_pcm_runtime *runtime = substream->runtime;
1314         int err;
1315
1316         runtime->hw = snd_cs4231_capture;
1317
1318         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1319                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1320                 return err;
1321         }
1322         chip->capture_substream = substream;
1323         chip->c_periods_sent = 0;
1324         snd_pcm_set_sync(substream);
1325         snd_cs4231_xrate(runtime);
1326
1327         return 0;
1328 }
1329
1330 static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1331 {
1332         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1333
1334         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1335         chip->playback_substream = NULL;
1336
1337         return 0;
1338 }
1339
1340 static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1341 {
1342         struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1343
1344         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1345         chip->capture_substream = NULL;
1346
1347         return 0;
1348 }
1349
1350 /* XXX We can do some power-management, in particular on EBUS using
1351  * XXX the audio AUXIO register...
1352  */
1353
1354 static struct snd_pcm_ops snd_cs4231_playback_ops = {
1355         .open           =       snd_cs4231_playback_open,
1356         .close          =       snd_cs4231_playback_close,
1357         .ioctl          =       snd_pcm_lib_ioctl,
1358         .hw_params      =       snd_cs4231_playback_hw_params,
1359         .hw_free        =       snd_cs4231_playback_hw_free,
1360         .prepare        =       snd_cs4231_playback_prepare,
1361         .trigger        =       snd_cs4231_trigger,
1362         .pointer        =       snd_cs4231_playback_pointer,
1363 };
1364
1365 static struct snd_pcm_ops snd_cs4231_capture_ops = {
1366         .open           =       snd_cs4231_capture_open,
1367         .close          =       snd_cs4231_capture_close,
1368         .ioctl          =       snd_pcm_lib_ioctl,
1369         .hw_params      =       snd_cs4231_capture_hw_params,
1370         .hw_free        =       snd_cs4231_capture_hw_free,
1371         .prepare        =       snd_cs4231_capture_prepare,
1372         .trigger        =       snd_cs4231_trigger,
1373         .pointer        =       snd_cs4231_capture_pointer,
1374 };
1375
1376 static int __init snd_cs4231_pcm(struct snd_cs4231 *chip)
1377 {
1378         struct snd_pcm *pcm;
1379         int err;
1380
1381         if ((err = snd_pcm_new(chip->card, "CS4231", 0, 1, 1, &pcm)) < 0)
1382                 return err;
1383
1384         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1385         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1386
1387         /* global setup */
1388         pcm->private_data = chip;
1389         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1390         strcpy(pcm->name, "CS4231");
1391
1392         chip->p_dma.preallocate(chip, pcm);
1393
1394         chip->pcm = pcm;
1395
1396         return 0;
1397 }
1398
1399 static int __init snd_cs4231_timer(struct snd_cs4231 *chip)
1400 {
1401         struct snd_timer *timer;
1402         struct snd_timer_id tid;
1403         int err;
1404
1405         /* Timer initialization */
1406         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1407         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1408         tid.card = chip->card->number;
1409         tid.device = 0;
1410         tid.subdevice = 0;
1411         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1412                 return err;
1413         strcpy(timer->name, "CS4231");
1414         timer->private_data = chip;
1415         timer->hw = snd_cs4231_timer_table;
1416         chip->timer = timer;
1417
1418         return 0;
1419 }
1420
1421 /*
1422  *  MIXER part
1423  */
1424
1425 static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1426                                struct snd_ctl_elem_info *uinfo)
1427 {
1428         static char *texts[4] = {
1429                 "Line", "CD", "Mic", "Mix"
1430         };
1431         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1432
1433         snd_assert(chip->card != NULL, return -EINVAL);
1434         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1435         uinfo->count = 2;
1436         uinfo->value.enumerated.items = 4;
1437         if (uinfo->value.enumerated.item > 3)
1438                 uinfo->value.enumerated.item = 3;
1439         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1440
1441         return 0;
1442 }
1443
1444 static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1445                               struct snd_ctl_elem_value *ucontrol)
1446 {
1447         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1448         unsigned long flags;
1449
1450         spin_lock_irqsave(&chip->lock, flags);
1451         ucontrol->value.enumerated.item[0] =
1452                 (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1453         ucontrol->value.enumerated.item[1] =
1454                 (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1455         spin_unlock_irqrestore(&chip->lock, flags);
1456
1457         return 0;
1458 }
1459
1460 static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1461                               struct snd_ctl_elem_value *ucontrol)
1462 {
1463         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1464         unsigned long flags;
1465         unsigned short left, right;
1466         int change;
1467
1468         if (ucontrol->value.enumerated.item[0] > 3 ||
1469             ucontrol->value.enumerated.item[1] > 3)
1470                 return -EINVAL;
1471         left = ucontrol->value.enumerated.item[0] << 6;
1472         right = ucontrol->value.enumerated.item[1] << 6;
1473
1474         spin_lock_irqsave(&chip->lock, flags);
1475
1476         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1477         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1478         change = left != chip->image[CS4231_LEFT_INPUT] ||
1479                  right != chip->image[CS4231_RIGHT_INPUT];
1480         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1481         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1482
1483         spin_unlock_irqrestore(&chip->lock, flags);
1484
1485         return change;
1486 }
1487
1488 static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1489                                   struct snd_ctl_elem_info *uinfo)
1490 {
1491         int mask = (kcontrol->private_value >> 16) & 0xff;
1492
1493         uinfo->type = (mask == 1) ?
1494                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1495         uinfo->count = 1;
1496         uinfo->value.integer.min = 0;
1497         uinfo->value.integer.max = mask;
1498
1499         return 0;
1500 }
1501
1502 static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1503                                  struct snd_ctl_elem_value *ucontrol)
1504 {
1505         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1506         unsigned long flags;
1507         int reg = kcontrol->private_value & 0xff;
1508         int shift = (kcontrol->private_value >> 8) & 0xff;
1509         int mask = (kcontrol->private_value >> 16) & 0xff;
1510         int invert = (kcontrol->private_value >> 24) & 0xff;
1511
1512         spin_lock_irqsave(&chip->lock, flags);
1513
1514         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1515
1516         spin_unlock_irqrestore(&chip->lock, flags);
1517
1518         if (invert)
1519                 ucontrol->value.integer.value[0] =
1520                         (mask - ucontrol->value.integer.value[0]);
1521
1522         return 0;
1523 }
1524
1525 static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1526                                  struct snd_ctl_elem_value *ucontrol)
1527 {
1528         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1529         unsigned long flags;
1530         int reg = kcontrol->private_value & 0xff;
1531         int shift = (kcontrol->private_value >> 8) & 0xff;
1532         int mask = (kcontrol->private_value >> 16) & 0xff;
1533         int invert = (kcontrol->private_value >> 24) & 0xff;
1534         int change;
1535         unsigned short val;
1536
1537         val = (ucontrol->value.integer.value[0] & mask);
1538         if (invert)
1539                 val = mask - val;
1540         val <<= shift;
1541
1542         spin_lock_irqsave(&chip->lock, flags);
1543
1544         val = (chip->image[reg] & ~(mask << shift)) | val;
1545         change = val != chip->image[reg];
1546         snd_cs4231_out(chip, reg, val);
1547
1548         spin_unlock_irqrestore(&chip->lock, flags);
1549
1550         return change;
1551 }
1552
1553 static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1554                                   struct snd_ctl_elem_info *uinfo)
1555 {
1556         int mask = (kcontrol->private_value >> 24) & 0xff;
1557
1558         uinfo->type = mask == 1 ?
1559                 SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1560         uinfo->count = 2;
1561         uinfo->value.integer.min = 0;
1562         uinfo->value.integer.max = mask;
1563
1564         return 0;
1565 }
1566
1567 static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1568                                  struct snd_ctl_elem_value *ucontrol)
1569 {
1570         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1571         unsigned long flags;
1572         int left_reg = kcontrol->private_value & 0xff;
1573         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1574         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1575         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1576         int mask = (kcontrol->private_value >> 24) & 0xff;
1577         int invert = (kcontrol->private_value >> 22) & 1;
1578
1579         spin_lock_irqsave(&chip->lock, flags);
1580
1581         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1582         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1583
1584         spin_unlock_irqrestore(&chip->lock, flags);
1585
1586         if (invert) {
1587                 ucontrol->value.integer.value[0] =
1588                         (mask - ucontrol->value.integer.value[0]);
1589                 ucontrol->value.integer.value[1] =
1590                         (mask - ucontrol->value.integer.value[1]);
1591         }
1592
1593         return 0;
1594 }
1595
1596 static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1597                                  struct snd_ctl_elem_value *ucontrol)
1598 {
1599         struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1600         unsigned long flags;
1601         int left_reg = kcontrol->private_value & 0xff;
1602         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1603         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1604         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1605         int mask = (kcontrol->private_value >> 24) & 0xff;
1606         int invert = (kcontrol->private_value >> 22) & 1;
1607         int change;
1608         unsigned short val1, val2;
1609
1610         val1 = ucontrol->value.integer.value[0] & mask;
1611         val2 = ucontrol->value.integer.value[1] & mask;
1612         if (invert) {
1613                 val1 = mask - val1;
1614                 val2 = mask - val2;
1615         }
1616         val1 <<= shift_left;
1617         val2 <<= shift_right;
1618
1619         spin_lock_irqsave(&chip->lock, flags);
1620
1621         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1622         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1623         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1624         snd_cs4231_out(chip, left_reg, val1);
1625         snd_cs4231_out(chip, right_reg, val2);
1626
1627         spin_unlock_irqrestore(&chip->lock, flags);
1628
1629         return change;
1630 }
1631
1632 #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1633 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1634   .info = snd_cs4231_info_single, \
1635   .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1636   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1637
1638 #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1639 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1640   .info = snd_cs4231_info_double, \
1641   .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1642   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1643
1644 static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
1645 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1646 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1647 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1648 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1649 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1650 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1651 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1652 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1653 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1654 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1655 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1656 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1657 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1658 {
1659         .iface  = SNDRV_CTL_ELEM_IFACE_MIXER,
1660         .name   = "Capture Source",
1661         .info   = snd_cs4231_info_mux,
1662         .get    = snd_cs4231_get_mux,
1663         .put    = snd_cs4231_put_mux,
1664 },
1665 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1666 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1667 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1668 /* SPARC specific uses of XCTL{0,1} general purpose outputs.  */
1669 CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1670 CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1671 };
1672
1673 static int __init snd_cs4231_mixer(struct snd_cs4231 *chip)
1674 {
1675         struct snd_card *card;
1676         int err, idx;
1677
1678         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1679
1680         card = chip->card;
1681
1682         strcpy(card->mixername, chip->pcm->name);
1683
1684         for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1685                 if ((err = snd_ctl_add(card,
1686                                        snd_ctl_new1(&snd_cs4231_controls[idx],
1687                                                     chip))) < 0)
1688                         return err;
1689         }
1690         return 0;
1691 }
1692
1693 static int dev;
1694
1695 static int __init cs4231_attach_begin(struct snd_card **rcard)
1696 {
1697         struct snd_card *card;
1698
1699         *rcard = NULL;
1700
1701         if (dev >= SNDRV_CARDS)
1702                 return -ENODEV;
1703
1704         if (!enable[dev]) {
1705                 dev++;
1706                 return -ENOENT;
1707         }
1708
1709         card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1710         if (card == NULL)
1711                 return -ENOMEM;
1712
1713         strcpy(card->driver, "CS4231");
1714         strcpy(card->shortname, "Sun CS4231");
1715
1716         *rcard = card;
1717         return 0;
1718 }
1719
1720 static int __init cs4231_attach_finish(struct snd_card *card, struct snd_cs4231 *chip)
1721 {
1722         int err;
1723
1724         if ((err = snd_cs4231_pcm(chip)) < 0)
1725                 goto out_err;
1726
1727         if ((err = snd_cs4231_mixer(chip)) < 0)
1728                 goto out_err;
1729
1730         if ((err = snd_cs4231_timer(chip)) < 0)
1731                 goto out_err;
1732
1733         if ((err = snd_card_register(card)) < 0)
1734                 goto out_err;
1735
1736         chip->next = cs4231_list;
1737         cs4231_list = chip;
1738
1739         dev++;
1740         return 0;
1741
1742 out_err:
1743         snd_card_free(card);
1744         return err;
1745 }
1746
1747 #ifdef SBUS_SUPPORT
1748
1749 static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1750 {
1751         unsigned long flags;
1752         unsigned char status;
1753         u32 csr;
1754         struct snd_cs4231 *chip = dev_id;
1755
1756         /*This is IRQ is not raised by the cs4231*/
1757         if (!(__cs4231_readb(chip, CS4231P(chip, STATUS)) & CS4231_GLOBALIRQ))
1758                 return IRQ_NONE;
1759
1760         /* ACK the APC interrupt. */
1761         csr = sbus_readl(chip->port + APCCSR);
1762
1763         sbus_writel(csr, chip->port + APCCSR);
1764
1765         if ((csr & APC_PDMA_READY) &&
1766             (csr & APC_PLAY_INT) &&
1767             (csr & APC_XINT_PNVA) &&
1768             !(csr & APC_XINT_EMPT))
1769                         snd_cs4231_play_callback(chip);
1770
1771         if ((csr & APC_CDMA_READY) &&
1772             (csr & APC_CAPT_INT) &&
1773             (csr & APC_XINT_CNVA) &&
1774             !(csr & APC_XINT_EMPT))
1775                         snd_cs4231_capture_callback(chip);
1776
1777         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1778
1779         if (status & CS4231_TIMER_IRQ) {
1780                 if (chip->timer)
1781                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
1782         }
1783
1784         if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1785                 snd_cs4231_overrange(chip);
1786
1787         /* ACK the CS4231 interrupt. */
1788         spin_lock_irqsave(&chip->lock, flags);
1789         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1790         spin_unlock_irqrestore(&chip->lock, flags);
1791
1792         return IRQ_HANDLED;
1793 }
1794
1795 /*
1796  * SBUS DMA routines
1797  */
1798
1799 static int sbus_dma_request(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len)
1800 {
1801         unsigned long flags;
1802         u32 test, csr;
1803         int err;
1804         struct sbus_dma_info *base = &dma_cont->sbus_info;
1805
1806         if (len >= (1 << 24))
1807                 return -EINVAL;
1808         spin_lock_irqsave(&base->lock, flags);
1809         csr = sbus_readl(base->regs + APCCSR);
1810         err = -EINVAL;
1811         test = APC_CDMA_READY;
1812         if ( base->dir == APC_PLAY )
1813                 test = APC_PDMA_READY;
1814         if (!(csr & test))
1815                 goto out;
1816         err = -EBUSY;
1817         test = APC_XINT_CNVA;
1818         if ( base->dir == APC_PLAY )
1819                 test = APC_XINT_PNVA;
1820         if (!(csr & test))
1821                 goto out;
1822         err = 0;
1823         sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1824         sbus_writel(len, base->regs + base->dir + APCNC);
1825 out:
1826         spin_unlock_irqrestore(&base->lock, flags);
1827         return err;
1828 }
1829
1830 static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1831 {
1832         unsigned long flags;
1833         u32 csr, test;
1834         struct sbus_dma_info *base = &dma_cont->sbus_info;
1835
1836         spin_lock_irqsave(&base->lock, flags);
1837         csr = sbus_readl(base->regs + APCCSR);
1838         test =  APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1839                 APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1840                  APC_XINT_PENA;
1841         if ( base->dir == APC_RECORD )
1842                 test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1843                         APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1844         csr |= test;
1845         sbus_writel(csr, base->regs + APCCSR);
1846         spin_unlock_irqrestore(&base->lock, flags);
1847 }
1848
1849 static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1850 {
1851         unsigned long flags;
1852         u32 csr, shift;
1853         struct sbus_dma_info *base = &dma_cont->sbus_info;
1854
1855         spin_lock_irqsave(&base->lock, flags);
1856         if (!on) {
1857                 sbus_writel(0, base->regs + base->dir + APCNC);
1858                 sbus_writel(0, base->regs + base->dir + APCNVA);
1859                 if ( base->dir == APC_PLAY ) {
1860                         sbus_writel(0, base->regs + base->dir + APCC);
1861                         sbus_writel(0, base->regs + base->dir + APCVA);
1862                 }
1863
1864                 udelay(1200);
1865         }
1866         csr = sbus_readl(base->regs + APCCSR);
1867         shift = 0;
1868         if ( base->dir == APC_PLAY )
1869                 shift = 1;
1870         if (on)
1871                 csr &= ~(APC_CPAUSE << shift);
1872         else
1873                 csr |= (APC_CPAUSE << shift);
1874         sbus_writel(csr, base->regs + APCCSR);
1875         if (on)
1876                 csr |= (APC_CDMA_READY << shift);
1877         else
1878                 csr &= ~(APC_CDMA_READY << shift);
1879         sbus_writel(csr, base->regs + APCCSR);
1880
1881         spin_unlock_irqrestore(&base->lock, flags);
1882 }
1883
1884 static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1885 {
1886         struct sbus_dma_info *base = &dma_cont->sbus_info;
1887
1888         return sbus_readl(base->regs + base->dir + APCVA);
1889 }
1890
1891 static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
1892 {
1893         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_SBUS,
1894                                               snd_dma_sbus_data(chip->dev_u.sdev),
1895                                               64*1024, 128*1024);
1896 }
1897
1898 /*
1899  * Init and exit routines
1900  */
1901
1902 static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1903 {
1904         if (chip->irq[0])
1905                 free_irq(chip->irq[0], chip);
1906
1907         if (chip->port)
1908                 sbus_iounmap(chip->port, chip->regs_size);
1909
1910         kfree(chip);
1911
1912         return 0;
1913 }
1914
1915 static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1916 {
1917         struct snd_cs4231 *cp = device->device_data;
1918
1919         return snd_cs4231_sbus_free(cp);
1920 }
1921
1922 static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1923         .dev_free       =       snd_cs4231_sbus_dev_free,
1924 };
1925
1926 static int __init snd_cs4231_sbus_create(struct snd_card *card,
1927                                          struct sbus_dev *sdev,
1928                                          int dev,
1929                                          struct snd_cs4231 **rchip)
1930 {
1931         struct snd_cs4231 *chip;
1932         int err;
1933
1934         *rchip = NULL;
1935         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1936         if (chip == NULL)
1937                 return -ENOMEM;
1938
1939         spin_lock_init(&chip->lock);
1940         spin_lock_init(&chip->c_dma.sbus_info.lock);
1941         spin_lock_init(&chip->p_dma.sbus_info.lock);
1942         mutex_init(&chip->mce_mutex);
1943         mutex_init(&chip->open_mutex);
1944         chip->card = card;
1945         chip->dev_u.sdev = sdev;
1946         chip->regs_size = sdev->reg_addrs[0].reg_size;
1947         memcpy(&chip->image, &snd_cs4231_original_image,
1948                sizeof(snd_cs4231_original_image));
1949
1950         chip->port = sbus_ioremap(&sdev->resource[0], 0,
1951                                   chip->regs_size, "cs4231");
1952         if (!chip->port) {
1953                 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1954                 return -EIO;
1955         }
1956
1957         chip->c_dma.sbus_info.regs = chip->port;
1958         chip->p_dma.sbus_info.regs = chip->port;
1959         chip->c_dma.sbus_info.dir = APC_RECORD;
1960         chip->p_dma.sbus_info.dir = APC_PLAY;
1961
1962         chip->p_dma.prepare = sbus_dma_prepare;
1963         chip->p_dma.enable = sbus_dma_enable;
1964         chip->p_dma.request = sbus_dma_request;
1965         chip->p_dma.address = sbus_dma_addr;
1966         chip->p_dma.preallocate = sbus_dma_preallocate;
1967
1968         chip->c_dma.prepare = sbus_dma_prepare;
1969         chip->c_dma.enable = sbus_dma_enable;
1970         chip->c_dma.request = sbus_dma_request;
1971         chip->c_dma.address = sbus_dma_addr;
1972         chip->c_dma.preallocate = sbus_dma_preallocate;
1973
1974         if (request_irq(sdev->irqs[0], snd_cs4231_sbus_interrupt,
1975                         IRQF_SHARED, "cs4231", chip)) {
1976                 snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1977                             dev, sdev->irqs[0]);
1978                 snd_cs4231_sbus_free(chip);
1979                 return -EBUSY;
1980         }
1981         chip->irq[0] = sdev->irqs[0];
1982
1983         if (snd_cs4231_probe(chip) < 0) {
1984                 snd_cs4231_sbus_free(chip);
1985                 return -ENODEV;
1986         }
1987         snd_cs4231_init(chip);
1988
1989         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1990                                   chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1991                 snd_cs4231_sbus_free(chip);
1992                 return err;
1993         }
1994
1995         *rchip = chip;
1996         return 0;
1997 }
1998
1999 static int __init cs4231_sbus_attach(struct sbus_dev *sdev)
2000 {
2001         struct resource *rp = &sdev->resource[0];
2002         struct snd_cs4231 *cp;
2003         struct snd_card *card;
2004         int err;
2005
2006         err = cs4231_attach_begin(&card);
2007         if (err)
2008                 return err;
2009
2010         sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
2011                 card->shortname,
2012                 rp->flags & 0xffL,
2013                 (unsigned long long)rp->start,
2014                 sdev->irqs[0]);
2015
2016         if ((err = snd_cs4231_sbus_create(card, sdev, dev, &cp)) < 0) {
2017                 snd_card_free(card);
2018                 return err;
2019         }
2020
2021         return cs4231_attach_finish(card, cp);
2022 }
2023 #endif
2024
2025 #ifdef EBUS_SUPPORT
2026
2027 static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event, void *cookie)
2028 {
2029         struct snd_cs4231 *chip = cookie;
2030
2031         snd_cs4231_play_callback(chip);
2032 }
2033
2034 static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p, int event, void *cookie)
2035 {
2036         struct snd_cs4231 *chip = cookie;
2037
2038         snd_cs4231_capture_callback(chip);
2039 }
2040
2041 /*
2042  * EBUS DMA wrappers
2043  */
2044
2045 static int _ebus_dma_request(struct cs4231_dma_control *dma_cont, dma_addr_t bus_addr, size_t len)
2046 {
2047         return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
2048 }
2049
2050 static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
2051 {
2052         ebus_dma_enable(&dma_cont->ebus_info, on);
2053 }
2054
2055 static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
2056 {
2057         ebus_dma_prepare(&dma_cont->ebus_info, dir);
2058 }
2059
2060 static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
2061 {
2062         return ebus_dma_addr(&dma_cont->ebus_info);
2063 }
2064
2065 static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
2066 {
2067         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
2068                                       snd_dma_pci_data(chip->dev_u.pdev),
2069                                       64*1024, 128*1024);
2070 }
2071
2072 /*
2073  * Init and exit routines
2074  */
2075
2076 static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
2077 {
2078         if (chip->c_dma.ebus_info.regs) {
2079                 ebus_dma_unregister(&chip->c_dma.ebus_info);
2080                 iounmap(chip->c_dma.ebus_info.regs);
2081         }
2082         if (chip->p_dma.ebus_info.regs) {
2083                 ebus_dma_unregister(&chip->p_dma.ebus_info);
2084                 iounmap(chip->p_dma.ebus_info.regs);
2085         }
2086
2087         if (chip->port)
2088                 iounmap(chip->port);
2089
2090         kfree(chip);
2091
2092         return 0;
2093 }
2094
2095 static int snd_cs4231_ebus_dev_free(struct snd_device *device)
2096 {
2097         struct snd_cs4231 *cp = device->device_data;
2098
2099         return snd_cs4231_ebus_free(cp);
2100 }
2101
2102 static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
2103         .dev_free       =       snd_cs4231_ebus_dev_free,
2104 };
2105
2106 static int __init snd_cs4231_ebus_create(struct snd_card *card,
2107                                          struct linux_ebus_device *edev,
2108                                          int dev,
2109                                          struct snd_cs4231 **rchip)
2110 {
2111         struct snd_cs4231 *chip;
2112         int err;
2113
2114         *rchip = NULL;
2115         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2116         if (chip == NULL)
2117                 return -ENOMEM;
2118
2119         spin_lock_init(&chip->lock);
2120         spin_lock_init(&chip->c_dma.ebus_info.lock);
2121         spin_lock_init(&chip->p_dma.ebus_info.lock);
2122         mutex_init(&chip->mce_mutex);
2123         mutex_init(&chip->open_mutex);
2124         chip->flags |= CS4231_FLAG_EBUS;
2125         chip->card = card;
2126         chip->dev_u.pdev = edev->bus->self;
2127         memcpy(&chip->image, &snd_cs4231_original_image,
2128                sizeof(snd_cs4231_original_image));
2129         strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
2130         chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2131         chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
2132         chip->c_dma.ebus_info.client_cookie = chip;
2133         chip->c_dma.ebus_info.irq = edev->irqs[0];
2134         strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
2135         chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
2136         chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
2137         chip->p_dma.ebus_info.client_cookie = chip;
2138         chip->p_dma.ebus_info.irq = edev->irqs[1];
2139
2140         chip->p_dma.prepare = _ebus_dma_prepare;
2141         chip->p_dma.enable = _ebus_dma_enable;
2142         chip->p_dma.request = _ebus_dma_request;
2143         chip->p_dma.address = _ebus_dma_addr;
2144         chip->p_dma.preallocate = _ebus_dma_preallocate;
2145
2146         chip->c_dma.prepare = _ebus_dma_prepare;
2147         chip->c_dma.enable = _ebus_dma_enable;
2148         chip->c_dma.request = _ebus_dma_request;
2149         chip->c_dma.address = _ebus_dma_addr;
2150         chip->c_dma.preallocate = _ebus_dma_preallocate;
2151
2152         chip->port = ioremap(edev->resource[0].start, 0x10);
2153         chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
2154         chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
2155         if (!chip->port || !chip->p_dma.ebus_info.regs || !chip->c_dma.ebus_info.regs) {
2156                 snd_cs4231_ebus_free(chip);
2157                 snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
2158                 return -EIO;
2159         }
2160
2161         if (ebus_dma_register(&chip->c_dma.ebus_info)) {
2162                 snd_cs4231_ebus_free(chip);
2163                 snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n", dev);
2164                 return -EBUSY;
2165         }
2166         if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2167                 snd_cs4231_ebus_free(chip);
2168                 snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n", dev);
2169                 return -EBUSY;
2170         }
2171
2172         if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2173                 snd_cs4231_ebus_free(chip);
2174                 snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n", dev);
2175                 return -EBUSY;
2176         }
2177         if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2178                 snd_cs4231_ebus_free(chip);
2179                 snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2180                 return -EBUSY;
2181         }
2182
2183         if (snd_cs4231_probe(chip) < 0) {
2184                 snd_cs4231_ebus_free(chip);
2185                 return -ENODEV;
2186         }
2187         snd_cs4231_init(chip);
2188
2189         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2190                                   chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2191                 snd_cs4231_ebus_free(chip);
2192                 return err;
2193         }
2194
2195         *rchip = chip;
2196         return 0;
2197 }
2198
2199 static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
2200 {
2201         struct snd_card *card;
2202         struct snd_cs4231 *chip;
2203         int err;
2204
2205         err = cs4231_attach_begin(&card);
2206         if (err)
2207                 return err;
2208
2209         sprintf(card->longname, "%s at 0x%lx, irq %d",
2210                 card->shortname,
2211                 edev->resource[0].start,
2212                 edev->irqs[0]);
2213
2214         if ((err = snd_cs4231_ebus_create(card, edev, dev, &chip)) < 0) {
2215                 snd_card_free(card);
2216                 return err;
2217         }
2218
2219         return cs4231_attach_finish(card, chip);
2220 }
2221 #endif
2222
2223 static int __init cs4231_init(void)
2224 {
2225 #ifdef SBUS_SUPPORT
2226         struct sbus_bus *sbus;
2227         struct sbus_dev *sdev;
2228 #endif
2229 #ifdef EBUS_SUPPORT
2230         struct linux_ebus *ebus;
2231         struct linux_ebus_device *edev;
2232 #endif
2233         int found;
2234
2235         found = 0;
2236
2237 #ifdef SBUS_SUPPORT
2238         for_all_sbusdev(sdev, sbus) {
2239                 if (!strcmp(sdev->prom_name, "SUNW,CS4231")) {
2240                         if (cs4231_sbus_attach(sdev) == 0)
2241                                 found++;
2242                 }
2243         }
2244 #endif
2245 #ifdef EBUS_SUPPORT
2246         for_each_ebus(ebus) {
2247                 for_each_ebusdev(edev, ebus) {
2248                         int match = 0;
2249
2250                         if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) {
2251                                 match = 1;
2252                         } else if (!strcmp(edev->prom_node->name, "audio")) {
2253                                 const char *compat;
2254
2255                                 compat = of_get_property(edev->prom_node,
2256                                                          "compatible", NULL);
2257                                 if (compat && !strcmp(compat, "SUNW,CS4231"))
2258                                         match = 1;
2259                         }
2260
2261                         if (match &&
2262                             cs4231_ebus_attach(edev) == 0)
2263                                 found++;
2264                 }
2265         }
2266 #endif
2267
2268
2269         return (found > 0) ? 0 : -EIO;
2270 }
2271
2272 static void __exit cs4231_exit(void)
2273 {
2274         struct snd_cs4231 *p = cs4231_list;
2275
2276         while (p != NULL) {
2277                 struct snd_cs4231 *next = p->next;
2278
2279                 snd_card_free(p->card);
2280
2281                 p = next;
2282         }
2283
2284         cs4231_list = NULL;
2285 }
2286
2287 module_init(cs4231_init);
2288 module_exit(cs4231_exit);