git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * Magic delays and register offsets below are taken from the original
  11  * r8187 driver sources.  Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/usb.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8187.h"
  26 #include "rtl8187_rtl8225.h"
  27
  28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  31 MODULE_LICENSE("GPL");
  32
  33 static struct usb_device_id rtl8187_table[] __devinitdata = {
  34         /* Asus */
  35         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  36         /* Realtek */
  37         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  38         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  39         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  40         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  41         /* Netgear */
  42         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  43         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  44         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  45         /* HP */
  46         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  47         /* Sitecom */
  48         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  49         {}
  50 };
  51
  52 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  53
  54 static const struct ieee80211_rate rtl818x_rates[] = {
  55         { .bitrate = 10, .hw_value = 0, },
  56         { .bitrate = 20, .hw_value = 1, },
  57         { .bitrate = 55, .hw_value = 2, },
  58         { .bitrate = 110, .hw_value = 3, },
  59         { .bitrate = 60, .hw_value = 4, },
  60         { .bitrate = 90, .hw_value = 5, },
  61         { .bitrate = 120, .hw_value = 6, },
  62         { .bitrate = 180, .hw_value = 7, },
  63         { .bitrate = 240, .hw_value = 8, },
  64         { .bitrate = 360, .hw_value = 9, },
  65         { .bitrate = 480, .hw_value = 10, },
  66         { .bitrate = 540, .hw_value = 11, },
  67 };
  68
  69 static const struct ieee80211_channel rtl818x_channels[] = {
  70         { .center_freq = 2412 },
  71         { .center_freq = 2417 },
  72         { .center_freq = 2422 },
  73         { .center_freq = 2427 },
  74         { .center_freq = 2432 },
  75         { .center_freq = 2437 },
  76         { .center_freq = 2442 },
  77         { .center_freq = 2447 },
  78         { .center_freq = 2452 },
  79         { .center_freq = 2457 },
  80         { .center_freq = 2462 },
  81         { .center_freq = 2467 },
  82         { .center_freq = 2472 },
  83         { .center_freq = 2484 },
  84 };
  85
  86 static void rtl8187_iowrite_async_cb(struct urb *urb)
  87 {
  88         kfree(urb->context);
  89         usb_free_urb(urb);
  90 }
  91
  92 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  93                                   void *data, u16 len)
  94 {
  95         struct usb_ctrlrequest *dr;
  96         struct urb *urb;
  97         struct rtl8187_async_write_data {
  98                 u8 data[4];
  99                 struct usb_ctrlrequest dr;
 100         } *buf;
 101         int rc;
 102
 103         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 104         if (!buf)
 105                 return;
 106
 107         urb = usb_alloc_urb(0, GFP_ATOMIC);
 108         if (!urb) {
 109                 kfree(buf);
 110                 return;
 111         }
 112
 113         dr = &buf->dr;
 114
 115         dr->bRequestType = RTL8187_REQT_WRITE;
 116         dr->bRequest = RTL8187_REQ_SET_REG;
 117         dr->wValue = addr;
 118         dr->wIndex = 0;
 119         dr->wLength = cpu_to_le16(len);
 120
 121         memcpy(buf, data, len);
 122
 123         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 124                              (unsigned char *)dr, buf, len,
 125                              rtl8187_iowrite_async_cb, buf);
 126         rc = usb_submit_urb(urb, GFP_ATOMIC);
 127         if (rc < 0) {
 128                 kfree(buf);
 129                 usb_free_urb(urb);
 130         }
 131 }
 132
 133 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 134                                            __le32 *addr, u32 val)
 135 {
 136         __le32 buf = cpu_to_le32(val);
 137
 138         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 139                               &buf, sizeof(buf));
 140 }
 141
 142 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 143 {
 144         struct rtl8187_priv *priv = dev->priv;
 145
 146         data <<= 8;
 147         data |= addr | 0x80;
 148
 149         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 150         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 151         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 152         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 153
 154         msleep(1);
 155 }
 156
 157 static void rtl8187_tx_cb(struct urb *urb)
 158 {
 159         struct sk_buff *skb = (struct sk_buff *)urb->context;
 160         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 161         struct ieee80211_hw *hw = info->driver_data[0];
 162         struct rtl8187_priv *priv = hw->priv;
 163
 164         usb_free_urb(info->driver_data[1]);
 165         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 166                                           sizeof(struct rtl8187_tx_hdr));
 167         memset(&info->status, 0, sizeof(info->status));
 168         info->flags |= IEEE80211_TX_STAT_ACK;
 169         ieee80211_tx_status_irqsafe(hw, skb);
 170 }
 171
 172 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 173 {
 174         struct rtl8187_priv *priv = dev->priv;
 175         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 176         struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 177         unsigned int ep;
 178         void *buf;
 179         struct urb *urb;
 180         __le16 rts_dur = 0;
 181         u32 flags;
 182         int rc;
 183
 184         urb = usb_alloc_urb(0, GFP_ATOMIC);
 185         if (!urb) {
 186                 kfree_skb(skb);
 187                 return 0;
 188         }
 189
 190         flags = skb->len;
 191         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 192
 193         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 194         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 195                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 196         if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
 197                 flags |= RTL818X_TX_DESC_FLAG_RTS;
 198                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 199                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 200                                                  skb->len, info);
 201         } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
 202                 flags |= RTL818X_TX_DESC_FLAG_CTS;
 203                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 204         }
 205
 206         if (!priv->is_rtl8187b) {
 207                 struct rtl8187_tx_hdr *hdr =
 208                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 209                 hdr->flags = cpu_to_le32(flags);
 210                 hdr->len = 0;
 211                 hdr->rts_duration = rts_dur;
 212                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
 213                 buf = hdr;
 214
 215                 ep = 2;
 216         } else {
 217                 /* fc needs to be calculated before skb_push() */
 218                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 219                 struct ieee80211_hdr *tx_hdr =
 220                         (struct ieee80211_hdr *)(skb->data);
 221                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 222
 223                 struct rtl8187b_tx_hdr *hdr =
 224                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 225                 struct ieee80211_rate *txrate =
 226                         ieee80211_get_tx_rate(dev, info);
 227                 memset(hdr, 0, sizeof(*hdr));
 228                 hdr->flags = cpu_to_le32(flags);
 229                 hdr->rts_duration = rts_dur;
 230                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
 231                 hdr->tx_duration =
 232                         ieee80211_generic_frame_duration(dev, priv->vif,
 233                                                          skb->len, txrate);
 234                 buf = hdr;
 235
 236                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 237                         ep = 12;
 238                 else
 239                         ep = epmap[skb_get_queue_mapping(skb)];
 240         }
 241
 242         /* FIXME: The sequence that follows is needed for this driver to
 243          * work with mac80211 since "mac80211: fix TX sequence numbers".
 244          * As with the temporary code in rt2x00, changes will be needed
 245          * to get proper sequence numbers on beacons. In addition, this
 246          * patch places the sequence number in the hardware state, which
 247          * limits us to a single virtual state.
 248          */
 249         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 250                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 251                         priv->seqno += 0x10;
 252                 ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 253                 ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
 254         }
 255
 256         info->driver_data[0] = dev;
 257         info->driver_data[1] = urb;
 258
 259         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 260                           buf, skb->len, rtl8187_tx_cb, skb);
 261         rc = usb_submit_urb(urb, GFP_ATOMIC);
 262         if (rc < 0) {
 263                 usb_free_urb(urb);
 264                 kfree_skb(skb);
 265         }
 266
 267         return 0;
 268 }
 269
 270 static void rtl8187_rx_cb(struct urb *urb)
 271 {
 272         struct sk_buff *skb = (struct sk_buff *)urb->context;
 273         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 274         struct ieee80211_hw *dev = info->dev;
 275         struct rtl8187_priv *priv = dev->priv;
 276         struct ieee80211_rx_status rx_status = { 0 };
 277         int rate, signal;
 278         u32 flags;
 279         u32 quality;
 280
 281         spin_lock(&priv->rx_queue.lock);
 282         if (skb->next)
 283                 __skb_unlink(skb, &priv->rx_queue);
 284         else {
 285                 spin_unlock(&priv->rx_queue.lock);
 286                 return;
 287         }
 288         spin_unlock(&priv->rx_queue.lock);
 289
 290         if (unlikely(urb->status)) {
 291                 usb_free_urb(urb);
 292                 dev_kfree_skb_irq(skb);
 293                 return;
 294         }
 295
 296         skb_put(skb, urb->actual_length);
 297         if (!priv->is_rtl8187b) {
 298                 struct rtl8187_rx_hdr *hdr =
 299                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 300                 flags = le32_to_cpu(hdr->flags);
 301                 signal = hdr->signal & 0x7f;
 302                 rx_status.antenna = (hdr->signal >> 7) & 1;
 303                 rx_status.noise = hdr->noise;
 304                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 305                 priv->quality = signal;
 306                 rx_status.qual = priv->quality;
 307                 priv->noise = hdr->noise;
 308                 rate = (flags >> 20) & 0xF;
 309                 if (rate > 3) { /* OFDM rate */
 310                         if (signal > 90)
 311                                 signal = 90;
 312                         else if (signal < 25)
 313                                 signal = 25;
 314                         signal = 90 - signal;
 315                 } else {        /* CCK rate */
 316                         if (signal > 95)
 317                                 signal = 95;
 318                         else if (signal < 30)
 319                                 signal = 30;
 320                         signal = 95 - signal;
 321                 }
 322                 rx_status.signal = signal;
 323                 priv->signal = signal;
 324         } else {
 325                 struct rtl8187b_rx_hdr *hdr =
 326                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 327                 /* The Realtek datasheet for the RTL8187B shows that the RX
 328                  * header contains the following quantities: signal quality,
 329                  * RSSI, AGC, the received power in dB, and the measured SNR.
 330                  * In testing, none of these quantities show qualitative
 331                  * agreement with AP signal strength, except for the AGC,
 332                  * which is inversely proportional to the strength of the
 333                  * signal. In the following, the quality and signal strength
 334                  * are derived from the AGC. The arbitrary scaling constants
 335                  * are chosen to make the results close to the values obtained
 336                  * for a BCM4312 using b43 as the driver. The noise is ignored
 337                  * for now.
 338                  */
 339                 flags = le32_to_cpu(hdr->flags);
 340                 quality = 170 - hdr->agc;
 341                 if (quality > 100)
 342                         quality = 100;
 343                 signal = 14 - hdr->agc / 2;
 344                 rx_status.qual = quality;
 345                 priv->quality = quality;
 346                 rx_status.signal = signal;
 347                 priv->signal = signal;
 348                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 349                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 350                 rate = (flags >> 20) & 0xF;
 351         }
 352
 353         skb_trim(skb, flags & 0x0FFF);
 354         rx_status.rate_idx = rate;
 355         rx_status.freq = dev->conf.channel->center_freq;
 356         rx_status.band = dev->conf.channel->band;
 357         rx_status.flag |= RX_FLAG_TSFT;
 358         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 359                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 360         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 361
 362         skb = dev_alloc_skb(RTL8187_MAX_RX);
 363         if (unlikely(!skb)) {
 364                 usb_free_urb(urb);
 365                 /* TODO check rx queue length and refill *somewhere* */
 366                 return;
 367         }
 368
 369         info = (struct rtl8187_rx_info *)skb->cb;
 370         info->urb = urb;
 371         info->dev = dev;
 372         urb->transfer_buffer = skb_tail_pointer(skb);
 373         urb->context = skb;
 374         skb_queue_tail(&priv->rx_queue, skb);
 375
 376         usb_submit_urb(urb, GFP_ATOMIC);
 377 }
 378
 379 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 380 {
 381         struct rtl8187_priv *priv = dev->priv;
 382         struct urb *entry;
 383         struct sk_buff *skb;
 384         struct rtl8187_rx_info *info;
 385
 386         while (skb_queue_len(&priv->rx_queue) < 8) {
 387                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 388                 if (!skb)
 389                         break;
 390                 entry = usb_alloc_urb(0, GFP_KERNEL);
 391                 if (!entry) {
 392                         kfree_skb(skb);
 393                         break;
 394                 }
 395                 usb_fill_bulk_urb(entry, priv->udev,
 396                                   usb_rcvbulkpipe(priv->udev,
 397                                   priv->is_rtl8187b ? 3 : 1),
 398                                   skb_tail_pointer(skb),
 399                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 400                 info = (struct rtl8187_rx_info *)skb->cb;
 401                 info->urb = entry;
 402                 info->dev = dev;
 403                 skb_queue_tail(&priv->rx_queue, skb);
 404                 usb_submit_urb(entry, GFP_KERNEL);
 405         }
 406
 407         return 0;
 408 }
 409
 410 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 411 {
 412         struct rtl8187_priv *priv = dev->priv;
 413         u8 reg;
 414         int i;
 415
 416         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 417         reg &= (1 << 1);
 418         reg |= RTL818X_CMD_RESET;
 419         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 420
 421         i = 10;
 422         do {
 423                 msleep(2);
 424                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 425                       RTL818X_CMD_RESET))
 426                         break;
 427         } while (--i);
 428
 429         if (!i) {
 430                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 431                 return -ETIMEDOUT;
 432         }
 433
 434         /* reload registers from eeprom */
 435         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 436
 437         i = 10;
 438         do {
 439                 msleep(4);
 440                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 441                       RTL818X_EEPROM_CMD_CONFIG))
 442                         break;
 443         } while (--i);
 444
 445         if (!i) {
 446                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
 447                        wiphy_name(dev->wiphy));
 448                 return -ETIMEDOUT;
 449         }
 450
 451         return 0;
 452 }
 453
 454 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 455 {
 456         struct rtl8187_priv *priv = dev->priv;
 457         u8 reg;
 458         int res;
 459
 460         /* reset */
 461         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 462                          RTL818X_EEPROM_CMD_CONFIG);
 463         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 464         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 465                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 466         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 467                           RTL8187_RTL8225_ANAPARAM_ON);
 468         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 469                           RTL8187_RTL8225_ANAPARAM2_ON);
 470         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 471                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 472         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 473                          RTL818X_EEPROM_CMD_NORMAL);
 474
 475         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 476
 477         msleep(200);
 478         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 479         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 480         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 481         msleep(200);
 482
 483         res = rtl8187_cmd_reset(dev);
 484         if (res)
 485                 return res;
 486
 487         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 488         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 489         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 490                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 491         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 492                           RTL8187_RTL8225_ANAPARAM_ON);
 493         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 494                           RTL8187_RTL8225_ANAPARAM2_ON);
 495         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 496                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 497         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 498
 499         /* setup card */
 500         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 501         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 502
 503         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 504         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
 505         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 506
 507         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 508
 509         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 510         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 511         reg &= 0x3F;
 512         reg |= 0x80;
 513         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 514
 515         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 516
 517         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 518         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 519         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 520
 521         // TODO: set RESP_RATE and BRSR properly
 522         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 523         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 524
 525         /* host_usb_init */
 526         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 527         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 528         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 529         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 530         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 531         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
 532         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 533         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 534         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 535         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 536         msleep(100);
 537
 538         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 539         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 540         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 541         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 542                          RTL818X_EEPROM_CMD_CONFIG);
 543         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 544         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 545                          RTL818X_EEPROM_CMD_NORMAL);
 546         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 547         msleep(100);
 548
 549         priv->rf->init(dev);
 550
 551         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 552         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 553         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 554         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 555         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 556         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 557         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 558
 559         return 0;
 560 }
 561
 562 static const u8 rtl8187b_reg_table[][3] = {
 563         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 564         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 565         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 566         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 567
 568         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 569         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 570         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 571         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 572         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 573         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 574
 575         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 576         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 577         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 578         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 579         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 580         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 581         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 582         {0x73, 0x9A, 2},
 583
 584         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 585         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 586         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 587         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 588         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
 589
 590         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
 591         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
 592 };
 593
 594 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 595 {
 596         struct rtl8187_priv *priv = dev->priv;
 597         int res, i;
 598         u8 reg;
 599
 600         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 601                          RTL818X_EEPROM_CMD_CONFIG);
 602
 603         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 604         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 605         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 606         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 607                           RTL8187B_RTL8225_ANAPARAM2_ON);
 608         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 609                           RTL8187B_RTL8225_ANAPARAM_ON);
 610         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 611                          RTL8187B_RTL8225_ANAPARAM3_ON);
 612
 613         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 614         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 615         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 616         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 617
 618         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 619         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 620         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 621
 622         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 623                          RTL818X_EEPROM_CMD_NORMAL);
 624
 625         res = rtl8187_cmd_reset(dev);
 626         if (res)
 627                 return res;
 628
 629         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 630         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 631         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 632         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 633         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 634         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 635                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 636         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 637
 638         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 639         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
 640         reg |= RTL818X_RATE_FALLBACK_ENABLE;
 641         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
 642
 643         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 644         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 645         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 646
 647         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 648                          RTL818X_EEPROM_CMD_CONFIG);
 649         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 650         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 651         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 652                          RTL818X_EEPROM_CMD_NORMAL);
 653
 654         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 655         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 656                 rtl818x_iowrite8_idx(priv,
 657                                      (u8 *)(uintptr_t)
 658                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 659                                      rtl8187b_reg_table[i][1],
 660                                      rtl8187b_reg_table[i][2]);
 661         }
 662
 663         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 664         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 665
 666         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 667         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 668         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 669
 670         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 671
 672         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 673
 674         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 675                          RTL818X_EEPROM_CMD_CONFIG);
 676         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 677         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 678         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 679         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 680                          RTL818X_EEPROM_CMD_NORMAL);
 681
 682         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 683         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 684         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 685         msleep(1100);
 686
 687         priv->rf->init(dev);
 688
 689         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 690         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 691         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 692
 693         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 694         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 695         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 696         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 697         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 698         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 699         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 700
 701         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 702         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 703         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 704         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 705         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 706         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 707         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 708         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 709         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 710         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 711         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 712         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 713         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 714
 715         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 716
 717         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 718
 719         return 0;
 720 }
 721
 722 static int rtl8187_start(struct ieee80211_hw *dev)
 723 {
 724         struct rtl8187_priv *priv = dev->priv;
 725         u32 reg;
 726         int ret;
 727
 728         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 729                                      rtl8187b_init_hw(dev);
 730         if (ret)
 731                 return ret;
 732
 733         mutex_lock(&priv->conf_mutex);
 734         if (priv->is_rtl8187b) {
 735                 reg = RTL818X_RX_CONF_MGMT |
 736                       RTL818X_RX_CONF_DATA |
 737                       RTL818X_RX_CONF_BROADCAST |
 738                       RTL818X_RX_CONF_NICMAC |
 739                       RTL818X_RX_CONF_BSSID |
 740                       (7 << 13 /* RX FIFO threshold NONE */) |
 741                       (7 << 10 /* MAX RX DMA */) |
 742                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 743                       RTL818X_RX_CONF_ONLYERLPKT |
 744                       RTL818X_RX_CONF_MULTICAST;
 745                 priv->rx_conf = reg;
 746                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 747
 748                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 749                                   RTL818X_TX_CONF_HW_SEQNUM |
 750                                   RTL818X_TX_CONF_DISREQQSIZE |
 751                                   (7 << 8  /* short retry limit */) |
 752                                   (7 << 0  /* long retry limit */) |
 753                                   (7 << 21 /* MAX TX DMA */));
 754                 rtl8187_init_urbs(dev);
 755                 mutex_unlock(&priv->conf_mutex);
 756                 return 0;
 757         }
 758
 759         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 760
 761         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 762         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 763
 764         rtl8187_init_urbs(dev);
 765
 766         reg = RTL818X_RX_CONF_ONLYERLPKT |
 767               RTL818X_RX_CONF_RX_AUTORESETPHY |
 768               RTL818X_RX_CONF_BSSID |
 769               RTL818X_RX_CONF_MGMT |
 770               RTL818X_RX_CONF_DATA |
 771               (7 << 13 /* RX FIFO threshold NONE */) |
 772               (7 << 10 /* MAX RX DMA */) |
 773               RTL818X_RX_CONF_BROADCAST |
 774               RTL818X_RX_CONF_NICMAC;
 775
 776         priv->rx_conf = reg;
 777         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 778
 779         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 780         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 781         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 782         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 783
 784         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 785         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 786         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 787         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 788         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 789
 790         reg  = RTL818X_TX_CONF_CW_MIN |
 791                (7 << 21 /* MAX TX DMA */) |
 792                RTL818X_TX_CONF_NO_ICV;
 793         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 794
 795         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 796         reg |= RTL818X_CMD_TX_ENABLE;
 797         reg |= RTL818X_CMD_RX_ENABLE;
 798         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 799         mutex_unlock(&priv->conf_mutex);
 800
 801         return 0;
 802 }
 803
 804 static void rtl8187_stop(struct ieee80211_hw *dev)
 805 {
 806         struct rtl8187_priv *priv = dev->priv;
 807         struct rtl8187_rx_info *info;
 808         struct sk_buff *skb;
 809         u32 reg;
 810
 811         mutex_lock(&priv->conf_mutex);
 812         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 813
 814         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 815         reg &= ~RTL818X_CMD_TX_ENABLE;
 816         reg &= ~RTL818X_CMD_RX_ENABLE;
 817         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 818
 819         priv->rf->stop(dev);
 820
 821         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 822         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 823         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 824         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 825
 826         while ((skb = skb_dequeue(&priv->rx_queue))) {
 827                 info = (struct rtl8187_rx_info *)skb->cb;
 828                 usb_kill_urb(info->urb);
 829                 kfree_skb(skb);
 830         }
 831         mutex_unlock(&priv->conf_mutex);
 832 }
 833
 834 static int rtl8187_add_interface(struct ieee80211_hw *dev,
 835                                  struct ieee80211_if_init_conf *conf)
 836 {
 837         struct rtl8187_priv *priv = dev->priv;
 838         int i;
 839
 840         if (priv->mode != NL80211_IFTYPE_MONITOR)
 841                 return -EOPNOTSUPP;
 842
 843         switch (conf->type) {
 844         case NL80211_IFTYPE_STATION:
 845                 priv->mode = conf->type;
 846                 break;
 847         default:
 848                 return -EOPNOTSUPP;
 849         }
 850
 851         mutex_lock(&priv->conf_mutex);
 852         priv->vif = conf->vif;
 853
 854         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 855         for (i = 0; i < ETH_ALEN; i++)
 856                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
 857                                  ((u8 *)conf->mac_addr)[i]);
 858         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 859
 860         mutex_unlock(&priv->conf_mutex);
 861         return 0;
 862 }
 863
 864 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
 865                                      struct ieee80211_if_init_conf *conf)
 866 {
 867         struct rtl8187_priv *priv = dev->priv;
 868         mutex_lock(&priv->conf_mutex);
 869         priv->mode = NL80211_IFTYPE_MONITOR;
 870         priv->vif = NULL;
 871         mutex_unlock(&priv->conf_mutex);
 872 }
 873
 874 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 875 {
 876         struct rtl8187_priv *priv = dev->priv;
 877         u32 reg;
 878
 879         mutex_lock(&priv->conf_mutex);
 880         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 881         /* Enable TX loopback on MAC level to avoid TX during channel
 882          * changes, as this has be seen to causes problems and the
 883          * card will stop work until next reset
 884          */
 885         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 886                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
 887         msleep(10);
 888         priv->rf->set_chan(dev, conf);
 889         msleep(10);
 890         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 891
 892         if (!priv->is_rtl8187b) {
 893                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
 894
 895                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
 896                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
 897                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
 898                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
 899                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
 900                 } else {
 901                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
 902                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
 903                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
 904                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
 905                 }
 906         }
 907
 908         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 909         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
 910         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 911         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
 912         mutex_unlock(&priv->conf_mutex);
 913         return 0;
 914 }
 915
 916 static int rtl8187_config_interface(struct ieee80211_hw *dev,
 917                                     struct ieee80211_vif *vif,
 918                                     struct ieee80211_if_conf *conf)
 919 {
 920         struct rtl8187_priv *priv = dev->priv;
 921         int i;
 922         u8 reg;
 923
 924         mutex_lock(&priv->conf_mutex);
 925         for (i = 0; i < ETH_ALEN; i++)
 926                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 927
 928         if (is_valid_ether_addr(conf->bssid)) {
 929                 reg = RTL818X_MSR_INFRA;
 930                 if (priv->is_rtl8187b)
 931                         reg |= RTL818X_MSR_ENEDCA;
 932                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
 933         } else {
 934                 reg = RTL818X_MSR_NO_LINK;
 935                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
 936         }
 937
 938         mutex_unlock(&priv->conf_mutex);
 939         return 0;
 940 }
 941
 942 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
 943                                      unsigned int changed_flags,
 944                                      unsigned int *total_flags,
 945                                      int mc_count, struct dev_addr_list *mclist)
 946 {
 947         struct rtl8187_priv *priv = dev->priv;
 948
 949         if (changed_flags & FIF_FCSFAIL)
 950                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 951         if (changed_flags & FIF_CONTROL)
 952                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 953         if (changed_flags & FIF_OTHER_BSS)
 954                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 955         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 956                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 957         else
 958                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 959
 960         *total_flags = 0;
 961
 962         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 963                 *total_flags |= FIF_FCSFAIL;
 964         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 965                 *total_flags |= FIF_CONTROL;
 966         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 967                 *total_flags |= FIF_OTHER_BSS;
 968         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 969                 *total_flags |= FIF_ALLMULTI;
 970
 971         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
 972 }
 973
 974 static const struct ieee80211_ops rtl8187_ops = {
 975         .tx                     = rtl8187_tx,
 976         .start                  = rtl8187_start,
 977         .stop                   = rtl8187_stop,
 978         .add_interface          = rtl8187_add_interface,
 979         .remove_interface       = rtl8187_remove_interface,
 980         .config                 = rtl8187_config,
 981         .config_interface       = rtl8187_config_interface,
 982         .configure_filter       = rtl8187_configure_filter,
 983 };
 984
 985 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 986 {
 987         struct ieee80211_hw *dev = eeprom->data;
 988         struct rtl8187_priv *priv = dev->priv;
 989         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 990
 991         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 992         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 993         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 994         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 995 }
 996
 997 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 998 {
 999         struct ieee80211_hw *dev = eeprom->data;
1000         struct rtl8187_priv *priv = dev->priv;
1001         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1002
1003         if (eeprom->reg_data_in)
1004                 reg |= RTL818X_EEPROM_CMD_WRITE;
1005         if (eeprom->reg_data_out)
1006                 reg |= RTL818X_EEPROM_CMD_READ;
1007         if (eeprom->reg_data_clock)
1008                 reg |= RTL818X_EEPROM_CMD_CK;
1009         if (eeprom->reg_chip_select)
1010                 reg |= RTL818X_EEPROM_CMD_CS;
1011
1012         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1013         udelay(10);
1014 }
1015
1016 static int __devinit rtl8187_probe(struct usb_interface *intf,
1017                                    const struct usb_device_id *id)
1018 {
1019         struct usb_device *udev = interface_to_usbdev(intf);
1020         struct ieee80211_hw *dev;
1021         struct rtl8187_priv *priv;
1022         struct eeprom_93cx6 eeprom;
1023         struct ieee80211_channel *channel;
1024         const char *chip_name;
1025         u16 txpwr, reg;
1026         int err, i;
1027         DECLARE_MAC_BUF(mac);
1028
1029         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1030         if (!dev) {
1031                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1032                 return -ENOMEM;
1033         }
1034
1035         priv = dev->priv;
1036         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1037
1038         SET_IEEE80211_DEV(dev, &intf->dev);
1039         usb_set_intfdata(intf, dev);
1040         priv->udev = udev;
1041
1042         usb_get_dev(udev);
1043
1044         skb_queue_head_init(&priv->rx_queue);
1045
1046         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1047         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1048
1049         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1050         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1051         priv->map = (struct rtl818x_csr *)0xFF00;
1052
1053         priv->band.band = IEEE80211_BAND_2GHZ;
1054         priv->band.channels = priv->channels;
1055         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1056         priv->band.bitrates = priv->rates;
1057         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1058         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1059
1060
1061         priv->mode = NL80211_IFTYPE_MONITOR;
1062         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1063                      IEEE80211_HW_RX_INCLUDES_FCS;
1064
1065         eeprom.data = dev;
1066         eeprom.register_read = rtl8187_eeprom_register_read;
1067         eeprom.register_write = rtl8187_eeprom_register_write;
1068         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1069                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1070         else
1071                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1072
1073         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1074         udelay(10);
1075
1076         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1077                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1078         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1079                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1080                        "generated MAC address\n");
1081                 random_ether_addr(dev->wiphy->perm_addr);
1082         }
1083
1084         channel = priv->channels;
1085         for (i = 0; i < 3; i++) {
1086                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1087                                   &txpwr);
1088                 (*channel++).hw_value = txpwr & 0xFF;
1089                 (*channel++).hw_value = txpwr >> 8;
1090         }
1091         for (i = 0; i < 2; i++) {
1092                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1093                                   &txpwr);
1094                 (*channel++).hw_value = txpwr & 0xFF;
1095                 (*channel++).hw_value = txpwr >> 8;
1096         }
1097
1098         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1099                           &priv->txpwr_base);
1100
1101         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1102         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1103         /* 0 means asic B-cut, we should use SW 3 wire
1104          * bit-by-bit banging for radio. 1 means we can use
1105          * USB specific request to write radio registers */
1106         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1107         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1108         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1109
1110         if (!priv->is_rtl8187b) {
1111                 u32 reg32;
1112                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1113                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1114                 switch (reg32) {
1115                 case RTL818X_TX_CONF_R8187vD_B:
1116                         /* Some RTL8187B devices have a USB ID of 0x8187
1117                          * detect them here */
1118                         chip_name = "RTL8187BvB(early)";
1119                         priv->is_rtl8187b = 1;
1120                         priv->hw_rev = RTL8187BvB;
1121                         break;
1122                 case RTL818X_TX_CONF_R8187vD:
1123                         chip_name = "RTL8187vD";
1124                         break;
1125                 default:
1126                         chip_name = "RTL8187vB (default)";
1127                 }
1128        } else {
1129                 /*
1130                  * Force USB request to write radio registers for 8187B, Realtek
1131                  * only uses it in their sources
1132                  */
1133                 /*if (priv->asic_rev == 0) {
1134                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1135                                "requests to write to radio registers\n");
1136                         priv->asic_rev = 1;
1137                 }*/
1138                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1139                 case RTL818X_R8187B_B:
1140                         chip_name = "RTL8187BvB";
1141                         priv->hw_rev = RTL8187BvB;
1142                         break;
1143                 case RTL818X_R8187B_D:
1144                         chip_name = "RTL8187BvD";
1145                         priv->hw_rev = RTL8187BvD;
1146                         break;
1147                 case RTL818X_R8187B_E:
1148                         chip_name = "RTL8187BvE";
1149                         priv->hw_rev = RTL8187BvE;
1150                         break;
1151                 default:
1152                         chip_name = "RTL8187BvB (default)";
1153                         priv->hw_rev = RTL8187BvB;
1154                 }
1155         }
1156
1157         if (!priv->is_rtl8187b) {
1158                 for (i = 0; i < 2; i++) {
1159                         eeprom_93cx6_read(&eeprom,
1160                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1161                                           &txpwr);
1162                         (*channel++).hw_value = txpwr & 0xFF;
1163                         (*channel++).hw_value = txpwr >> 8;
1164                 }
1165         } else {
1166                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1167                                   &txpwr);
1168                 (*channel++).hw_value = txpwr & 0xFF;
1169
1170                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1171                 (*channel++).hw_value = txpwr & 0xFF;
1172
1173                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1174                 (*channel++).hw_value = txpwr & 0xFF;
1175                 (*channel++).hw_value = txpwr >> 8;
1176         }
1177
1178         if (priv->is_rtl8187b) {
1179                 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1180                         "is EXPERIMENTAL, and could damage your\n"
1181                         "         hardware, use at your own risk\n");
1182                 dev->flags |= IEEE80211_HW_SIGNAL_DBM;
1183         } else {
1184                 dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
1185                 dev->max_signal = 65;
1186         }
1187
1188         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1189
1190         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1191                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1192                        " info!\n");
1193
1194         priv->rf = rtl8187_detect_rf(dev);
1195         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1196                                   sizeof(struct rtl8187_tx_hdr) :
1197                                   sizeof(struct rtl8187b_tx_hdr);
1198         if (!priv->is_rtl8187b)
1199                 dev->queues = 1;
1200         else
1201                 dev->queues = 4;
1202
1203         err = ieee80211_register_hw(dev);
1204         if (err) {
1205                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1206                 goto err_free_dev;
1207         }
1208         mutex_init(&priv->conf_mutex);
1209
1210         printk(KERN_INFO "%s: hwaddr %s, %s V%d + %s\n",
1211                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1212                chip_name, priv->asic_rev, priv->rf->name);
1213
1214         return 0;
1215
1216  err_free_dev:
1217         ieee80211_free_hw(dev);
1218         usb_set_intfdata(intf, NULL);
1219         usb_put_dev(udev);
1220         return err;
1221 }
1222
1223 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1224 {
1225         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1226         struct rtl8187_priv *priv;
1227
1228         if (!dev)
1229                 return;
1230
1231         ieee80211_unregister_hw(dev);
1232
1233         priv = dev->priv;
1234         usb_put_dev(interface_to_usbdev(intf));
1235         ieee80211_free_hw(dev);
1236 }
1237
1238 static struct usb_driver rtl8187_driver = {
1239         .name           = KBUILD_MODNAME,
1240         .id_table       = rtl8187_table,
1241         .probe          = rtl8187_probe,
1242         .disconnect     = __devexit_p(rtl8187_disconnect),
1243 };
1244
1245 static int __init rtl8187_init(void)
1246 {
1247         return usb_register(&rtl8187_driver);
1248 }
1249
1250 static void __exit rtl8187_exit(void)
1251 {
1252         usb_deregister(&rtl8187_driver);
1253 }
1254
1255 module_init(rtl8187_init);
1256 module_exit(rtl8187_exit);