4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for branch trace store (BTS) and
6 * precise-event based sampling (PEBS).
9 * - DS and BTS hardware configuration
10 * - buffer overflow handling (to be done)
14 * - security checking (is the caller allowed to trace the task)
15 * - buffer allocation (memory accounting)
18 * Copyright (C) 2007-2008 Intel Corporation.
19 * Markus Metzger <markus.t.metzger@intel.com>, 2007-2008
25 #include <linux/errno.h>
26 #include <linux/string.h>
27 #include <linux/slab.h>
28 #include <linux/sched.h>
30 #include <linux/kernel.h>
34 * The configuration for a particular DS hardware implementation.
36 struct ds_configuration {
37 /* the name of the configuration */
39 /* the size of one pointer-typed field in the DS structure and
40 in the BTS and PEBS buffers in bytes;
41 this covers the first 8 DS fields related to buffer management. */
42 unsigned char sizeof_field;
43 /* the size of a BTS/PEBS record in bytes */
44 unsigned char sizeof_rec[2];
45 /* a series of bit-masks to control various features indexed
46 * by enum ds_feature */
47 unsigned long ctl[dsf_ctl_max];
49 static DEFINE_PER_CPU(struct ds_configuration, ds_cfg_array);
51 #define ds_cfg per_cpu(ds_cfg_array, smp_processor_id())
53 #define MAX_SIZEOF_DS (12 * 8) /* maximal size of a DS configuration */
54 #define MAX_SIZEOF_BTS (3 * 8) /* maximal size of a BTS record */
55 #define DS_ALIGNMENT (1 << 3) /* BTS and PEBS buffer alignment */
58 (ds_cfg.ctl[dsf_bts] | ds_cfg.ctl[dsf_bts_kernel] | ds_cfg.ctl[dsf_bts_user] |\
59 ds_cfg.ctl[dsf_bts_overflow])
63 * A BTS or PEBS tracer.
65 * This holds the configuration of the tracer and serves as a handle
66 * to identify tracers.
69 /* the DS context (partially) owned by this tracer */
70 struct ds_context *context;
71 /* the buffer provided on ds_request() and its size in bytes */
77 /* the common DS part */
79 /* the trace including the DS configuration */
80 struct bts_trace trace;
81 /* buffer overflow notification function */
82 bts_ovfl_callback_t ovfl;
86 /* the common DS part */
88 /* the trace including the DS configuration */
89 struct pebs_trace trace;
90 /* buffer overflow notification function */
91 pebs_ovfl_callback_t ovfl;
95 * Debug Store (DS) save area configuration (see Intel64 and IA32
96 * Architectures Software Developer's Manual, section 18.5)
98 * The DS configuration consists of the following fields; different
99 * architetures vary in the size of those fields.
100 * - double-word aligned base linear address of the BTS buffer
101 * - write pointer into the BTS buffer
102 * - end linear address of the BTS buffer (one byte beyond the end of
104 * - interrupt pointer into BTS buffer
105 * (interrupt occurs when write pointer passes interrupt pointer)
106 * - double-word aligned base linear address of the PEBS buffer
107 * - write pointer into the PEBS buffer
108 * - end linear address of the PEBS buffer (one byte beyond the end of
110 * - interrupt pointer into PEBS buffer
111 * (interrupt occurs when write pointer passes interrupt pointer)
112 * - value to which counter is reset following counter overflow
114 * Later architectures use 64bit pointers throughout, whereas earlier
115 * architectures use 32bit pointers in 32bit mode.
118 * We compute the base address for the first 8 fields based on:
119 * - the field size stored in the DS configuration
120 * - the relative field position
121 * - an offset giving the start of the respective region
123 * This offset is further used to index various arrays holding
124 * information for BTS and PEBS at the respective index.
126 * On later 32bit processors, we only access the lower 32bit of the
127 * 64bit pointer fields. The upper halves will be zeroed out.
134 ds_interrupt_threshold,
142 static inline unsigned long ds_get(const unsigned char *base,
143 enum ds_qualifier qual, enum ds_field field)
145 base += (ds_cfg.sizeof_field * (field + (4 * qual)));
146 return *(unsigned long *)base;
149 static inline void ds_set(unsigned char *base, enum ds_qualifier qual,
150 enum ds_field field, unsigned long value)
152 base += (ds_cfg.sizeof_field * (field + (4 * qual)));
153 (*(unsigned long *)base) = value;
158 * Locking is done only for allocating BTS or PEBS resources.
160 static DEFINE_SPINLOCK(ds_lock);
164 * We either support (system-wide) per-cpu or per-thread allocation.
165 * We distinguish the two based on the task_struct pointer, where a
166 * NULL pointer indicates per-cpu allocation for the current cpu.
168 * Allocations are use-counted. As soon as resources are allocated,
169 * further allocations must be of the same type (per-cpu or
170 * per-thread). We model this by counting allocations (i.e. the number
171 * of tracers of a certain type) for one type negatively:
173 * >0 number of per-thread tracers
174 * <0 number of per-cpu tracers
176 * Tracers essentially gives the number of ds contexts for a certain
177 * type of allocation.
179 static atomic_t tracers = ATOMIC_INIT(0);
181 static inline void get_tracer(struct task_struct *task)
184 atomic_inc(&tracers);
186 atomic_dec(&tracers);
189 static inline void put_tracer(struct task_struct *task)
192 atomic_dec(&tracers);
194 atomic_inc(&tracers);
197 static inline int check_tracer(struct task_struct *task)
200 (atomic_read(&tracers) >= 0) :
201 (atomic_read(&tracers) <= 0);
206 * The DS context is either attached to a thread or to a cpu:
207 * - in the former case, the thread_struct contains a pointer to the
209 * - in the latter case, we use a static array of per-cpu context
212 * Contexts are use-counted. They are allocated on first access and
213 * deallocated when the last user puts the context.
216 /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
217 unsigned char ds[MAX_SIZEOF_DS];
218 /* the owner of the BTS and PEBS configuration, respectively */
219 struct bts_tracer *bts_master;
220 struct pebs_tracer *pebs_master;
223 /* a pointer to the context location inside the thread_struct
224 * or the per_cpu context array */
225 struct ds_context **this;
226 /* a pointer to the task owning this context, or NULL, if the
227 * context is owned by a cpu */
228 struct task_struct *task;
231 static DEFINE_PER_CPU(struct ds_context *, system_context_array);
233 #define system_context per_cpu(system_context_array, smp_processor_id())
235 static inline struct ds_context *ds_get_context(struct task_struct *task)
237 struct ds_context **p_context =
238 (task ? &task->thread.ds_ctx : &system_context);
239 struct ds_context *context = *p_context;
243 context = kzalloc(sizeof(*context), GFP_KERNEL);
247 spin_lock_irqsave(&ds_lock, irq);
252 context = *p_context;
254 *p_context = context;
256 context->this = p_context;
257 context->task = task;
260 set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
262 if (!task || (task == current))
263 wrmsrl(MSR_IA32_DS_AREA,
264 (unsigned long)context->ds);
269 spin_unlock_irqrestore(&ds_lock, irq);
271 spin_lock_irqsave(&ds_lock, irq);
273 context = *p_context;
277 spin_unlock_irqrestore(&ds_lock, irq);
280 context = ds_get_context(task);
286 static inline void ds_put_context(struct ds_context *context)
293 spin_lock_irqsave(&ds_lock, irq);
295 if (--context->count) {
296 spin_unlock_irqrestore(&ds_lock, irq);
300 *(context->this) = NULL;
303 clear_tsk_thread_flag(context->task, TIF_DS_AREA_MSR);
305 if (!context->task || (context->task == current))
306 wrmsrl(MSR_IA32_DS_AREA, 0);
308 spin_unlock_irqrestore(&ds_lock, irq);
315 * Call the tracer's callback on a buffer overflow.
317 * context: the ds context
318 * qual: the buffer type
320 static void ds_overflow(struct ds_context *context, enum ds_qualifier qual)
324 if (context->bts_master &&
325 context->bts_master->ovfl)
326 context->bts_master->ovfl(context->bts_master);
329 if (context->pebs_master &&
330 context->pebs_master->ovfl)
331 context->pebs_master->ovfl(context->pebs_master);
338 * Write raw data into the BTS or PEBS buffer.
340 * The remainder of any partially written record is zeroed out.
342 * context: the DS context
343 * qual: the buffer type
344 * record: the data to write
345 * size: the size of the data
347 static int ds_write(struct ds_context *context, enum ds_qualifier qual,
348 const void *record, size_t size)
350 int bytes_written = 0;
356 unsigned long base, index, end, write_end, int_th;
357 unsigned long write_size, adj_write_size;
360 * write as much as possible without producing an
361 * overflow interrupt.
363 * interrupt_threshold must either be
364 * - bigger than absolute_maximum or
365 * - point to a record between buffer_base and absolute_maximum
367 * index points to a valid record.
369 base = ds_get(context->ds, qual, ds_buffer_base);
370 index = ds_get(context->ds, qual, ds_index);
371 end = ds_get(context->ds, qual, ds_absolute_maximum);
372 int_th = ds_get(context->ds, qual, ds_interrupt_threshold);
374 write_end = min(end, int_th);
376 /* if we are already beyond the interrupt threshold,
377 * we fill the entire buffer */
378 if (write_end <= index)
381 if (write_end <= index)
384 write_size = min((unsigned long) size, write_end - index);
385 memcpy((void *)index, record, write_size);
387 record = (const char *)record + write_size;
389 bytes_written += write_size;
391 adj_write_size = write_size / ds_cfg.sizeof_rec[qual];
392 adj_write_size *= ds_cfg.sizeof_rec[qual];
394 /* zero out trailing bytes */
395 memset((char *)index + write_size, 0,
396 adj_write_size - write_size);
397 index += adj_write_size;
401 ds_set(context->ds, qual, ds_index, index);
404 ds_overflow(context, qual);
407 return bytes_written;
412 * Branch Trace Store (BTS) uses the following format. Different
413 * architectures vary in the size of those fields.
414 * - source linear address
415 * - destination linear address
418 * Later architectures use 64bit pointers throughout, whereas earlier
419 * architectures use 32bit pointers in 32bit mode.
421 * We compute the base address for the first 8 fields based on:
422 * - the field size stored in the DS configuration
423 * - the relative field position
425 * In order to store additional information in the BTS buffer, we use
426 * a special source address to indicate that the record requires
427 * special interpretation.
429 * Netburst indicated via a bit in the flags field whether the branch
430 * was predicted; this is ignored.
432 * We use two levels of abstraction:
433 * - the raw data level defined here
434 * - an arch-independent level defined in ds.h
443 bts_jiffies = bts_to,
446 bts_qual_mask = (bts_qual_max - 1),
447 bts_escape = ((unsigned long)-1 & ~bts_qual_mask)
450 static inline unsigned long bts_get(const char *base, enum bts_field field)
452 base += (ds_cfg.sizeof_field * field);
453 return *(unsigned long *)base;
456 static inline void bts_set(char *base, enum bts_field field, unsigned long val)
458 base += (ds_cfg.sizeof_field * field);;
459 (*(unsigned long *)base) = val;
464 * The raw BTS data is architecture dependent.
466 * For higher-level users, we give an arch-independent view.
467 * - ds.h defines struct bts_struct
468 * - bts_read translates one raw bts record into a bts_struct
469 * - bts_write translates one bts_struct into the raw format and
470 * writes it into the top of the parameter tracer's buffer.
472 * return: bytes read/written on success; -Eerrno, otherwise
474 static int bts_read(struct bts_tracer *tracer, const void *at,
475 struct bts_struct *out)
480 if (at < tracer->trace.ds.begin)
483 if (tracer->trace.ds.end < (at + tracer->trace.ds.size))
486 memset(out, 0, sizeof(*out));
487 if ((bts_get(at, bts_qual) & ~bts_qual_mask) == bts_escape) {
488 out->qualifier = (bts_get(at, bts_qual) & bts_qual_mask);
489 out->variant.timestamp.jiffies = bts_get(at, bts_jiffies);
490 out->variant.timestamp.pid = bts_get(at, bts_pid);
492 out->qualifier = bts_branch;
493 out->variant.lbr.from = bts_get(at, bts_from);
494 out->variant.lbr.to = bts_get(at, bts_to);
497 return ds_cfg.sizeof_rec[ds_bts];
500 static int bts_write(struct bts_tracer *tracer, const struct bts_struct *in)
502 unsigned char raw[MAX_SIZEOF_BTS];
507 if (MAX_SIZEOF_BTS < ds_cfg.sizeof_rec[ds_bts])
510 switch (in->qualifier) {
512 bts_set(raw, bts_from, 0);
513 bts_set(raw, bts_to, 0);
514 bts_set(raw, bts_flags, 0);
517 bts_set(raw, bts_from, in->variant.lbr.from);
518 bts_set(raw, bts_to, in->variant.lbr.to);
519 bts_set(raw, bts_flags, 0);
521 case bts_task_arrives:
522 case bts_task_departs:
523 bts_set(raw, bts_qual, (bts_escape | in->qualifier));
524 bts_set(raw, bts_jiffies, in->variant.timestamp.jiffies);
525 bts_set(raw, bts_pid, in->variant.timestamp.pid);
531 return ds_write(tracer->ds.context, ds_bts, raw,
532 ds_cfg.sizeof_rec[ds_bts]);
536 static void ds_write_config(struct ds_context *context,
537 struct ds_trace *cfg, enum ds_qualifier qual)
539 unsigned char *ds = context->ds;
541 ds_set(ds, qual, ds_buffer_base, (unsigned long)cfg->begin);
542 ds_set(ds, qual, ds_index, (unsigned long)cfg->top);
543 ds_set(ds, qual, ds_absolute_maximum, (unsigned long)cfg->end);
544 ds_set(ds, qual, ds_interrupt_threshold, (unsigned long)cfg->ith);
547 static void ds_read_config(struct ds_context *context,
548 struct ds_trace *cfg, enum ds_qualifier qual)
550 unsigned char *ds = context->ds;
552 cfg->begin = (void *)ds_get(ds, qual, ds_buffer_base);
553 cfg->top = (void *)ds_get(ds, qual, ds_index);
554 cfg->end = (void *)ds_get(ds, qual, ds_absolute_maximum);
555 cfg->ith = (void *)ds_get(ds, qual, ds_interrupt_threshold);
558 static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual,
559 void *base, size_t size, size_t ith,
560 unsigned int flags) {
561 unsigned long buffer, adj;
563 /* adjust the buffer address and size to meet alignment
565 * - buffer is double-word aligned
566 * - size is multiple of record size
568 * We checked the size at the very beginning; we have enough
569 * space to do the adjustment.
571 buffer = (unsigned long)base;
573 adj = ALIGN(buffer, DS_ALIGNMENT) - buffer;
577 trace->n = size / ds_cfg.sizeof_rec[qual];
578 trace->size = ds_cfg.sizeof_rec[qual];
580 size = (trace->n * trace->size);
582 trace->begin = (void *)buffer;
583 trace->top = trace->begin;
584 trace->end = (void *)(buffer + size);
585 /* The value for 'no threshold' is -1, which will set the
586 * threshold outside of the buffer, just like we want it.
588 trace->ith = (void *)(buffer + size - ith);
590 trace->flags = flags;
594 static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace,
595 enum ds_qualifier qual, struct task_struct *task,
596 void *base, size_t size, size_t th, unsigned int flags)
598 struct ds_context *context;
605 /* we require some space to do alignment adjustments below */
607 if (size < (DS_ALIGNMENT + ds_cfg.sizeof_rec[qual]))
610 if (th != (size_t)-1) {
611 th *= ds_cfg.sizeof_rec[qual];
618 tracer->buffer = base;
622 context = ds_get_context(task);
625 tracer->context = context;
627 ds_init_ds_trace(trace, qual, base, size, th, flags);
634 struct bts_tracer *ds_request_bts(struct task_struct *task,
635 void *base, size_t size,
636 bts_ovfl_callback_t ovfl, size_t th,
639 struct bts_tracer *tracer;
644 if (!ds_cfg.ctl[dsf_bts])
647 /* buffer overflow notification is not yet implemented */
653 tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
658 error = ds_request(&tracer->ds, &tracer->trace.ds,
659 ds_bts, task, base, size, th, flags);
664 spin_lock_irqsave(&ds_lock, irq);
667 if (!check_tracer(task))
672 if (tracer->ds.context->bts_master)
674 tracer->ds.context->bts_master = tracer;
676 spin_unlock_irqrestore(&ds_lock, irq);
679 tracer->trace.read = bts_read;
680 tracer->trace.write = bts_write;
682 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
683 ds_resume_bts(tracer);
690 spin_unlock_irqrestore(&ds_lock, irq);
691 ds_put_context(tracer->ds.context);
695 return ERR_PTR(error);
698 struct pebs_tracer *ds_request_pebs(struct task_struct *task,
699 void *base, size_t size,
700 pebs_ovfl_callback_t ovfl, size_t th,
703 struct pebs_tracer *tracer;
707 /* buffer overflow notification is not yet implemented */
713 tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
718 error = ds_request(&tracer->ds, &tracer->trace.ds,
719 ds_pebs, task, base, size, th, flags);
723 spin_lock_irqsave(&ds_lock, irq);
726 if (!check_tracer(task))
731 if (tracer->ds.context->pebs_master)
733 tracer->ds.context->pebs_master = tracer;
735 spin_unlock_irqrestore(&ds_lock, irq);
737 ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
738 ds_resume_pebs(tracer);
745 spin_unlock_irqrestore(&ds_lock, irq);
746 ds_put_context(tracer->ds.context);
750 return ERR_PTR(error);
753 void ds_release_bts(struct bts_tracer *tracer)
758 ds_suspend_bts(tracer);
760 WARN_ON_ONCE(tracer->ds.context->bts_master != tracer);
761 tracer->ds.context->bts_master = NULL;
763 put_tracer(tracer->ds.context->task);
764 ds_put_context(tracer->ds.context);
769 void ds_suspend_bts(struct bts_tracer *tracer)
771 struct task_struct *task;
776 task = tracer->ds.context->task;
778 if (!task || (task == current))
779 update_debugctlmsr(get_debugctlmsr() & ~BTS_CONTROL);
782 task->thread.debugctlmsr &= ~BTS_CONTROL;
784 if (!task->thread.debugctlmsr)
785 clear_tsk_thread_flag(task, TIF_DEBUGCTLMSR);
789 void ds_resume_bts(struct bts_tracer *tracer)
791 struct task_struct *task;
792 unsigned long control;
797 task = tracer->ds.context->task;
799 control = ds_cfg.ctl[dsf_bts];
800 if (!(tracer->trace.ds.flags & BTS_KERNEL))
801 control |= ds_cfg.ctl[dsf_bts_kernel];
802 if (!(tracer->trace.ds.flags & BTS_USER))
803 control |= ds_cfg.ctl[dsf_bts_user];
806 task->thread.debugctlmsr |= control;
807 set_tsk_thread_flag(task, TIF_DEBUGCTLMSR);
810 if (!task || (task == current))
811 update_debugctlmsr(get_debugctlmsr() | control);
814 void ds_release_pebs(struct pebs_tracer *tracer)
819 ds_suspend_pebs(tracer);
821 WARN_ON_ONCE(tracer->ds.context->pebs_master != tracer);
822 tracer->ds.context->pebs_master = NULL;
824 put_tracer(tracer->ds.context->task);
825 ds_put_context(tracer->ds.context);
830 void ds_suspend_pebs(struct pebs_tracer *tracer)
835 void ds_resume_pebs(struct pebs_tracer *tracer)
840 const struct bts_trace *ds_read_bts(struct bts_tracer *tracer)
845 ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
846 return &tracer->trace;
849 const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer)
854 ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
855 tracer->trace.reset_value =
856 *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8));
858 return &tracer->trace;
861 int ds_reset_bts(struct bts_tracer *tracer)
866 tracer->trace.ds.top = tracer->trace.ds.begin;
868 ds_set(tracer->ds.context->ds, ds_bts, ds_index,
869 (unsigned long)tracer->trace.ds.top);
874 int ds_reset_pebs(struct pebs_tracer *tracer)
879 tracer->trace.ds.top = tracer->trace.ds.begin;
881 ds_set(tracer->ds.context->ds, ds_bts, ds_index,
882 (unsigned long)tracer->trace.ds.top);
887 int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value)
892 *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8)) = value;
897 static const struct ds_configuration ds_cfg_netburst = {
899 .ctl[dsf_bts] = (1 << 2) | (1 << 3),
900 .ctl[dsf_bts_kernel] = (1 << 5),
901 .ctl[dsf_bts_user] = (1 << 6),
903 .sizeof_field = sizeof(long),
904 .sizeof_rec[ds_bts] = sizeof(long) * 3,
906 .sizeof_rec[ds_pebs] = sizeof(long) * 10,
908 .sizeof_rec[ds_pebs] = sizeof(long) * 18,
911 static const struct ds_configuration ds_cfg_pentium_m = {
913 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
915 .sizeof_field = sizeof(long),
916 .sizeof_rec[ds_bts] = sizeof(long) * 3,
918 .sizeof_rec[ds_pebs] = sizeof(long) * 10,
920 .sizeof_rec[ds_pebs] = sizeof(long) * 18,
923 static const struct ds_configuration ds_cfg_core2 = {
925 .ctl[dsf_bts] = (1 << 6) | (1 << 7),
926 .ctl[dsf_bts_kernel] = (1 << 9),
927 .ctl[dsf_bts_user] = (1 << 10),
930 .sizeof_rec[ds_bts] = 8 * 3,
931 .sizeof_rec[ds_pebs] = 8 * 18,
935 ds_configure(const struct ds_configuration *cfg)
937 memset(&ds_cfg, 0, sizeof(ds_cfg));
940 printk(KERN_INFO "[ds] using %s configuration\n", ds_cfg.name);
943 ds_cfg.ctl[dsf_bts] = 0;
944 printk(KERN_INFO "[ds] bts not available\n");
947 printk(KERN_INFO "[ds] pebs not available\n");
949 WARN_ON_ONCE(MAX_SIZEOF_DS < (12 * ds_cfg.sizeof_field));
952 void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
956 switch (c->x86_model) {
958 /* sorry, don't know about them */
961 case 0xE: /* Pentium M */
962 ds_configure(&ds_cfg_pentium_m);
964 default: /* Core2, Atom, ... */
965 ds_configure(&ds_cfg_core2);
970 switch (c->x86_model) {
973 case 0x2: /* Netburst */
974 ds_configure(&ds_cfg_netburst);
977 /* sorry, don't know about them */
982 /* sorry, don't know about them */
988 * Change the DS configuration from tracing prev to tracing next.
990 void ds_switch_to(struct task_struct *prev, struct task_struct *next)
992 struct ds_context *prev_ctx = prev->thread.ds_ctx;
993 struct ds_context *next_ctx = next->thread.ds_ctx;
996 update_debugctlmsr(0);
998 if (prev_ctx->bts_master &&
999 (prev_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) {
1000 struct bts_struct ts = {
1001 .qualifier = bts_task_departs,
1002 .variant.timestamp.jiffies = jiffies_64,
1003 .variant.timestamp.pid = prev->pid
1005 bts_write(prev_ctx->bts_master, &ts);
1010 if (next_ctx->bts_master &&
1011 (next_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) {
1012 struct bts_struct ts = {
1013 .qualifier = bts_task_arrives,
1014 .variant.timestamp.jiffies = jiffies_64,
1015 .variant.timestamp.pid = next->pid
1017 bts_write(next_ctx->bts_master, &ts);
1020 wrmsrl(MSR_IA32_DS_AREA, (unsigned long)next_ctx->ds);
1023 update_debugctlmsr(next->thread.debugctlmsr);