2 * include/asm-sh/processor.h
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
8 #ifndef __ASM_SH_PROCESSOR_32_H
9 #define __ASM_SH_PROCESSOR_32_H
12 #include <linux/compiler.h>
14 #include <asm/types.h>
15 #include <asm/cache.h>
16 #include <asm/ptrace.h>
19 * Default implementation of macro that returns current
20 * instruction pointer ("program counter").
22 #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
24 /* Core Processor Version Register */
25 #define CCN_PVR 0xff000030
26 #define CCN_CVR 0xff000040
27 #define CCN_PRR 0xff000044
31 unsigned long loops_per_jiffy;
32 unsigned long asid_cache;
34 struct cache_info icache; /* Primary I-cache */
35 struct cache_info dcache; /* Primary D-cache */
36 struct cache_info scache; /* Secondary cache */
39 } __attribute__ ((aligned(L1_CACHE_BYTES)));
41 extern struct sh_cpuinfo cpu_data[];
42 #define boot_cpu_data cpu_data[0]
43 #define current_cpu_data cpu_data[smp_processor_id()]
44 #define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
47 * User space process size: 2GB.
49 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
51 #define TASK_SIZE 0x7c000000UL
53 #define STACK_TOP TASK_SIZE
54 #define STACK_TOP_MAX STACK_TOP
56 /* This decides where the kernel will search for a free chunk of vm
57 * space during mmap's.
59 #define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
65 * When it's set, it means the processor doesn't have right to use FPU,
66 * and it results exception when the floating operation is executed.
69 * Interrupt level mask
71 #define SR_DSP 0x00001000
72 #define SR_IMASK 0x000000f0
75 * FPU structure and data
78 struct sh_fpu_hard_struct {
79 unsigned long fp_regs[16];
80 unsigned long xfp_regs[16];
84 long status; /* software status information */
87 /* Dummy fpu emulator */
88 struct sh_fpu_soft_struct {
89 unsigned long fp_regs[16];
90 unsigned long xfp_regs[16];
94 unsigned char lookahead;
95 unsigned long entry_pc;
99 struct sh_fpu_hard_struct hard;
100 struct sh_fpu_soft_struct soft;
103 struct thread_struct {
104 /* Saved registers when thread is descheduled */
108 /* Hardware debugging registers */
109 unsigned long ubc_pc;
111 /* floating point info */
112 union sh_fpu_union fpu;
119 /* Count of active tasks with UBC settings */
120 extern int ubc_usercnt;
122 #define INIT_THREAD { \
123 .sp = sizeof(init_stack) + (long) &init_stack, \
127 * Do necessary setup to start up a newly executed thread.
129 #define start_thread(regs, new_pc, new_sp) \
132 regs->sr = SR_FD; /* User mode. */ \
134 regs->regs[15] = new_sp
136 /* Forward declaration, a strange C thing */
140 /* Free all resources held by a thread. */
141 extern void release_thread(struct task_struct *);
143 /* Prepare to copy thread state - unlazy all lazy status */
144 #define prepare_to_copy(tsk) do { } while (0)
147 * create a kernel thread without removing it from tasklists
149 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
151 /* Copy and release all segment info associated with a VM */
152 #define copy_segments(p, mm) do { } while(0)
153 #define release_segments(mm) do { } while(0)
156 * FPU lazy state save handling.
159 static __inline__ void disable_fpu(void)
161 unsigned long __dummy;
163 /* Set FD flag in SR */
164 __asm__ __volatile__("stc sr, %0\n\t"
171 static __inline__ void enable_fpu(void)
173 unsigned long __dummy;
175 /* Clear out FD flag in SR */
176 __asm__ __volatile__("stc sr, %0\n\t"
183 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
184 #define FPSCR_INIT 0x00080000
186 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
187 #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
190 * Return saved PC of a blocked thread.
192 #define thread_saved_pc(tsk) (tsk->thread.pc)
194 void show_trace(struct task_struct *tsk, unsigned long *sp,
195 struct pt_regs *regs);
196 extern unsigned long get_wchan(struct task_struct *p);
198 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
199 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
201 #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
202 #define cpu_relax() barrier()
204 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
205 defined(CONFIG_CPU_SH4)
206 #define PREFETCH_STRIDE L1_CACHE_BYTES
207 #define ARCH_HAS_PREFETCH
208 #define ARCH_HAS_PREFETCHW
209 static inline void prefetch(void *x)
211 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
214 #define prefetchw(x) prefetch(x)
217 #endif /* __KERNEL__ */
218 #endif /* __ASM_SH_PROCESSOR_32_H */