2 * Copyright (C) 2006-2007 PA Semi, Inc
4 * Author: Olof Johansson, PA Semi
6 * Maintained by: Olof Johansson <olof@lixom.net>
8 * Based on drivers/net/fs_enet/mii-bitbang.c.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/types.h>
27 #include <linux/sched.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/interrupt.h>
31 #include <linux/phy.h>
32 #include <linux/platform_device.h>
33 #include <linux/of_platform.h>
37 static void __iomem *gpio_regs;
44 #define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
45 #define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
47 static inline void mdio_lo(struct mii_bus *bus)
49 out_le32(gpio_regs+0x10, 1 << MDIO_PIN(bus));
52 static inline void mdio_hi(struct mii_bus *bus)
54 out_le32(gpio_regs, 1 << MDIO_PIN(bus));
57 static inline void mdc_lo(struct mii_bus *bus)
59 out_le32(gpio_regs+0x10, 1 << MDC_PIN(bus));
62 static inline void mdc_hi(struct mii_bus *bus)
64 out_le32(gpio_regs, 1 << MDC_PIN(bus));
67 static inline void mdio_active(struct mii_bus *bus)
69 out_le32(gpio_regs+0x20, (1 << MDC_PIN(bus)) | (1 << MDIO_PIN(bus)));
72 static inline void mdio_tristate(struct mii_bus *bus)
74 out_le32(gpio_regs+0x30, (1 << MDIO_PIN(bus)));
77 static inline int mdio_read(struct mii_bus *bus)
79 return !!(in_le32(gpio_regs+0x40) & (1 << MDIO_PIN(bus)));
82 static void clock_out(struct mii_bus *bus, int bit)
94 /* Utility to send the preamble, address, and register (common to read and write). */
95 static void bitbang_pre(struct mii_bus *bus, int read, u8 addr, u8 reg)
99 /* CFE uses a really long preamble (40 bits). We'll do the same. */
101 for (i = 0; i < 40; i++) {
105 /* send the start bit (01) and the read opcode (10) or write (10) */
109 clock_out(bus, read);
110 clock_out(bus, !read);
112 /* send the PHY address */
113 for (i = 0; i < 5; i++) {
114 clock_out(bus, (addr & 0x10) != 0);
118 /* send the register address */
119 for (i = 0; i < 5; i++) {
120 clock_out(bus, (reg & 0x10) != 0);
125 static int gpio_mdio_read(struct mii_bus *bus, int phy_id, int location)
129 u8 addr = phy_id & 0xff;
130 u8 reg = location & 0xff;
132 bitbang_pre(bus, 1, addr, reg);
134 /* tri-state our MDIO I/O pin so we can read */
141 /* read 16 bits of register data, MSB first */
143 for (i = 0; i < 16; i++) {
151 rdreg |= mdio_read(bus);
164 static int gpio_mdio_write(struct mii_bus *bus, int phy_id, int location, u16 val)
168 u8 addr = phy_id & 0xff;
169 u8 reg = location & 0xff;
170 u16 value = val & 0xffff;
172 bitbang_pre(bus, 0, addr, reg);
174 /* send the turnaround (10) */
186 /* write 16 bits of register data, MSB first */
187 for (i = 0; i < 16; i++) {
200 * Tri-state the MDIO line.
210 static int gpio_mdio_reset(struct mii_bus *bus)
212 /*nothing here - dunno how to reset it*/
217 static int __devinit gpio_mdio_probe(struct of_device *ofdev,
218 const struct of_device_id *match)
220 struct device *dev = &ofdev->dev;
221 struct device_node *phy_dn, *np = ofdev->node;
222 struct mii_bus *new_bus;
223 struct gpio_priv *priv;
224 const unsigned int *prop;
229 priv = kzalloc(sizeof(struct gpio_priv), GFP_KERNEL);
233 new_bus = mdiobus_alloc();
238 new_bus->name = "pasemi gpio mdio bus";
239 new_bus->read = &gpio_mdio_read;
240 new_bus->write = &gpio_mdio_write;
241 new_bus->reset = &gpio_mdio_reset;
243 prop = of_get_property(np, "reg", NULL);
244 snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", *prop);
245 new_bus->priv = priv;
247 new_bus->phy_mask = 0;
249 new_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
254 for (i = 0; i < PHY_MAX_ADDR; i++)
255 new_bus->irq[i] = NO_IRQ;
257 for (phy_dn = of_get_next_child(np, NULL);
259 phy_dn = of_get_next_child(np, phy_dn)) {
260 const unsigned int *ip, *regp;
262 ip = of_get_property(phy_dn, "interrupts", NULL);
263 regp = of_get_property(phy_dn, "reg", NULL);
264 if (!ip || !regp || *regp >= PHY_MAX_ADDR)
266 new_bus->irq[*regp] = irq_create_mapping(NULL, *ip);
269 prop = of_get_property(np, "mdc-pin", NULL);
270 priv->mdc_pin = *prop;
272 prop = of_get_property(np, "mdio-pin", NULL);
273 priv->mdio_pin = *prop;
275 new_bus->parent = dev;
276 dev_set_drvdata(dev, new_bus);
278 err = mdiobus_register(new_bus);
281 printk(KERN_ERR "%s: Cannot register as MDIO bus, err %d\n",
299 static int gpio_mdio_remove(struct of_device *dev)
301 struct mii_bus *bus = dev_get_drvdata(&dev->dev);
303 mdiobus_unregister(bus);
305 dev_set_drvdata(&dev->dev, NULL);
314 static struct of_device_id gpio_mdio_match[] =
317 .compatible = "gpio-mdio",
321 MODULE_DEVICE_TABLE(of, gpio_mdio_match);
323 static struct of_platform_driver gpio_mdio_driver =
325 .match_table = gpio_mdio_match,
326 .probe = gpio_mdio_probe,
327 .remove = gpio_mdio_remove,
329 .name = "gpio-mdio-bitbang",
333 int gpio_mdio_init(void)
335 struct device_node *np;
337 np = of_find_compatible_node(NULL, NULL, "1682m-gpio");
339 np = of_find_compatible_node(NULL, NULL,
340 "pasemi,pwrficient-gpio");
343 gpio_regs = of_iomap(np, 0);
349 return of_register_platform_driver(&gpio_mdio_driver);
351 module_init(gpio_mdio_init);
353 void gpio_mdio_exit(void)
355 of_unregister_platform_driver(&gpio_mdio_driver);
359 module_exit(gpio_mdio_exit);
361 MODULE_LICENSE("GPL");
362 MODULE_AUTHOR("Olof Johansson <olof@lixom.net>");
363 MODULE_DESCRIPTION("Driver for MDIO over GPIO on PA Semi PWRficient-based boards");