git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/platforms/44x/warp-nand.c

   1 /*
   2  * PIKA Warp(tm) NAND flash specific routines
   3  *
   4  * Copyright (c) 2008 PIKA Technologies
   5  *   Sean MacLennan <smaclennan@pikatech.com>
   6  */
   7
   8 #include <linux/platform_device.h>
   9 #include <linux/mtd/mtd.h>
  10 #include <linux/mtd/map.h>
  11 #include <linux/mtd/partitions.h>
  12 #include <linux/mtd/nand.h>
  13 #include <linux/mtd/ndfc.h>
  14 #include <asm/machdep.h>
  15
  16 #ifdef CONFIG_MTD_NAND_NDFC
  17
  18 #define CS_NAND_0       1       /* use chip select 1 for NAND device 0 */
  19
  20 #define WARP_NAND_FLASH_REG_ADDR        0xD0000000UL
  21 #define WARP_NAND_FLASH_REG_SIZE        0x2000
  22
  23 static struct resource warp_ndfc = {
  24         .start = WARP_NAND_FLASH_REG_ADDR,
  25         .end   = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE,
  26         .flags = IORESOURCE_MEM,
  27 };
  28
  29 static struct mtd_partition nand_parts[] = {
  30         {
  31                 .name   = "kernel",
  32                 .offset = 0,
  33                 .size   = 0x0200000
  34         },
  35         {
  36                 .name   = "root",
  37                 .offset = 0x0200000,
  38                 .size   = 0x3400000
  39         },
  40         {
  41                 .name   = "user",
  42                 .offset = 0x3600000,
  43                 .size   = 0x0A00000
  44         },
  45 };
  46
  47 struct ndfc_controller_settings warp_ndfc_settings = {
  48         .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
  49         .ndfc_erpn = 0,
  50 };
  51
  52 static struct ndfc_chip_settings warp_chip0_settings = {
  53         .bank_settings = 0x80002222,
  54 };
  55
  56 struct platform_nand_ctrl warp_nand_ctrl = {
  57         .priv = &warp_ndfc_settings,
  58 };
  59
  60 static struct platform_device warp_ndfc_device = {
  61         .name = "ndfc-nand",
  62         .id = 0,
  63         .dev = {
  64                 .platform_data = &warp_nand_ctrl,
  65         },
  66         .num_resources = 1,
  67         .resource = &warp_ndfc,
  68 };
  69
  70 static struct nand_ecclayout nand_oob_16 = {
  71         .eccbytes = 3,
  72         .eccpos = { 0, 1, 2, 3, 6, 7 },
  73         .oobfree = { {.offset = 8, .length = 16} }
  74 };
  75
  76 static struct platform_nand_chip warp_nand_chip0 = {
  77         .nr_chips = 1,
  78         .chip_offset = CS_NAND_0,
  79         .nr_partitions = ARRAY_SIZE(nand_parts),
  80         .partitions = nand_parts,
  81         .chip_delay = 50,
  82         .ecclayout = &nand_oob_16,
  83         .priv = &warp_chip0_settings,
  84 };
  85
  86 static struct platform_device warp_nand_device = {
  87         .name = "ndfc-chip",
  88         .id = 0,
  89         .num_resources = 1,
  90         .resource = &warp_ndfc,
  91         .dev = {
  92                 .platform_data = &warp_nand_chip0,
  93                 .parent = &warp_ndfc_device.dev,
  94         }
  95 };
  96
  97 static int warp_setup_nand_flash(void)
  98 {
  99         platform_device_register(&warp_ndfc_device);
 100         platform_device_register(&warp_nand_device);
 101
 102         return 0;
 103 }
 104 machine_device_initcall(warp, warp_setup_nand_flash);
 105
 106 #endif