git.oblomov.eu Git - linux-2.6/blob - drivers/usb/host/ehci-q.c

   1 /*
   2  * Copyright (C) 2001-2004 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * EHCI hardware queue manipulation ... the core.  QH/QTD manipulation.
  25  *
  26  * Control, bulk, and interrupt traffic all use "qh" lists.  They list "qtd"
  27  * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  28  * buffers needed for the larger number).  We use one QH per endpoint, queue
  29  * multiple urbs (all three types) per endpoint.  URBs may need several qtds.
  30  *
  31  * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  32  * interrupts) needs careful scheduling.  Performance improvements can be
  33  * an ongoing challenge.  That's in "ehci-sched.c".
  34  *
  35  * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  36  * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  37  * (b) special fields in qh entries or (c) split iso entries.  TTs will
  38  * buffer low/full speed data so the host collects it at high speed.
  39  */
  40
  41 /*-------------------------------------------------------------------------*/
  42
  43 /* fill a qtd, returning how much of the buffer we were able to queue up */
  44
  45 static int
  46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  47                   size_t len, int token, int maxpacket)
  48 {
  49         int     i, count;
  50         u64     addr = buf;
  51
  52         /* one buffer entry per 4K ... first might be short or unaligned */
  53         qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  54         qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  55         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
  56         if (likely (len < count))               /* ... iff needed */
  57                 count = len;
  58         else {
  59                 buf +=  0x1000;
  60                 buf &= ~0x0fff;
  61
  62                 /* per-qtd limit: from 16K to 20K (best alignment) */
  63                 for (i = 1; count < len && i < 5; i++) {
  64                         addr = buf;
  65                         qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  66                         qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  67                                         (u32)(addr >> 32));
  68                         buf += 0x1000;
  69                         if ((count + 0x1000) < len)
  70                                 count += 0x1000;
  71                         else
  72                                 count = len;
  73                 }
  74
  75                 /* short packets may only terminate transfers */
  76                 if (count != len)
  77                         count -= (count % maxpacket);
  78         }
  79         qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  80         qtd->length = count;
  81
  82         return count;
  83 }
  84
  85 /*-------------------------------------------------------------------------*/
  86
  87 static inline void
  88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  89 {
  90         /* writes to an active overlay are unsafe */
  91         BUG_ON(qh->qh_state != QH_STATE_IDLE);
  92
  93         qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  94         qh->hw_alt_next = EHCI_LIST_END(ehci);
  95
  96         /* Except for control endpoints, we make hardware maintain data
  97          * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  98          * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  99          * ever clear it.
 100          */
 101         if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
 102                 unsigned        is_out, epnum;
 103
 104                 is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
 105                 epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f;
 106                 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
 107                         qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
 108                         usb_settoggle (qh->dev, epnum, is_out, 1);
 109                 }
 110         }
 111
 112         /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
 113         wmb ();
 114         qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
 115 }
 116
 117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
 118  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
 119  * recovery (including urb dequeue) would need software changes to a QH...
 120  */
 121 static void
 122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
 123 {
 124         struct ehci_qtd *qtd;
 125
 126         if (list_empty (&qh->qtd_list))
 127                 qtd = qh->dummy;
 128         else {
 129                 qtd = list_entry (qh->qtd_list.next,
 130                                 struct ehci_qtd, qtd_list);
 131                 /* first qtd may already be partially processed */
 132                 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
 133                         qtd = NULL;
 134         }
 135
 136         if (qtd)
 137                 qh_update (ehci, qh, qtd);
 138 }
 139
 140 /*-------------------------------------------------------------------------*/
 141
 142 static void qtd_copy_status (
 143         struct ehci_hcd *ehci,
 144         struct urb *urb,
 145         size_t length,
 146         u32 token
 147 )
 148 {
 149         /* count IN/OUT bytes, not SETUP (even short packets) */
 150         if (likely (QTD_PID (token) != 2))
 151                 urb->actual_length += length - QTD_LENGTH (token);
 152
 153         /* don't modify error codes */
 154         if (unlikely (urb->status != -EINPROGRESS))
 155                 return;
 156
 157         /* force cleanup after short read; not always an error */
 158         if (unlikely (IS_SHORT_READ (token)))
 159                 urb->status = -EREMOTEIO;
 160
 161         /* serious "can't proceed" faults reported by the hardware */
 162         if (token & QTD_STS_HALT) {
 163                 if (token & QTD_STS_BABBLE) {
 164                         /* FIXME "must" disable babbling device's port too */
 165                         urb->status = -EOVERFLOW;
 166                 } else if (token & QTD_STS_MMF) {
 167                         /* fs/ls interrupt xfer missed the complete-split */
 168                         urb->status = -EPROTO;
 169                 } else if (token & QTD_STS_DBE) {
 170                         urb->status = (QTD_PID (token) == 1) /* IN ? */
 171                                 ? -ENOSR  /* hc couldn't read data */
 172                                 : -ECOMM; /* hc couldn't write data */
 173                 } else if (token & QTD_STS_XACT) {
 174                         /* timeout, bad crc, wrong PID, etc; retried */
 175                         if (QTD_CERR (token))
 176                                 urb->status = -EPIPE;
 177                         else {
 178                                 ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
 179                                         urb->dev->devpath,
 180                                         usb_pipeendpoint (urb->pipe),
 181                                         usb_pipein (urb->pipe) ? "in" : "out");
 182                                 urb->status = -EPROTO;
 183                         }
 184                 /* CERR nonzero + no errors + halt --> stall */
 185                 } else if (QTD_CERR (token))
 186                         urb->status = -EPIPE;
 187                 else    /* unknown */
 188                         urb->status = -EPROTO;
 189
 190                 ehci_vdbg (ehci,
 191                         "dev%d ep%d%s qtd token %08x --> status %d\n",
 192                         usb_pipedevice (urb->pipe),
 193                         usb_pipeendpoint (urb->pipe),
 194                         usb_pipein (urb->pipe) ? "in" : "out",
 195                         token, urb->status);
 196
 197                 /* if async CSPLIT failed, try cleaning out the TT buffer */
 198                 if (urb->status != -EPIPE
 199                                 && urb->dev->tt && !usb_pipeint (urb->pipe)
 200                                 && ((token & QTD_STS_MMF) != 0
 201                                         || QTD_CERR(token) == 0)
 202                                 && (!ehci_is_TDI(ehci)
 203                                         || urb->dev->tt->hub !=
 204                                            ehci_to_hcd(ehci)->self.root_hub)) {
 205 #ifdef DEBUG
 206                         struct usb_device *tt = urb->dev->tt->hub;
 207                         dev_dbg (&tt->dev,
 208                                 "clear tt buffer port %d, a%d ep%d t%08x\n",
 209                                 urb->dev->ttport, urb->dev->devnum,
 210                                 usb_pipeendpoint (urb->pipe), token);
 211 #endif /* DEBUG */
 212                         usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
 213                 }
 214         }
 215 }
 216
 217 static void
 218 ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb)
 219 __releases(ehci->lock)
 220 __acquires(ehci->lock)
 221 {
 222         if (likely (urb->hcpriv != NULL)) {
 223                 struct ehci_qh  *qh = (struct ehci_qh *) urb->hcpriv;
 224
 225                 /* S-mask in a QH means it's an interrupt urb */
 226                 if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
 227
 228                         /* ... update hc-wide periodic stats (for usbfs) */
 229                         ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
 230                 }
 231                 qh_put (qh);
 232         }
 233
 234         spin_lock (&urb->lock);
 235         urb->hcpriv = NULL;
 236         switch (urb->status) {
 237         case -EINPROGRESS:              /* success */
 238                 urb->status = 0;
 239         default:                        /* fault */
 240                 COUNT (ehci->stats.complete);
 241                 break;
 242         case -EREMOTEIO:                /* fault or normal */
 243                 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
 244                         urb->status = 0;
 245                 COUNT (ehci->stats.complete);
 246                 break;
 247         case -ECONNRESET:               /* canceled */
 248         case -ENOENT:
 249                 COUNT (ehci->stats.unlink);
 250                 break;
 251         }
 252         spin_unlock (&urb->lock);
 253
 254 #ifdef EHCI_URB_TRACE
 255         ehci_dbg (ehci,
 256                 "%s %s urb %p ep%d%s status %d len %d/%d\n",
 257                 __FUNCTION__, urb->dev->devpath, urb,
 258                 usb_pipeendpoint (urb->pipe),
 259                 usb_pipein (urb->pipe) ? "in" : "out",
 260                 urb->status,
 261                 urb->actual_length, urb->transfer_buffer_length);
 262 #endif
 263
 264         /* complete() can reenter this HCD */
 265         spin_unlock (&ehci->lock);
 266         usb_hcd_giveback_urb (ehci_to_hcd(ehci), urb);
 267         spin_lock (&ehci->lock);
 268 }
 269
 270 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
 271 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
 272
 273 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 274 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
 275
 276 /*
 277  * Process and free completed qtds for a qh, returning URBs to drivers.
 278  * Chases up to qh->hw_current.  Returns number of completions called,
 279  * indicating how much "real" work we did.
 280  */
 281 static unsigned
 282 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
 283 {
 284         struct ehci_qtd         *last = NULL, *end = qh->dummy;
 285         struct list_head        *entry, *tmp;
 286         int                     stopped;
 287         unsigned                count = 0;
 288         int                     do_status = 0;
 289         u8                      state;
 290         u32                     halt = HALT_BIT(ehci);
 291
 292         if (unlikely (list_empty (&qh->qtd_list)))
 293                 return count;
 294
 295         /* completions (or tasks on other cpus) must never clobber HALT
 296          * till we've gone through and cleaned everything up, even when
 297          * they add urbs to this qh's queue or mark them for unlinking.
 298          *
 299          * NOTE:  unlinking expects to be done in queue order.
 300          */
 301         state = qh->qh_state;
 302         qh->qh_state = QH_STATE_COMPLETING;
 303         stopped = (state == QH_STATE_IDLE);
 304
 305         /* remove de-activated QTDs from front of queue.
 306          * after faults (including short reads), cleanup this urb
 307          * then let the queue advance.
 308          * if queue is stopped, handles unlinks.
 309          */
 310         list_for_each_safe (entry, tmp, &qh->qtd_list) {
 311                 struct ehci_qtd *qtd;
 312                 struct urb      *urb;
 313                 u32             token = 0;
 314
 315                 /* ignore QHs that are currently inactive */
 316                 if (qh->hw_info1 & __constant_cpu_to_le32(QH_INACTIVATE))
 317                         break;
 318
 319                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 320                 urb = qtd->urb;
 321
 322                 /* clean up any state from previous QTD ...*/
 323                 if (last) {
 324                         if (likely (last->urb != urb)) {
 325                                 ehci_urb_done (ehci, last->urb);
 326                                 count++;
 327                         }
 328                         ehci_qtd_free (ehci, last);
 329                         last = NULL;
 330                 }
 331
 332                 /* ignore urbs submitted during completions we reported */
 333                 if (qtd == end)
 334                         break;
 335
 336                 /* hardware copies qtd out of qh overlay */
 337                 rmb ();
 338                 token = hc32_to_cpu(ehci, qtd->hw_token);
 339
 340                 /* always clean up qtds the hc de-activated */
 341                 if ((token & QTD_STS_ACTIVE) == 0) {
 342
 343                         if ((token & QTD_STS_HALT) != 0) {
 344                                 stopped = 1;
 345
 346                         /* magic dummy for some short reads; qh won't advance.
 347                          * that silicon quirk can kick in with this dummy too.
 348                          */
 349                         } else if (IS_SHORT_READ (token)
 350                                         && !(qtd->hw_alt_next
 351                                                 & EHCI_LIST_END(ehci))) {
 352                                 stopped = 1;
 353                                 goto halt;
 354                         }
 355
 356                 /* stop scanning when we reach qtds the hc is using */
 357                 } else if (likely (!stopped
 358                                 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
 359                         break;
 360
 361                 } else {
 362                         stopped = 1;
 363
 364                         if (unlikely (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)))
 365                                 urb->status = -ESHUTDOWN;
 366
 367                         /* ignore active urbs unless some previous qtd
 368                          * for the urb faulted (including short read) or
 369                          * its urb was canceled.  we may patch qh or qtds.
 370                          */
 371                         if (likely (urb->status == -EINPROGRESS))
 372                                 continue;
 373
 374                         /* issue status after short control reads */
 375                         if (unlikely (do_status != 0)
 376                                         && QTD_PID (token) == 0 /* OUT */) {
 377                                 do_status = 0;
 378                                 continue;
 379                         }
 380
 381                         /* token in overlay may be most current */
 382                         if (state == QH_STATE_IDLE
 383                                         && cpu_to_hc32(ehci, qtd->qtd_dma)
 384                                                 == qh->hw_current)
 385                                 token = hc32_to_cpu(ehci, qh->hw_token);
 386
 387                         /* force halt for unlinked or blocked qh, so we'll
 388                          * patch the qh later and so that completions can't
 389                          * activate it while we "know" it's stopped.
 390                          */
 391                         if ((halt & qh->hw_token) == 0) {
 392 halt:
 393                                 qh->hw_token |= halt;
 394                                 wmb ();
 395                         }
 396                 }
 397
 398                 /* remove it from the queue */
 399                 spin_lock (&urb->lock);
 400                 qtd_copy_status (ehci, urb, qtd->length, token);
 401                 do_status = (urb->status == -EREMOTEIO)
 402                                 && usb_pipecontrol (urb->pipe);
 403                 spin_unlock (&urb->lock);
 404
 405                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
 406                         last = list_entry (qtd->qtd_list.prev,
 407                                         struct ehci_qtd, qtd_list);
 408                         last->hw_next = qtd->hw_next;
 409                 }
 410                 list_del (&qtd->qtd_list);
 411                 last = qtd;
 412         }
 413
 414         /* last urb's completion might still need calling */
 415         if (likely (last != NULL)) {
 416                 ehci_urb_done (ehci, last->urb);
 417                 count++;
 418                 ehci_qtd_free (ehci, last);
 419         }
 420
 421         /* restore original state; caller must unlink or relink */
 422         qh->qh_state = state;
 423
 424         /* be sure the hardware's done with the qh before refreshing
 425          * it after fault cleanup, or recovering from silicon wrongly
 426          * overlaying the dummy qtd (which reduces DMA chatter).
 427          */
 428         if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
 429                 switch (state) {
 430                 case QH_STATE_IDLE:
 431                         qh_refresh(ehci, qh);
 432                         break;
 433                 case QH_STATE_LINKED:
 434                         /* should be rare for periodic transfers,
 435                          * except maybe high bandwidth ...
 436                          */
 437                         if ((cpu_to_hc32(ehci, QH_SMASK)
 438                                         & qh->hw_info2) != 0) {
 439                                 intr_deschedule (ehci, qh);
 440                                 (void) qh_schedule (ehci, qh);
 441                         } else
 442                                 unlink_async (ehci, qh);
 443                         break;
 444                 /* otherwise, unlink already started */
 445                 }
 446         }
 447
 448         return count;
 449 }
 450
 451 /*-------------------------------------------------------------------------*/
 452
 453 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
 454 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
 455 // ... and packet size, for any kind of endpoint descriptor
 456 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
 457
 458 /*
 459  * reverse of qh_urb_transaction:  free a list of TDs.
 460  * used for cleanup after errors, before HC sees an URB's TDs.
 461  */
 462 static void qtd_list_free (
 463         struct ehci_hcd         *ehci,
 464         struct urb              *urb,
 465         struct list_head        *qtd_list
 466 ) {
 467         struct list_head        *entry, *temp;
 468
 469         list_for_each_safe (entry, temp, qtd_list) {
 470                 struct ehci_qtd *qtd;
 471
 472                 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
 473                 list_del (&qtd->qtd_list);
 474                 ehci_qtd_free (ehci, qtd);
 475         }
 476 }
 477
 478 /*
 479  * create a list of filled qtds for this URB; won't link into qh.
 480  */
 481 static struct list_head *
 482 qh_urb_transaction (
 483         struct ehci_hcd         *ehci,
 484         struct urb              *urb,
 485         struct list_head        *head,
 486         gfp_t                   flags
 487 ) {
 488         struct ehci_qtd         *qtd, *qtd_prev;
 489         dma_addr_t              buf;
 490         int                     len, maxpacket;
 491         int                     is_input;
 492         u32                     token;
 493
 494         /*
 495          * URBs map to sequences of QTDs:  one logical transaction
 496          */
 497         qtd = ehci_qtd_alloc (ehci, flags);
 498         if (unlikely (!qtd))
 499                 return NULL;
 500         list_add_tail (&qtd->qtd_list, head);
 501         qtd->urb = urb;
 502
 503         token = QTD_STS_ACTIVE;
 504         token |= (EHCI_TUNE_CERR << 10);
 505         /* for split transactions, SplitXState initialized to zero */
 506
 507         len = urb->transfer_buffer_length;
 508         is_input = usb_pipein (urb->pipe);
 509         if (usb_pipecontrol (urb->pipe)) {
 510                 /* SETUP pid */
 511                 qtd_fill(ehci, qtd, urb->setup_dma,
 512                                 sizeof (struct usb_ctrlrequest),
 513                                 token | (2 /* "setup" */ << 8), 8);
 514
 515                 /* ... and always at least one more pid */
 516                 token ^= QTD_TOGGLE;
 517                 qtd_prev = qtd;
 518                 qtd = ehci_qtd_alloc (ehci, flags);
 519                 if (unlikely (!qtd))
 520                         goto cleanup;
 521                 qtd->urb = urb;
 522                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 523                 list_add_tail (&qtd->qtd_list, head);
 524
 525                 /* for zero length DATA stages, STATUS is always IN */
 526                 if (len == 0)
 527                         token |= (1 /* "in" */ << 8);
 528         }
 529
 530         /*
 531          * data transfer stage:  buffer setup
 532          */
 533         buf = urb->transfer_dma;
 534
 535         if (is_input)
 536                 token |= (1 /* "in" */ << 8);
 537         /* else it's already initted to "out" pid (0 << 8) */
 538
 539         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
 540
 541         /*
 542          * buffer gets wrapped in one or more qtds;
 543          * last one may be "short" (including zero len)
 544          * and may serve as a control status ack
 545          */
 546         for (;;) {
 547                 int this_qtd_len;
 548
 549                 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
 550                 len -= this_qtd_len;
 551                 buf += this_qtd_len;
 552                 if (is_input)
 553                         qtd->hw_alt_next = ehci->async->hw_alt_next;
 554
 555                 /* qh makes control packets use qtd toggle; maybe switch it */
 556                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
 557                         token ^= QTD_TOGGLE;
 558
 559                 if (likely (len <= 0))
 560                         break;
 561
 562                 qtd_prev = qtd;
 563                 qtd = ehci_qtd_alloc (ehci, flags);
 564                 if (unlikely (!qtd))
 565                         goto cleanup;
 566                 qtd->urb = urb;
 567                 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 568                 list_add_tail (&qtd->qtd_list, head);
 569         }
 570
 571         /* unless the bulk/interrupt caller wants a chance to clean
 572          * up after short reads, hc should advance qh past this urb
 573          */
 574         if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
 575                                 || usb_pipecontrol (urb->pipe)))
 576                 qtd->hw_alt_next = EHCI_LIST_END(ehci);
 577
 578         /*
 579          * control requests may need a terminating data "status" ack;
 580          * bulk ones may need a terminating short packet (zero length).
 581          */
 582         if (likely (urb->transfer_buffer_length != 0)) {
 583                 int     one_more = 0;
 584
 585                 if (usb_pipecontrol (urb->pipe)) {
 586                         one_more = 1;
 587                         token ^= 0x0100;        /* "in" <--> "out"  */
 588                         token |= QTD_TOGGLE;    /* force DATA1 */
 589                 } else if (usb_pipebulk (urb->pipe)
 590                                 && (urb->transfer_flags & URB_ZERO_PACKET)
 591                                 && !(urb->transfer_buffer_length % maxpacket)) {
 592                         one_more = 1;
 593                 }
 594                 if (one_more) {
 595                         qtd_prev = qtd;
 596                         qtd = ehci_qtd_alloc (ehci, flags);
 597                         if (unlikely (!qtd))
 598                                 goto cleanup;
 599                         qtd->urb = urb;
 600                         qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
 601                         list_add_tail (&qtd->qtd_list, head);
 602
 603                         /* never any data in such packets */
 604                         qtd_fill(ehci, qtd, 0, 0, token, 0);
 605                 }
 606         }
 607
 608         /* by default, enable interrupt on urb completion */
 609         if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
 610                 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
 611         return head;
 612
 613 cleanup:
 614         qtd_list_free (ehci, urb, head);
 615         return NULL;
 616 }
 617
 618 /*-------------------------------------------------------------------------*/
 619
 620 // Would be best to create all qh's from config descriptors,
 621 // when each interface/altsetting is established.  Unlink
 622 // any previous qh and cancel its urbs first; endpoints are
 623 // implicitly reset then (data toggle too).
 624 // That'd mean updating how usbcore talks to HCDs. (2.7?)
 625
 626
 627 /*
 628  * Each QH holds a qtd list; a QH is used for everything except iso.
 629  *
 630  * For interrupt urbs, the scheduler must set the microframe scheduling
 631  * mask(s) each time the QH gets scheduled.  For highspeed, that's
 632  * just one microframe in the s-mask.  For split interrupt transactions
 633  * there are additional complications: c-mask, maybe FSTNs.
 634  */
 635 static struct ehci_qh *
 636 qh_make (
 637         struct ehci_hcd         *ehci,
 638         struct urb              *urb,
 639         gfp_t                   flags
 640 ) {
 641         struct ehci_qh          *qh = ehci_qh_alloc (ehci, flags);
 642         u32                     info1 = 0, info2 = 0;
 643         int                     is_input, type;
 644         int                     maxp = 0;
 645
 646         if (!qh)
 647                 return qh;
 648
 649         /*
 650          * init endpoint/device data for this QH
 651          */
 652         info1 |= usb_pipeendpoint (urb->pipe) << 8;
 653         info1 |= usb_pipedevice (urb->pipe) << 0;
 654
 655         is_input = usb_pipein (urb->pipe);
 656         type = usb_pipetype (urb->pipe);
 657         maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
 658
 659         /* Compute interrupt scheduling parameters just once, and save.
 660          * - allowing for high bandwidth, how many nsec/uframe are used?
 661          * - split transactions need a second CSPLIT uframe; same question
 662          * - splits also need a schedule gap (for full/low speed I/O)
 663          * - qh has a polling interval
 664          *
 665          * For control/bulk requests, the HC or TT handles these.
 666          */
 667         if (type == PIPE_INTERRUPT) {
 668                 qh->usecs = NS_TO_US (usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
 669                                 hb_mult (maxp) * max_packet (maxp)));
 670                 qh->start = NO_FRAME;
 671
 672                 if (urb->dev->speed == USB_SPEED_HIGH) {
 673                         qh->c_usecs = 0;
 674                         qh->gap_uf = 0;
 675
 676                         qh->period = urb->interval >> 3;
 677                         if (qh->period == 0 && urb->interval != 1) {
 678                                 /* NOTE interval 2 or 4 uframes could work.
 679                                  * But interval 1 scheduling is simpler, and
 680                                  * includes high bandwidth.
 681                                  */
 682                                 dbg ("intr period %d uframes, NYET!",
 683                                                 urb->interval);
 684                                 goto done;
 685                         }
 686                 } else {
 687                         struct usb_tt   *tt = urb->dev->tt;
 688                         int             think_time;
 689
 690                         /* gap is f(FS/LS transfer times) */
 691                         qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
 692                                         is_input, 0, maxp) / (125 * 1000);
 693
 694                         /* FIXME this just approximates SPLIT/CSPLIT times */
 695                         if (is_input) {         // SPLIT, gap, CSPLIT+DATA
 696                                 qh->c_usecs = qh->usecs + HS_USECS (0);
 697                                 qh->usecs = HS_USECS (1);
 698                         } else {                // SPLIT+DATA, gap, CSPLIT
 699                                 qh->usecs += HS_USECS (1);
 700                                 qh->c_usecs = HS_USECS (0);
 701                         }
 702
 703                         think_time = tt ? tt->think_time : 0;
 704                         qh->tt_usecs = NS_TO_US (think_time +
 705                                         usb_calc_bus_time (urb->dev->speed,
 706                                         is_input, 0, max_packet (maxp)));
 707                         qh->period = urb->interval;
 708                 }
 709         }
 710
 711         /* support for tt scheduling, and access to toggles */
 712         qh->dev = urb->dev;
 713
 714         /* using TT? */
 715         switch (urb->dev->speed) {
 716         case USB_SPEED_LOW:
 717                 info1 |= (1 << 12);     /* EPS "low" */
 718                 /* FALL THROUGH */
 719
 720         case USB_SPEED_FULL:
 721                 /* EPS 0 means "full" */
 722                 if (type != PIPE_INTERRUPT)
 723                         info1 |= (EHCI_TUNE_RL_TT << 28);
 724                 if (type == PIPE_CONTROL) {
 725                         info1 |= (1 << 27);     /* for TT */
 726                         info1 |= 1 << 14;       /* toggle from qtd */
 727                 }
 728                 info1 |= maxp << 16;
 729
 730                 info2 |= (EHCI_TUNE_MULT_TT << 30);
 731
 732                 /* Some Freescale processors have an erratum in which the
 733                  * port number in the queue head was 0..N-1 instead of 1..N.
 734                  */
 735                 if (ehci_has_fsl_portno_bug(ehci))
 736                         info2 |= (urb->dev->ttport-1) << 23;
 737                 else
 738                         info2 |= urb->dev->ttport << 23;
 739
 740                 /* set the address of the TT; for TDI's integrated
 741                  * root hub tt, leave it zeroed.
 742                  */
 743                 if (!ehci_is_TDI(ehci)
 744                                 || urb->dev->tt->hub !=
 745                                         ehci_to_hcd(ehci)->self.root_hub)
 746                         info2 |= urb->dev->tt->hub->devnum << 16;
 747
 748                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
 749
 750                 break;
 751
 752         case USB_SPEED_HIGH:            /* no TT involved */
 753                 info1 |= (2 << 12);     /* EPS "high" */
 754                 if (type == PIPE_CONTROL) {
 755                         info1 |= (EHCI_TUNE_RL_HS << 28);
 756                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
 757                         info1 |= 1 << 14;       /* toggle from qtd */
 758                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 759                 } else if (type == PIPE_BULK) {
 760                         info1 |= (EHCI_TUNE_RL_HS << 28);
 761                         info1 |= 512 << 16;     /* usb2 fixed maxpacket */
 762                         info2 |= (EHCI_TUNE_MULT_HS << 30);
 763                 } else {                /* PIPE_INTERRUPT */
 764                         info1 |= max_packet (maxp) << 16;
 765                         info2 |= hb_mult (maxp) << 30;
 766                 }
 767                 break;
 768         default:
 769                 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
 770 done:
 771                 qh_put (qh);
 772                 return NULL;
 773         }
 774
 775         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
 776
 777         /* init as live, toggle clear, advance to dummy */
 778         qh->qh_state = QH_STATE_IDLE;
 779         qh->hw_info1 = cpu_to_hc32(ehci, info1);
 780         qh->hw_info2 = cpu_to_hc32(ehci, info2);
 781         usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
 782         qh_refresh (ehci, qh);
 783         return qh;
 784 }
 785
 786 /*-------------------------------------------------------------------------*/
 787
 788 /* move qh (and its qtds) onto async queue; maybe enable queue.  */
 789
 790 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
 791 {
 792         __hc32          dma = QH_NEXT(ehci, qh->qh_dma);
 793         struct ehci_qh  *head;
 794
 795         /* (re)start the async schedule? */
 796         head = ehci->async;
 797         timer_action_done (ehci, TIMER_ASYNC_OFF);
 798         if (!head->qh_next.qh) {
 799                 u32     cmd = ehci_readl(ehci, &ehci->regs->command);
 800
 801                 if (!(cmd & CMD_ASE)) {
 802                         /* in case a clear of CMD_ASE didn't take yet */
 803                         (void)handshake(ehci, &ehci->regs->status,
 804                                         STS_ASS, 0, 150);
 805                         cmd |= CMD_ASE | CMD_RUN;
 806                         ehci_writel(ehci, cmd, &ehci->regs->command);
 807                         ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
 808                         /* posted write need not be known to HC yet ... */
 809                 }
 810         }
 811
 812         /* clear halt and/or toggle; and maybe recover from silicon quirk */
 813         if (qh->qh_state == QH_STATE_IDLE)
 814                 qh_refresh (ehci, qh);
 815
 816         /* splice right after start */
 817         qh->qh_next = head->qh_next;
 818         qh->hw_next = head->hw_next;
 819         wmb ();
 820
 821         head->qh_next.qh = qh;
 822         head->hw_next = dma;
 823
 824         qh->qh_state = QH_STATE_LINKED;
 825         /* qtd completions reported later by interrupt */
 826 }
 827
 828 /*-------------------------------------------------------------------------*/
 829
 830 /*
 831  * For control/bulk/interrupt, return QH with these TDs appended.
 832  * Allocates and initializes the QH if necessary.
 833  * Returns null if it can't allocate a QH it needs to.
 834  * If the QH has TDs (urbs) already, that's great.
 835  */
 836 static struct ehci_qh *qh_append_tds (
 837         struct ehci_hcd         *ehci,
 838         struct urb              *urb,
 839         struct list_head        *qtd_list,
 840         int                     epnum,
 841         void                    **ptr
 842 )
 843 {
 844         struct ehci_qh          *qh = NULL;
 845         u32                     qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
 846
 847         qh = (struct ehci_qh *) *ptr;
 848         if (unlikely (qh == NULL)) {
 849                 /* can't sleep here, we have ehci->lock... */
 850                 qh = qh_make (ehci, urb, GFP_ATOMIC);
 851                 *ptr = qh;
 852         }
 853         if (likely (qh != NULL)) {
 854                 struct ehci_qtd *qtd;
 855
 856                 if (unlikely (list_empty (qtd_list)))
 857                         qtd = NULL;
 858                 else
 859                         qtd = list_entry (qtd_list->next, struct ehci_qtd,
 860                                         qtd_list);
 861
 862                 /* control qh may need patching ... */
 863                 if (unlikely (epnum == 0)) {
 864
 865                         /* usb_reset_device() briefly reverts to address 0 */
 866                         if (usb_pipedevice (urb->pipe) == 0)
 867                                 qh->hw_info1 &= ~qh_addr_mask;
 868                 }
 869
 870                 /* just one way to queue requests: swap with the dummy qtd.
 871                  * only hc or qh_refresh() ever modify the overlay.
 872                  */
 873                 if (likely (qtd != NULL)) {
 874                         struct ehci_qtd         *dummy;
 875                         dma_addr_t              dma;
 876                         __hc32                  token;
 877
 878                         /* to avoid racing the HC, use the dummy td instead of
 879                          * the first td of our list (becomes new dummy).  both
 880                          * tds stay deactivated until we're done, when the
 881                          * HC is allowed to fetch the old dummy (4.10.2).
 882                          */
 883                         token = qtd->hw_token;
 884                         qtd->hw_token = HALT_BIT(ehci);
 885                         wmb ();
 886                         dummy = qh->dummy;
 887
 888                         dma = dummy->qtd_dma;
 889                         *dummy = *qtd;
 890                         dummy->qtd_dma = dma;
 891
 892                         list_del (&qtd->qtd_list);
 893                         list_add (&dummy->qtd_list, qtd_list);
 894                         __list_splice (qtd_list, qh->qtd_list.prev);
 895
 896                         ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
 897                         qh->dummy = qtd;
 898
 899                         /* hc must see the new dummy at list end */
 900                         dma = qtd->qtd_dma;
 901                         qtd = list_entry (qh->qtd_list.prev,
 902                                         struct ehci_qtd, qtd_list);
 903                         qtd->hw_next = QTD_NEXT(ehci, dma);
 904
 905                         /* let the hc process these next qtds */
 906                         wmb ();
 907                         dummy->hw_token = token;
 908
 909                         urb->hcpriv = qh_get (qh);
 910                 }
 911         }
 912         return qh;
 913 }
 914
 915 /*-------------------------------------------------------------------------*/
 916
 917 static int
 918 submit_async (
 919         struct ehci_hcd         *ehci,
 920         struct usb_host_endpoint *ep,
 921         struct urb              *urb,
 922         struct list_head        *qtd_list,
 923         gfp_t                   mem_flags
 924 ) {
 925         struct ehci_qtd         *qtd;
 926         int                     epnum;
 927         unsigned long           flags;
 928         struct ehci_qh          *qh = NULL;
 929         int                     rc = 0;
 930
 931         qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
 932         epnum = ep->desc.bEndpointAddress;
 933
 934 #ifdef EHCI_URB_TRACE
 935         ehci_dbg (ehci,
 936                 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
 937                 __FUNCTION__, urb->dev->devpath, urb,
 938                 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
 939                 urb->transfer_buffer_length,
 940                 qtd, ep->hcpriv);
 941 #endif
 942
 943         spin_lock_irqsave (&ehci->lock, flags);
 944         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
 945                                &ehci_to_hcd(ehci)->flags))) {
 946                 rc = -ESHUTDOWN;
 947                 goto done;
 948         }
 949
 950         qh = qh_append_tds (ehci, urb, qtd_list, epnum, &ep->hcpriv);
 951         if (unlikely(qh == NULL)) {
 952                 rc = -ENOMEM;
 953                 goto done;
 954         }
 955
 956         /* Control/bulk operations through TTs don't need scheduling,
 957          * the HC and TT handle it when the TT has a buffer ready.
 958          */
 959         if (likely (qh->qh_state == QH_STATE_IDLE))
 960                 qh_link_async (ehci, qh_get (qh));
 961  done:
 962         spin_unlock_irqrestore (&ehci->lock, flags);
 963         if (unlikely (qh == NULL))
 964                 qtd_list_free (ehci, urb, qtd_list);
 965         return rc;
 966 }
 967
 968 /*-------------------------------------------------------------------------*/
 969
 970 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
 971
 972 static void end_unlink_async (struct ehci_hcd *ehci)
 973 {
 974         struct ehci_qh          *qh = ehci->reclaim;
 975         struct ehci_qh          *next;
 976
 977         timer_action_done (ehci, TIMER_IAA_WATCHDOG);
 978
 979         // qh->hw_next = cpu_to_hc32(qh->qh_dma);
 980         qh->qh_state = QH_STATE_IDLE;
 981         qh->qh_next.qh = NULL;
 982         qh_put (qh);                    // refcount from reclaim
 983
 984         /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
 985         next = qh->reclaim;
 986         ehci->reclaim = next;
 987         ehci->reclaim_ready = 0;
 988         qh->reclaim = NULL;
 989
 990         qh_completions (ehci, qh);
 991
 992         if (!list_empty (&qh->qtd_list)
 993                         && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
 994                 qh_link_async (ehci, qh);
 995         else {
 996                 qh_put (qh);            // refcount from async list
 997
 998                 /* it's not free to turn the async schedule on/off; leave it
 999                  * active but idle for a while once it empties.
1000                  */
1001                 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1002                                 && ehci->async->qh_next.qh == NULL)
1003                         timer_action (ehci, TIMER_ASYNC_OFF);
1004         }
1005
1006         if (next) {
1007                 ehci->reclaim = NULL;
1008                 start_unlink_async (ehci, next);
1009         }
1010 }
1011
1012 /* makes sure the async qh will become idle */
1013 /* caller must own ehci->lock */
1014
1015 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1016 {
1017         int             cmd = ehci_readl(ehci, &ehci->regs->command);
1018         struct ehci_qh  *prev;
1019
1020 #ifdef DEBUG
1021         assert_spin_locked(&ehci->lock);
1022         if (ehci->reclaim
1023                         || (qh->qh_state != QH_STATE_LINKED
1024                                 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1025                         )
1026                 BUG ();
1027 #endif
1028
1029         /* stop async schedule right now? */
1030         if (unlikely (qh == ehci->async)) {
1031                 /* can't get here without STS_ASS set */
1032                 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1033                                 && !ehci->reclaim) {
1034                         /* ... and CMD_IAAD clear */
1035                         ehci_writel(ehci, cmd & ~CMD_ASE,
1036                                     &ehci->regs->command);
1037                         wmb ();
1038                         // handshake later, if we need to
1039                         timer_action_done (ehci, TIMER_ASYNC_OFF);
1040                 }
1041                 return;
1042         }
1043
1044         qh->qh_state = QH_STATE_UNLINK;
1045         ehci->reclaim = qh = qh_get (qh);
1046
1047         prev = ehci->async;
1048         while (prev->qh_next.qh != qh)
1049                 prev = prev->qh_next.qh;
1050
1051         prev->hw_next = qh->hw_next;
1052         prev->qh_next = qh->qh_next;
1053         wmb ();
1054
1055         if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
1056                 /* if (unlikely (qh->reclaim != 0))
1057                  *      this will recurse, probably not much
1058                  */
1059                 end_unlink_async (ehci);
1060                 return;
1061         }
1062
1063         ehci->reclaim_ready = 0;
1064         cmd |= CMD_IAAD;
1065         ehci_writel(ehci, cmd, &ehci->regs->command);
1066         (void)ehci_readl(ehci, &ehci->regs->command);
1067         timer_action (ehci, TIMER_IAA_WATCHDOG);
1068 }
1069
1070 /*-------------------------------------------------------------------------*/
1071
1072 static void scan_async (struct ehci_hcd *ehci)
1073 {
1074         struct ehci_qh          *qh;
1075         enum ehci_timer_action  action = TIMER_IO_WATCHDOG;
1076
1077         if (!++(ehci->stamp))
1078                 ehci->stamp++;
1079         timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1080 rescan:
1081         qh = ehci->async->qh_next.qh;
1082         if (likely (qh != NULL)) {
1083                 do {
1084                         /* clean any finished work for this qh */
1085                         if (!list_empty (&qh->qtd_list)
1086                                         && qh->stamp != ehci->stamp) {
1087                                 int temp;
1088
1089                                 /* unlinks could happen here; completion
1090                                  * reporting drops the lock.  rescan using
1091                                  * the latest schedule, but don't rescan
1092                                  * qhs we already finished (no looping).
1093                                  */
1094                                 qh = qh_get (qh);
1095                                 qh->stamp = ehci->stamp;
1096                                 temp = qh_completions (ehci, qh);
1097                                 qh_put (qh);
1098                                 if (temp != 0) {
1099                                         goto rescan;
1100                                 }
1101                         }
1102
1103                         /* unlink idle entries, reducing HC PCI usage as well
1104                          * as HCD schedule-scanning costs.  delay for any qh
1105                          * we just scanned, there's a not-unusual case that it
1106                          * doesn't stay idle for long.
1107                          * (plus, avoids some kind of re-activation race.)
1108                          */
1109                         if (list_empty (&qh->qtd_list)) {
1110                                 if (qh->stamp == ehci->stamp)
1111                                         action = TIMER_ASYNC_SHRINK;
1112                                 else if (!ehci->reclaim
1113                                             && qh->qh_state == QH_STATE_LINKED)
1114                                         start_unlink_async (ehci, qh);
1115                         }
1116
1117                         qh = qh->qh_next.qh;
1118                 } while (qh);
1119         }
1120         if (action == TIMER_ASYNC_SHRINK)
1121                 timer_action (ehci, TIMER_ASYNC_SHRINK);
1122 }