2 * MPC8349E-mITX-GP Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "MPC8349EMITXGP";
16 compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>; // from bootloader
39 bus-frequency = <0>; // from bootloader
40 clock-frequency = <0>; // from bootloader
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>;
53 compatible = "simple-bus";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>; // from bootloader
59 device_type = "watchdog";
60 compatible = "mpc83xx_wdt";
68 compatible = "fsl-i2c";
70 interrupts = <14 0x8>;
71 interrupt-parent = <&ipic>;
79 compatible = "fsl-i2c";
81 interrupts = <15 0x8>;
82 interrupt-parent = <&ipic>;
87 compatible = "dallas,ds1339";
89 interrupts = <18 0x8>;
90 interrupt-parent = <&ipic>;
96 compatible = "fsl,spi";
97 reg = <0x7000 0x1000>;
98 interrupts = <16 0x8>;
99 interrupt-parent = <&ipic>;
104 #address-cells = <1>;
106 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
108 ranges = <0 0x8100 0x1a8>;
109 interrupt-parent = <&ipic>;
113 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
116 interrupt-parent = <&ipic>;
120 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
123 interrupt-parent = <&ipic>;
127 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
130 interrupt-parent = <&ipic>;
134 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
137 interrupt-parent = <&ipic>;
143 compatible = "fsl-usb2-dr";
144 reg = <0x23000 0x1000>;
145 #address-cells = <1>;
147 interrupt-parent = <&ipic>;
148 interrupts = <38 0x8>;
154 #address-cells = <1>;
156 compatible = "fsl,gianfar-mdio";
157 reg = <0x24520 0x20>;
160 phy1c: ethernet-phy@1c {
161 interrupt-parent = <&ipic>;
162 interrupts = <18 0x8>;
164 device_type = "ethernet-phy";
168 enet0: ethernet@24000 {
170 device_type = "network";
172 compatible = "gianfar";
173 reg = <0x24000 0x1000>;
174 local-mac-address = [ 00 00 00 00 00 00 ];
175 interrupts = <32 0x8 33 0x8 34 0x8>;
176 interrupt-parent = <&ipic>;
177 phy-handle = <&phy1c>;
178 linux,network-index = <0>;
181 serial0: serial@4500 {
183 device_type = "serial";
184 compatible = "ns16550";
185 reg = <0x4500 0x100>;
186 clock-frequency = <0>; // from bootloader
187 interrupts = <9 0x8>;
188 interrupt-parent = <&ipic>;
191 serial1: serial@4600 {
193 device_type = "serial";
194 compatible = "ns16550";
195 reg = <0x4600 0x100>;
196 clock-frequency = <0>; // from bootloader
197 interrupts = <10 0x8>;
198 interrupt-parent = <&ipic>;
202 compatible = "fsl,sec2.0";
203 reg = <0x30000 0x10000>;
204 interrupts = <11 0x8>;
205 interrupt-parent = <&ipic>;
206 fsl,num-channels = <4>;
207 fsl,channel-fifo-len = <24>;
208 fsl,exec-units-mask = <0x7e>;
209 fsl,descriptor-types-mask = <0x01010ebf>;
213 interrupt-controller;
214 #address-cells = <0>;
215 #interrupt-cells = <2>;
217 device_type = "ipic";
223 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
225 /* IDSEL 0x0F - PCI Slot */
226 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
227 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
229 interrupt-parent = <&ipic>;
230 interrupts = <67 0x8>;
231 bus-range = <0x1 0x1>;
232 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
233 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
234 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
235 clock-frequency = <66666666>;
236 #interrupt-cells = <1>;
238 #address-cells = <3>;
239 reg = <0xe0008600 0x100 /* internal registers */
240 0xe0008380 0x8>; /* config space access registers */
241 compatible = "fsl,mpc8349-pci";