Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
[linux-2.6] / arch / ppc / platforms / mvme5100.c
1 /*
2  * Board setup routines for the Motorola MVME5100.
3  *
4  * Author: Matt Porter <mporter@mvista.com>
5  *
6  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
7  * the terms of the GNU General Public License version 2.  This program
8  * is licensed "as is" without any warranty of any kind, whether express
9  * or implied.
10  */
11
12 #include <linux/stddef.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/errno.h>
16 #include <linux/pci.h>
17 #include <linux/initrd.h>
18 #include <linux/console.h>
19 #include <linux/delay.h>
20 #include <linux/seq_file.h>
21 #include <linux/kdev_t.h>
22 #include <linux/root_dev.h>
23
24 #include <asm/system.h>
25 #include <asm/pgtable.h>
26 #include <asm/page.h>
27 #include <asm/dma.h>
28 #include <asm/io.h>
29 #include <asm/machdep.h>
30 #include <asm/open_pic.h>
31 #include <asm/i8259.h>
32 #include <asm/todc.h>
33 #include <asm/pci-bridge.h>
34 #include <asm/bootinfo.h>
35 #include <asm/hawk.h>
36
37 #include <platforms/pplus.h>
38 #include <platforms/mvme5100.h>
39
40 static u_char mvme5100_openpic_initsenses[16] __initdata = {
41         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* i8259 cascade */
42         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* TL16C550 UART 1,2 */
43         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet1 front panel or P2 */
44         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Hawk Watchdog 1,2 */
45         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* DS1621 thermal alarm */
46         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT0# */
47         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT1# */
48         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT2# */
49         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT3# */
50         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTA#, PMC2 INTB# */
51         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTB#, PMC2 INTC# */
52         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTC#, PMC2 INTD# */
53         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTD#, PMC2 INTA# */
54         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet 2 (front panel) */
55         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Abort Switch */
56         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* RTC Alarm */
57 };
58
59 static inline int
60 mvme5100_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
61 {
62         int irq;
63
64         static char pci_irq_table[][4] =
65         /*
66          *      PCI IDSEL/INTPIN->INTLINE
67          *         A   B   C   D
68          */
69         {
70                 {  0,  0,  0,  0 },     /* IDSEL 11 - Winbond */
71                 {  0,  0,  0,  0 },     /* IDSEL 12 - unused */
72                 { 21, 22, 23, 24 },     /* IDSEL 13 - Universe II */
73                 { 18,  0,  0,  0 },     /* IDSEL 14 - Enet 1 */
74                 {  0,  0,  0,  0 },     /* IDSEL 15 - unused */
75                 { 25, 26, 27, 28 },     /* IDSEL 16 - PMC Slot 1 */
76                 { 28, 25, 26, 27 },     /* IDSEL 17 - PMC Slot 2 */
77                 {  0,  0,  0,  0 },     /* IDSEL 18 - unused */
78                 { 29,  0,  0,  0 },     /* IDSEL 19 - Enet 2 */
79                 {  0,  0,  0,  0 },     /* IDSEL 20 - PMCSPAN */
80         };
81
82         const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
83         irq = PCI_IRQ_TABLE_LOOKUP;
84         /* If lookup is zero, always return 0 */
85         if (!irq)
86                 return 0;
87         else
88 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
89         /* If IPMC761 present, return table value */
90         return irq;
91 #else
92         /* If IPMC761 not present, we don't have an i8259 so adjust */
93         return (irq - NUM_8259_INTERRUPTS);
94 #endif
95 }
96
97 static void
98 mvme5100_pcibios_fixup_resources(struct pci_dev *dev)
99 {
100         int i;
101
102         if ((dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
103                         (dev->device == PCI_DEVICE_ID_MOTOROLA_HAWK))
104                 for (i=0; i<DEVICE_COUNT_RESOURCE; i++)
105                 {
106                         dev->resource[i].start = 0;
107                         dev->resource[i].end = 0;
108                 }
109 }
110
111 static void __init
112 mvme5100_setup_bridge(void)
113 {
114         struct pci_controller*  hose;
115
116         hose = pcibios_alloc_controller();
117
118         if (!hose)
119                 return;
120
121         hose->first_busno = 0;
122         hose->last_busno = 0xff;
123         hose->pci_mem_offset = MVME5100_PCI_MEM_OFFSET;
124
125         pci_init_resource(&hose->io_resource, MVME5100_PCI_LOWER_IO,
126                         MVME5100_PCI_UPPER_IO, IORESOURCE_IO,
127                         "PCI host bridge");
128
129         pci_init_resource(&hose->mem_resources[0], MVME5100_PCI_LOWER_MEM,
130                         MVME5100_PCI_UPPER_MEM, IORESOURCE_MEM,
131                         "PCI host bridge");
132
133         hose->io_space.start = MVME5100_PCI_LOWER_IO;
134         hose->io_space.end = MVME5100_PCI_UPPER_IO;
135         hose->mem_space.start = MVME5100_PCI_LOWER_MEM;
136         hose->mem_space.end = MVME5100_PCI_UPPER_MEM;
137         hose->io_base_virt = (void *)MVME5100_ISA_IO_BASE;
138
139         /* Use indirect method of Hawk */
140         setup_indirect_pci(hose, MVME5100_PCI_CONFIG_ADDR,
141                         MVME5100_PCI_CONFIG_DATA);
142
143         hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
144
145         ppc_md.pcibios_fixup_resources = mvme5100_pcibios_fixup_resources;
146         ppc_md.pci_swizzle = common_swizzle;
147         ppc_md.pci_map_irq = mvme5100_map_irq;
148 }
149
150 static void __init
151 mvme5100_setup_arch(void)
152 {
153         if ( ppc_md.progress )
154                 ppc_md.progress("mvme5100_setup_arch: enter", 0);
155
156         loops_per_jiffy = 50000000 / HZ;
157
158 #ifdef CONFIG_BLK_DEV_INITRD
159         if (initrd_start)
160                 ROOT_DEV = Root_RAM0;
161         else
162 #endif
163 #ifdef  CONFIG_ROOT_NFS
164                 ROOT_DEV = Root_NFS;
165 #else
166                 ROOT_DEV = Root_SDA2;
167 #endif
168
169         if ( ppc_md.progress )
170                 ppc_md.progress("mvme5100_setup_arch: find_bridges", 0);
171
172         /* Setup PCI host bridge */
173         mvme5100_setup_bridge();
174
175         /* Find and map our OpenPIC */
176         hawk_mpic_init(MVME5100_PCI_MEM_OFFSET);
177         OpenPIC_InitSenses = mvme5100_openpic_initsenses;
178         OpenPIC_NumInitSenses = sizeof(mvme5100_openpic_initsenses);
179
180         printk("MVME5100 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
181
182         if ( ppc_md.progress )
183                 ppc_md.progress("mvme5100_setup_arch: exit", 0);
184
185         return;
186 }
187
188 static void __init
189 mvme5100_init2(void)
190 {
191 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
192                 request_region(0x00,0x20,"dma1");
193                 request_region(0x20,0x20,"pic1");
194                 request_region(0x40,0x20,"timer");
195                 request_region(0x80,0x10,"dma page reg");
196                 request_region(0xa0,0x20,"pic2");
197                 request_region(0xc0,0x20,"dma2");
198 #endif
199         return;
200 }
201
202 /*
203  * Interrupt setup and service.
204  * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
205  */
206 static void __init
207 mvme5100_init_IRQ(void)
208 {
209 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
210         int i;
211 #endif
212
213         if ( ppc_md.progress )
214                 ppc_md.progress("init_irq: enter", 0);
215
216         openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
217 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
218         openpic_init(NUM_8259_INTERRUPTS);
219         openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
220                         &i8259_irq);
221
222         i8259_init(0, 0);
223 #else
224         openpic_init(0);
225 #endif
226
227         if ( ppc_md.progress )
228                 ppc_md.progress("init_irq: exit", 0);
229
230         return;
231 }
232
233 /*
234  * Set BAT 3 to map 0xf0000000 to end of physical memory space.
235  */
236 static __inline__ void
237 mvme5100_set_bat(void)
238 {
239         mb();
240         mtspr(SPRN_DBAT1U, 0xf0001ffe);
241         mtspr(SPRN_DBAT1L, 0xf000002a);
242         mb();
243 }
244
245 static unsigned long __init
246 mvme5100_find_end_of_memory(void)
247 {
248         return hawk_get_mem_size(MVME5100_HAWK_SMC_BASE);
249 }
250
251 static void __init
252 mvme5100_map_io(void)
253 {
254         io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
255         ioremap_base = 0xfe000000;
256 }
257
258 static void
259 mvme5100_reset_board(void)
260 {
261         local_irq_disable();
262
263         /* Set exception prefix high - to the firmware */
264         _nmask_and_or_msr(0, MSR_IP);
265
266         out_8((u_char *)MVME5100_BOARD_MODRST_REG, 0x01);
267
268         return;
269 }
270
271 static void
272 mvme5100_restart(char *cmd)
273 {
274         volatile ulong i = 10000000;
275
276         mvme5100_reset_board();
277
278         while (i-- > 0);
279         panic("restart failed\n");
280 }
281
282 static void
283 mvme5100_halt(void)
284 {
285         local_irq_disable();
286         while (1);
287 }
288
289 static void
290 mvme5100_power_off(void)
291 {
292         mvme5100_halt();
293 }
294
295 static int
296 mvme5100_show_cpuinfo(struct seq_file *m)
297 {
298         seq_printf(m, "vendor\t\t: Motorola\n");
299         seq_printf(m, "machine\t\t: MVME5100\n");
300
301         return 0;
302 }
303
304 TODC_ALLOC();
305
306 void __init
307 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
308               unsigned long r6, unsigned long r7)
309 {
310         parse_bootinfo(find_bootinfo());
311         mvme5100_set_bat();
312
313         isa_io_base = MVME5100_ISA_IO_BASE;
314         isa_mem_base = MVME5100_ISA_MEM_BASE;
315         pci_dram_offset = MVME5100_PCI_DRAM_OFFSET;
316
317         ppc_md.setup_arch = mvme5100_setup_arch;
318         ppc_md.show_cpuinfo = mvme5100_show_cpuinfo;
319         ppc_md.init_IRQ = mvme5100_init_IRQ;
320         ppc_md.get_irq = openpic_get_irq;
321         ppc_md.init = mvme5100_init2;
322
323         ppc_md.restart = mvme5100_restart;
324         ppc_md.power_off = mvme5100_power_off;
325         ppc_md.halt = mvme5100_halt;
326
327         ppc_md.find_end_of_memory = mvme5100_find_end_of_memory;
328         ppc_md.setup_io_mappings = mvme5100_map_io;
329
330         TODC_INIT(TODC_TYPE_MK48T37, MVME5100_NVRAM_AS0, MVME5100_NVRAM_AS1,
331                         MVME5100_NVRAM_DATA, 8);
332
333         ppc_md.time_init = todc_time_init;
334         ppc_md.set_rtc_time = todc_set_rtc_time;
335         ppc_md.get_rtc_time = todc_get_rtc_time;
336         ppc_md.calibrate_decr = todc_calibrate_decr;
337
338         ppc_md.nvram_read_val = todc_m48txx_read_val;
339         ppc_md.nvram_write_val = todc_m48txx_write_val;
340 }