[CRYPTO] api: Make the crypto subsystem fully modular
[linux-2.6] / include / asm-s390 / lowcore.h
1 /*
2  *  include/asm-s390/lowcore.h
3  *
4  *  S390 version
5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9  */
10
11 #ifndef _ASM_S390_LOWCORE_H
12 #define _ASM_S390_LOWCORE_H
13
14 #ifndef __s390x__
15 #define __LC_EXT_OLD_PSW                0x018
16 #define __LC_SVC_OLD_PSW                0x020
17 #define __LC_PGM_OLD_PSW                0x028
18 #define __LC_MCK_OLD_PSW                0x030
19 #define __LC_IO_OLD_PSW                 0x038
20 #define __LC_EXT_NEW_PSW                0x058
21 #define __LC_SVC_NEW_PSW                0x060
22 #define __LC_PGM_NEW_PSW                0x068
23 #define __LC_MCK_NEW_PSW                0x070
24 #define __LC_IO_NEW_PSW                 0x078
25 #else /* !__s390x__ */
26 #define __LC_EXT_OLD_PSW                0x0130
27 #define __LC_SVC_OLD_PSW                0x0140
28 #define __LC_PGM_OLD_PSW                0x0150
29 #define __LC_MCK_OLD_PSW                0x0160
30 #define __LC_IO_OLD_PSW                 0x0170
31 #define __LC_EXT_NEW_PSW                0x01b0
32 #define __LC_SVC_NEW_PSW                0x01c0
33 #define __LC_PGM_NEW_PSW                0x01d0
34 #define __LC_MCK_NEW_PSW                0x01e0
35 #define __LC_IO_NEW_PSW                 0x01f0
36 #endif /* !__s390x__ */
37
38 #define __LC_IPL_PARMBLOCK_PTR          0x014
39 #define __LC_EXT_PARAMS                 0x080
40 #define __LC_CPU_ADDRESS                0x084
41 #define __LC_EXT_INT_CODE               0x086
42
43 #define __LC_SVC_ILC                    0x088
44 #define __LC_SVC_INT_CODE               0x08A
45 #define __LC_PGM_ILC                    0x08C
46 #define __LC_PGM_INT_CODE               0x08E
47
48 #define __LC_PER_ATMID                  0x096
49 #define __LC_PER_ADDRESS                0x098
50 #define __LC_PER_ACCESS_ID              0x0A1
51 #define __LC_AR_MODE_ID                 0x0A3
52
53 #define __LC_SUBCHANNEL_ID              0x0B8
54 #define __LC_SUBCHANNEL_NR              0x0BA
55 #define __LC_IO_INT_PARM                0x0BC
56 #define __LC_IO_INT_WORD                0x0C0
57 #define __LC_MCCK_CODE                  0x0E8
58
59 #define __LC_LAST_BREAK                 0x110
60
61 #define __LC_RETURN_PSW                 0x200
62
63 #define __LC_SAVE_AREA                  0xC00
64
65 #ifndef __s390x__
66 #define __LC_IRB                        0x208
67 #define __LC_SYNC_ENTER_TIMER           0x248
68 #define __LC_ASYNC_ENTER_TIMER          0x250
69 #define __LC_EXIT_TIMER                 0x258
70 #define __LC_LAST_UPDATE_TIMER          0x260
71 #define __LC_USER_TIMER                 0x268
72 #define __LC_SYSTEM_TIMER               0x270
73 #define __LC_LAST_UPDATE_CLOCK          0x278
74 #define __LC_STEAL_CLOCK                0x280
75 #define __LC_RETURN_MCCK_PSW            0x288
76 #define __LC_KERNEL_STACK               0xC40
77 #define __LC_THREAD_INFO                0xC44
78 #define __LC_ASYNC_STACK                0xC48
79 #define __LC_KERNEL_ASCE                0xC4C
80 #define __LC_USER_ASCE                  0xC50
81 #define __LC_PANIC_STACK                0xC54
82 #define __LC_CPUID                      0xC60
83 #define __LC_CPUADDR                    0xC68
84 #define __LC_IPLDEV                     0xC7C
85 #define __LC_CURRENT                    0xC90
86 #define __LC_INT_CLOCK                  0xC98
87 #else /* __s390x__ */
88 #define __LC_IRB                        0x210
89 #define __LC_SYNC_ENTER_TIMER           0x250
90 #define __LC_ASYNC_ENTER_TIMER          0x258
91 #define __LC_EXIT_TIMER                 0x260
92 #define __LC_LAST_UPDATE_TIMER          0x268
93 #define __LC_USER_TIMER                 0x270
94 #define __LC_SYSTEM_TIMER               0x278
95 #define __LC_LAST_UPDATE_CLOCK          0x280
96 #define __LC_STEAL_CLOCK                0x288
97 #define __LC_RETURN_MCCK_PSW            0x290
98 #define __LC_KERNEL_STACK               0xD40
99 #define __LC_THREAD_INFO                0xD48
100 #define __LC_ASYNC_STACK                0xD50
101 #define __LC_KERNEL_ASCE                0xD58
102 #define __LC_USER_ASCE                  0xD60
103 #define __LC_PANIC_STACK                0xD68
104 #define __LC_CPUID                      0xD80
105 #define __LC_CPUADDR                    0xD88
106 #define __LC_IPLDEV                     0xDB8
107 #define __LC_CURRENT                    0xDD8
108 #define __LC_INT_CLOCK                  0xDE8
109 #endif /* __s390x__ */
110
111
112 #define __LC_PANIC_MAGIC                0xE00
113 #ifndef __s390x__
114 #define __LC_PFAULT_INTPARM             0x080
115 #define __LC_CPU_TIMER_SAVE_AREA        0x0D8
116 #define __LC_CLOCK_COMP_SAVE_AREA       0x0E0
117 #define __LC_PSW_SAVE_AREA              0x100
118 #define __LC_PREFIX_SAVE_AREA           0x108
119 #define __LC_AREGS_SAVE_AREA            0x120
120 #define __LC_FPREGS_SAVE_AREA           0x160
121 #define __LC_GPREGS_SAVE_AREA           0x180
122 #define __LC_CREGS_SAVE_AREA            0x1C0
123 #else /* __s390x__ */
124 #define __LC_PFAULT_INTPARM             0x11B8
125 #define __LC_FPREGS_SAVE_AREA           0x1200
126 #define __LC_GPREGS_SAVE_AREA           0x1280
127 #define __LC_PSW_SAVE_AREA              0x1300
128 #define __LC_PREFIX_SAVE_AREA           0x1318
129 #define __LC_FP_CREG_SAVE_AREA          0x131C
130 #define __LC_TODREG_SAVE_AREA           0x1324
131 #define __LC_CPU_TIMER_SAVE_AREA        0x1328
132 #define __LC_CLOCK_COMP_SAVE_AREA       0x1331
133 #define __LC_AREGS_SAVE_AREA            0x1340
134 #define __LC_CREGS_SAVE_AREA            0x1380
135 #endif /* __s390x__ */
136
137 #ifndef __ASSEMBLY__
138
139 #include <asm/processor.h>
140 #include <linux/types.h>
141 #include <asm/sigp.h>
142
143 void restart_int_handler(void);
144 void ext_int_handler(void);
145 void system_call(void);
146 void pgm_check_handler(void);
147 void mcck_int_handler(void);
148 void io_int_handler(void);
149
150 struct save_area_s390 {
151         u32     ext_save;
152         u64     timer;
153         u64     clk_cmp;
154         u8      pad1[24];
155         u8      psw[8];
156         u32     pref_reg;
157         u8      pad2[20];
158         u32     acc_regs[16];
159         u64     fp_regs[4];
160         u32     gp_regs[16];
161         u32     ctrl_regs[16];
162 }  __attribute__((packed));
163
164 struct save_area_s390x {
165         u64     fp_regs[16];
166         u64     gp_regs[16];
167         u8      psw[16];
168         u8      pad1[8];
169         u32     pref_reg;
170         u32     fp_ctrl_reg;
171         u8      pad2[4];
172         u32     tod_reg;
173         u64     timer;
174         u64     clk_cmp;
175         u8      pad3[8];
176         u32     acc_regs[16];
177         u64     ctrl_regs[16];
178 }  __attribute__((packed));
179
180 union save_area {
181         struct save_area_s390   s390;
182         struct save_area_s390x  s390x;
183 };
184
185 #define SAVE_AREA_BASE_S390     0xd4
186 #define SAVE_AREA_BASE_S390X    0x1200
187
188 #ifndef __s390x__
189 #define SAVE_AREA_SIZE sizeof(struct save_area_s390)
190 #define SAVE_AREA_BASE SAVE_AREA_BASE_S390
191 #else
192 #define SAVE_AREA_SIZE sizeof(struct save_area_s390x)
193 #define SAVE_AREA_BASE SAVE_AREA_BASE_S390X
194 #endif
195
196 struct _lowcore
197 {
198 #ifndef __s390x__
199         /* prefix area: defined by architecture */
200         psw_t        restart_psw;              /* 0x000 */
201         __u32        ccw2[4];                  /* 0x008 */
202         psw_t        external_old_psw;         /* 0x018 */
203         psw_t        svc_old_psw;              /* 0x020 */
204         psw_t        program_old_psw;          /* 0x028 */
205         psw_t        mcck_old_psw;             /* 0x030 */
206         psw_t        io_old_psw;               /* 0x038 */
207         __u8         pad1[0x58-0x40];          /* 0x040 */
208         psw_t        external_new_psw;         /* 0x058 */
209         psw_t        svc_new_psw;              /* 0x060 */
210         psw_t        program_new_psw;          /* 0x068 */
211         psw_t        mcck_new_psw;             /* 0x070 */
212         psw_t        io_new_psw;               /* 0x078 */
213         __u32        ext_params;               /* 0x080 */
214         __u16        cpu_addr;                 /* 0x084 */
215         __u16        ext_int_code;             /* 0x086 */
216         __u16        svc_ilc;                  /* 0x088 */
217         __u16        svc_code;                 /* 0x08a */
218         __u16        pgm_ilc;                  /* 0x08c */
219         __u16        pgm_code;                 /* 0x08e */
220         __u32        trans_exc_code;           /* 0x090 */
221         __u16        mon_class_num;            /* 0x094 */
222         __u16        per_perc_atmid;           /* 0x096 */
223         __u32        per_address;              /* 0x098 */
224         __u32        monitor_code;             /* 0x09c */
225         __u8         exc_access_id;            /* 0x0a0 */
226         __u8         per_access_id;            /* 0x0a1 */
227         __u8         pad2[0xB8-0xA2];          /* 0x0a2 */
228         __u16        subchannel_id;            /* 0x0b8 */
229         __u16        subchannel_nr;            /* 0x0ba */
230         __u32        io_int_parm;              /* 0x0bc */
231         __u32        io_int_word;              /* 0x0c0 */
232         __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
233         __u32        stfl_fac_list;            /* 0x0c8 */
234         __u8         pad4[0xd4-0xcc];          /* 0x0cc */
235         __u32        extended_save_area_addr;  /* 0x0d4 */
236         __u32        cpu_timer_save_area[2];   /* 0x0d8 */
237         __u32        clock_comp_save_area[2];  /* 0x0e0 */
238         __u32        mcck_interruption_code[2]; /* 0x0e8 */
239         __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
240         __u32        external_damage_code;     /* 0x0f4 */
241         __u32        failing_storage_address;  /* 0x0f8 */
242         __u8         pad6[0x100-0xfc];         /* 0x0fc */
243         __u32        st_status_fixed_logout[4];/* 0x100 */
244         __u8         pad7[0x120-0x110];        /* 0x110 */
245         __u32        access_regs_save_area[16];/* 0x120 */
246         __u32        floating_pt_save_area[8]; /* 0x160 */
247         __u32        gpregs_save_area[16];     /* 0x180 */
248         __u32        cregs_save_area[16];      /* 0x1c0 */      
249
250         psw_t        return_psw;               /* 0x200 */
251         __u8         irb[64];                  /* 0x208 */
252         __u64        sync_enter_timer;         /* 0x248 */
253         __u64        async_enter_timer;        /* 0x250 */
254         __u64        exit_timer;               /* 0x258 */
255         __u64        last_update_timer;        /* 0x260 */
256         __u64        user_timer;               /* 0x268 */
257         __u64        system_timer;             /* 0x270 */
258         __u64        last_update_clock;        /* 0x278 */
259         __u64        steal_clock;              /* 0x280 */
260         psw_t        return_mcck_psw;          /* 0x288 */
261         __u8         pad8[0xc00-0x290];        /* 0x290 */
262
263         /* System info area */
264         __u32        save_area[16];            /* 0xc00 */
265         __u32        kernel_stack;             /* 0xc40 */
266         __u32        thread_info;              /* 0xc44 */
267         __u32        async_stack;              /* 0xc48 */
268         __u32        kernel_asce;              /* 0xc4c */
269         __u32        user_asce;                /* 0xc50 */
270         __u32        panic_stack;              /* 0xc54 */
271         __u32        user_exec_asce;           /* 0xc58 */
272         __u8         pad10[0xc60-0xc5c];       /* 0xc5c */
273         /* entry.S sensitive area start */
274         struct       cpuinfo_S390 cpu_data;    /* 0xc60 */
275         __u32        ipl_device;               /* 0xc7c */
276         /* entry.S sensitive area end */
277
278         /* SMP info area: defined by DJB */
279         __u64        clock_comparator;         /* 0xc80 */
280         __u32        ext_call_fast;            /* 0xc88 */
281         __u32        percpu_offset;            /* 0xc8c */
282         __u32        current_task;             /* 0xc90 */
283         __u32        softirq_pending;          /* 0xc94 */
284         __u64        int_clock;                /* 0xc98 */
285         __u8         pad11[0xe00-0xca0];       /* 0xca0 */
286
287         /* 0xe00 is used as indicator for dump tools */
288         /* whether the kernel died with panic() or not */
289         __u32        panic_magic;              /* 0xe00 */
290
291         /* Align to the top 1k of prefix area */
292         __u8         pad12[0x1000-0xe04];      /* 0xe04 */
293 #else /* !__s390x__ */
294         /* prefix area: defined by architecture */
295         __u32        ccw1[2];                  /* 0x000 */
296         __u32        ccw2[4];                  /* 0x008 */
297         __u8         pad1[0x80-0x18];          /* 0x018 */
298         __u32        ext_params;               /* 0x080 */
299         __u16        cpu_addr;                 /* 0x084 */
300         __u16        ext_int_code;             /* 0x086 */
301         __u16        svc_ilc;                  /* 0x088 */
302         __u16        svc_code;                 /* 0x08a */
303         __u16        pgm_ilc;                  /* 0x08c */
304         __u16        pgm_code;                 /* 0x08e */
305         __u32        data_exc_code;            /* 0x090 */
306         __u16        mon_class_num;            /* 0x094 */
307         __u16        per_perc_atmid;           /* 0x096 */
308         addr_t       per_address;              /* 0x098 */
309         __u8         exc_access_id;            /* 0x0a0 */
310         __u8         per_access_id;            /* 0x0a1 */
311         __u8         op_access_id;             /* 0x0a2 */
312         __u8         ar_access_id;             /* 0x0a3 */
313         __u8         pad2[0xA8-0xA4];          /* 0x0a4 */
314         addr_t       trans_exc_code;           /* 0x0A0 */
315         addr_t       monitor_code;             /* 0x09c */
316         __u16        subchannel_id;            /* 0x0b8 */
317         __u16        subchannel_nr;            /* 0x0ba */
318         __u32        io_int_parm;              /* 0x0bc */
319         __u32        io_int_word;              /* 0x0c0 */
320         __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
321         __u32        stfl_fac_list;            /* 0x0c8 */
322         __u8         pad4[0xe8-0xcc];          /* 0x0cc */
323         __u32        mcck_interruption_code[2]; /* 0x0e8 */
324         __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
325         __u32        external_damage_code;     /* 0x0f4 */
326         addr_t       failing_storage_address;  /* 0x0f8 */
327         __u8         pad6[0x120-0x100];        /* 0x100 */
328         psw_t        restart_old_psw;          /* 0x120 */
329         psw_t        external_old_psw;         /* 0x130 */
330         psw_t        svc_old_psw;              /* 0x140 */
331         psw_t        program_old_psw;          /* 0x150 */
332         psw_t        mcck_old_psw;             /* 0x160 */
333         psw_t        io_old_psw;               /* 0x170 */
334         __u8         pad7[0x1a0-0x180];        /* 0x180 */
335         psw_t        restart_psw;              /* 0x1a0 */
336         psw_t        external_new_psw;         /* 0x1b0 */
337         psw_t        svc_new_psw;              /* 0x1c0 */
338         psw_t        program_new_psw;          /* 0x1d0 */
339         psw_t        mcck_new_psw;             /* 0x1e0 */
340         psw_t        io_new_psw;               /* 0x1f0 */
341         psw_t        return_psw;               /* 0x200 */
342         __u8         irb[64];                  /* 0x210 */
343         __u64        sync_enter_timer;         /* 0x250 */
344         __u64        async_enter_timer;        /* 0x258 */
345         __u64        exit_timer;               /* 0x260 */
346         __u64        last_update_timer;        /* 0x268 */
347         __u64        user_timer;               /* 0x270 */
348         __u64        system_timer;             /* 0x278 */
349         __u64        last_update_clock;        /* 0x280 */
350         __u64        steal_clock;              /* 0x288 */
351         psw_t        return_mcck_psw;          /* 0x290 */
352         __u8         pad8[0xc00-0x2a0];        /* 0x2a0 */
353         /* System info area */
354         __u64        save_area[16];            /* 0xc00 */
355         __u8         pad9[0xd40-0xc80];        /* 0xc80 */
356         __u64        kernel_stack;             /* 0xd40 */
357         __u64        thread_info;              /* 0xd48 */
358         __u64        async_stack;              /* 0xd50 */
359         __u64        kernel_asce;              /* 0xd58 */
360         __u64        user_asce;                /* 0xd60 */
361         __u64        panic_stack;              /* 0xd68 */
362         __u64        user_exec_asce;           /* 0xd70 */
363         __u8         pad10[0xd80-0xd78];       /* 0xd78 */
364         /* entry.S sensitive area start */
365         struct       cpuinfo_S390 cpu_data;    /* 0xd80 */
366         __u32        ipl_device;               /* 0xdb8 */
367         __u32        pad11;                    /* 0xdbc */
368         /* entry.S sensitive area end */
369
370         /* SMP info area: defined by DJB */
371         __u64        clock_comparator;         /* 0xdc0 */
372         __u64        ext_call_fast;            /* 0xdc8 */
373         __u64        percpu_offset;            /* 0xdd0 */
374         __u64        current_task;             /* 0xdd8 */
375         __u32        softirq_pending;          /* 0xde0 */
376         __u32        pad_0x0de4;               /* 0xde4 */
377         __u64        int_clock;                /* 0xde8 */
378         __u8         pad12[0xe00-0xdf0];       /* 0xdf0 */
379
380         /* 0xe00 is used as indicator for dump tools */
381         /* whether the kernel died with panic() or not */
382         __u32        panic_magic;              /* 0xe00 */
383
384         __u8         pad13[0x1200-0xe04];      /* 0xe04 */
385
386         /* System info area */ 
387
388         __u64        floating_pt_save_area[16]; /* 0x1200 */
389         __u64        gpregs_save_area[16];      /* 0x1280 */
390         __u32        st_status_fixed_logout[4]; /* 0x1300 */
391         __u8         pad14[0x1318-0x1310];      /* 0x1310 */
392         __u32        prefixreg_save_area;       /* 0x1318 */
393         __u32        fpt_creg_save_area;        /* 0x131c */
394         __u8         pad15[0x1324-0x1320];      /* 0x1320 */
395         __u32        tod_progreg_save_area;     /* 0x1324 */
396         __u32        cpu_timer_save_area[2];    /* 0x1328 */
397         __u32        clock_comp_save_area[2];   /* 0x1330 */
398         __u8         pad16[0x1340-0x1338];      /* 0x1338 */ 
399         __u32        access_regs_save_area[16]; /* 0x1340 */ 
400         __u64        cregs_save_area[16];       /* 0x1380 */
401
402         /* align to the top of the prefix area */
403
404         __u8         pad17[0x2000-0x1400];      /* 0x1400 */
405 #endif /* !__s390x__ */
406 } __attribute__((packed)); /* End structure*/
407
408 #define S390_lowcore (*((struct _lowcore *) 0))
409 extern struct _lowcore *lowcore_ptr[];
410
411 static inline void set_prefix(__u32 address)
412 {
413         asm volatile("spx %0" : : "m" (address) : "memory");
414 }
415
416 static inline __u32 store_prefix(void)
417 {
418         __u32 address;
419
420         asm volatile("stpx %0" : "=m" (address));
421         return address;
422 }
423
424 #define __PANIC_MAGIC           0xDEADC0DE
425
426 #endif
427
428 #endif